From: "Leif Lindholm" <leif@nuviainc.com>
To: Pankaj Bansal <pankaj.bansal@nxp.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Varun Sethi <V.Sethi@nxp.com>,
devel@edk2.groups.io
Subject: Re: [PATCH 19/19] Platform/NXP: Add LX2160ARDBPKG
Date: Wed, 12 Feb 2020 21:36:25 +0000 [thread overview]
Message-ID: <20200212213625.GG23627@bivouac.eciton.net> (raw)
In-Reply-To: <20200207124328.8723-20-pankaj.bansal@nxp.com>
On Fri, Feb 07, 2020 at 18:13:28 +0530, Pankaj Bansal wrote:
> Add LX2160ARDBPKG
>
> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
> ---
> Platform/NXP/Include/Qixis.h | 40 ++++
> Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 23 +++
> Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 54 ++++++
> Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 172 ++++++++++++++++++
> .../AArch64/ArmPlatformHelper.S | 46 +++++
> .../Library/ArmPlatformLib/ArmPlatformLib.c | 168 +++++++++++++++++
> .../Library/ArmPlatformLib/ArmPlatformLib.inf | 45 +++++
> .../ArmPlatformLib/ArmPlatformLibInternal.h | 26 +++
> .../ArmPlatformLib/ArmPlatformLibMem.c | 80 ++++++++
> Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc | 90 +++++++++
> Platform/NXP/NxpQoriqLsPlatform.dec | 23 +++
> 11 files changed, 767 insertions(+)
> create mode 100644 Platform/NXP/Include/Qixis.h
> create mode 100644 Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
> create mode 100644 Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
> create mode 100644 Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
> create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibInternal.h
> create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
> create mode 100644 Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc
> create mode 100644 Platform/NXP/NxpQoriqLsPlatform.dec
>
> diff --git a/Platform/NXP/Include/Qixis.h b/Platform/NXP/Include/Qixis.h
> new file mode 100644
> index 0000000000..116e4c1b30
> --- /dev/null
> +++ b/Platform/NXP/Include/Qixis.h
> @@ -0,0 +1,40 @@
> +/** @file
> + Qixis Layout.
> +
> + Copyright 2020 NXP
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef __QIXIS_H__
> +#define __QIXIS_H__
Please drop leading __ from include guards.
> +
> +#include <Uefi.h>
> +
> +typedef struct _QIXIS_MIN_LAYOUT {
> + UINT8 Id;
> + UINT8 Ver;
> + UINT8 Qver;
> + UINT8 Model;
> + UINT8 Minor;
> + UINT8 Ctl;
> + UINT8 Aux;
> + UINT8 Reserved007[0x040 - 0x007];
> + UINT8 ResetCtl;
> + UINT8 ResetStat;
> + UINT8 ResetReason;
> + UINT8 ResetForce[3];
> + UINT8 Reserved046[0x04B - 0x046];
> + UINT8 ResetMask[3];
> + UINT8 Reserved04E[0x050 - 0x04E];
> + UINT8 BoardConfig[16];
> + UINT8 DutConfig[16];
> + UINT8 Reserved070[0x090 - 0x070];
> + UINT8 IrqStat[4];
> + UINT8 IrqCtl[4];
> + UINT8 IrqDrv[8];
> + UINT8 Reserved0A0[0x0D8 - 0x0A0];
> +} QIXIS_MIN_LAYOUT;
> +
> +#endif
> +
> diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
> new file mode 100644
> index 0000000000..192eabc5b3
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
> @@ -0,0 +1,23 @@
> +# LX2160aRdbPkg.dec
> +# LX2160a board package.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +[Defines]
> + PACKAGE_NAME = LX2160aRdbPkg
> + PACKAGE_GUID = 6eba6648-d853-4eb3-9761-528b82d5ab04
This GUID is cloned from LS1043aRdbPkg.dec, which is cloned from
BeagleBoardPkg.dec. Please generate a unique GUID for this one, and
provide a separate fix for LS1043aRdbPkg.dec.
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +# Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +################################################################################
> +[Includes.common]
> + Include # Root include for the package
> diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
> new file mode 100644
> index 0000000000..773b211b7d
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
> @@ -0,0 +1,54 @@
> +# LX2160aRdbPkg.dsc
> +#
> +# LX2160ARDB Board package.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +################################################################################
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +################################################################################
> +[Defines]
> + #
> + # Defines for default states. These can be changed on the command line.
> + # -D FLAG=VALUE
> + #
> + PLATFORM_NAME = LX2160aRdbPkg
> + PLATFORM_GUID = 60169ec4-d2b4-44f8-825e-f8684fd42e4f
This GUID is cloned from LS1043aRdbPkg.dsc, please generate a unique one.
> + OUTPUT_DIRECTORY = Build/LX2160aRdbPkg
> + FLASH_DEFINITION = Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> +
> +!include Silicon/NXP/NxpQoriqLs.dsc.inc
> +!include Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
> +!include Silicon/NXP/Chassis3V2/LX2160A/LX2160A.dsc.inc
> +
> +[LibraryClasses.common]
> + ArmPlatformLib|Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> + RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
> +
> +[PcdsFixedAtBuild.common]
> + #
> + # RTC Pcds
> + #
> +
> +################################################################################
> +#
> +# Components Section - list of all EDK II Modules needed by this Platform
> +#
> +################################################################################
> +[Components.common]
> + #
> + # Architectural Protocols
> + #
> + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
> + <PcdsFixedAtBuild>
> + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
> + }
> +
> + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> +
> + ##
> diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> new file mode 100644
> index 0000000000..ed7c39365c
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> @@ -0,0 +1,172 @@
> +# LX2160aRdbPkg.fdf
> +#
> +# FLASH layout file for LX2160aRdb board.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +################################################################################
> +#
> +# FD Section
> +# The [FD] Section is made up of the definition statements and a
> +# description of what goes into the Flash Device Image. Each FD section
> +# defines one flash "device" image. A flash device image may be one of
> +# the following: Removable media bootable image (like a boot floppy
> +# image,) an Option ROM image (that would be "flashed" into an add-in
> +# card,) a System "Flash" image (that would be burned into a system's
> +# flash) or an Update ("Capsule") image that will be used to update and
> +# existing system flash.
> +#
> +################################################################################
> +
> +[FD.LX2160ARDB_EFI]
> +BaseAddress = 0x82000000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the FLASH Device.
> +Size = 0x00100000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the FLASH Device
> +ErasePolarity = 1
> +BlockSize = 0x1
> +NumBlocks = 0x100000
> +
> +################################################################################
> +#
> +# Following are lists of FD Region layout which correspond to the locations of different
> +# images within the flash device.
> +#
> +# Regions must be defined in ascending order and may not overlap.
> +#
> +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
> +# the pipe "|" character, followed by the size of the region, also in hex with the leading
> +# "0x" characters. Like:
> +# Offset|Size
> +# PcdOffsetCName|PcdSizeCName
> +# RegionType <FV, DATA, or FILE>
> +#
> +################################################################################
> +0x00000000|0x00100000
> +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
> +FV = FVMAIN_COMPACT
> +
> +!include VarStore.fdf.inc
> +!include Platform/NXP/FVRules.fdf.inc
> +################################################################################
> +#
> +# FV Section
> +#
> +# [FV] section is used to define what components or modules are placed within a flash
> +# device file. This section also defines order the components and modules are positioned
> +# within the image. The [FV] section consists of define statements, set statements and
> +# module statements.
> +#
> +################################################################################
> +
> +[FV.FvMain]
> +FvNameGuid = 1037c42b-8452-4c41-aac7-41e6c31468da
This is cloned from LS1043aRdbPkg.fdf.
> +BlockSize = 0x1
> +NumBlocks = 0 # This FV gets compressed so make it just big enough
> +FvAlignment = 8 # FV alignment and FV attributes setting.
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + INF MdeModulePkg/Core/Dxe/DxeMain.inf
> + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> +
> + #
> + # PI DXE Drivers producing Architectural Protocols (EFI Services)
> + #
> + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +
> + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
> + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
> +
> + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> +
> + #
> + # Multiple Console IO support
> + #
> + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
> + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +
> + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
> +
> + #
> + # FAT filesystem + GPT/MBR partitioning
> + #
> + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> + INF FatPkg/FatPei/FatPei.inf
> + INF FatPkg/EnhancedFatDxe/Fat.inf
> +
> + #
> + # UEFI application (Shell Embedded Boot Loader)
> + #
> + INF ShellPkg/Application/Shell/Shell.inf
> +
> + #
> + # Bds
> + #
> + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> + INF MdeModulePkg/Application/UiApp/UiApp.inf
> +
> +[FV.FVMAIN_COMPACT]
> +FvAlignment = 8
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
> + INF MdeModulePkg/Core/Pei/PeiMain.inf
> + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
> + INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
> + INF ArmPkg/Drivers/CpuPei/CpuPei.inf
> + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
> + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> +
> + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> + SECTION FV_IMAGE = FVMAIN
> + }
> + }
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
> new file mode 100644
> index 0000000000..d1b9f1debb
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
> @@ -0,0 +1,46 @@
> +//
> +// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
> +//
> +// SPDX-License-Identifier: BSD-2-Clause-Patent
> +//
> +//
> +
> +#include <AsmMacroIoLibV8.h>
> +#include <Library/ArmLib.h>
> +
> +ASM_FUNC(ArmPlatformPeiBootAction)
> + ret
> +
> +//UINTN
> +//ArmPlatformGetCorePosition (
> +// IN UINTN MpId
> +// );
> +// With this function: CorePos = (ClusterId * 4) + CoreId
> +ASM_FUNC(ArmPlatformGetCorePosition)
> + and x1, x0, #ARM_CORE_MASK
> + and x0, x0, #ARM_CLUSTER_MASK
> + add x0, x1, x0, LSR #6
> + ret
> +
> +//UINTN
> +//ArmPlatformGetPrimaryCoreMpId (
> +// VOID
> +// );
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
> + ret
> +
> +//UINTN
> +//ArmPlatformIsPrimaryCore (
> +// IN UINTN MpId
> +// );
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> + and x0, x0, x1
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
> + cmp w0, w1
> + mov x0, #1
> + mov x1, #0
> + csel x0, x0, x1, eq
> + ret
> +
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> new file mode 100644
> index 0000000000..adcc3315dd
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> @@ -0,0 +1,168 @@
> +/** @file
> +*
> +* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
> +* Copyright 2020 NXP
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +#include <Soc.h>
> +#include <Library/ArmPlatformLib.h>
> +#include <Ppi/ArmMpCoreInfo.h>
Please sort includes alphabetically (grouped with the below).
> +
> +#include <Library/DebugLib.h>
> +#include <Library/I2cLib.h>
> +#include <Library/SocLib.h>
> +#include <Ppi/NxpPlatformGetClock.h>
> +
> +#include "ArmPlatformLibInternal.h"
> +
> +ARM_CORE_INFO mArmPlatformMpCoreInfoTable[] = {
> + {
> + // Cluster 0, Core 0
> + 0, 0,
> +
> + // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> + (EFI_PHYSICAL_ADDRESS)0,
> + (EFI_PHYSICAL_ADDRESS)0,
> + (EFI_PHYSICAL_ADDRESS)0,
> + (UINT64)0xFFFFFFFF
This defines only one core, right?
> + },
> +};
> +
> +/**
> + Get the clocks supplied by Platform(Board) to NXP Layerscape SOC
> +
> + The core can be of type ARM or PowerPC or Hardware Accelerator.
> + If the core is enabled and of type ARM EFI_SUCCESS is returned and a code for type of ARM core is returned
> +
> + @param[in] ClockType Type of clock
> + @param[in] ... Variable argument list which is parsed based on ClockType
> +
> + @return Actual Clock Frequency. return value 0 should be interpreted as clock not provided by Board.
> +**/
> +UINT64
> +EFIAPI
> +NxpPlatformGetClock(
> + IN UINT32 ClockType,
> + ...
> + )
> +{
> + UINT64 Clock;
> + EFI_STATUS Status;
> + VA_LIST Args;
> + UINT8 Reg;
> +
> + Clock = 0;
> +
> + VA_START (Args, ClockType);
> +
> + switch (ClockType) {
> + case NXP_SYSTEM_CLOCK:
> + Status = I2cBusReadReg (
> + LX2160A_I2C0_PHYS_ADDRESS, QIXIS_I2C_ADDRESS,
> + OFFSET_OF (QIXIS_LAYOUT, BoardConfig[1]),
> + 1, &Reg, sizeof (Reg)
> + );
> + ASSERT_EFI_ERROR (Status);
> + switch (Reg & 0x03) {
Need a #define for that 0x03.
> + case 0x00:
> + Clock = 100 * 1000 * 1000; // 100 MHz
> + break;
> + default:
> + ASSERT(0); // All other values are reserved
> + break;
> + }
> + break;
> + case NXP_I2C_CLOCK:
> + case NXP_UART_CLOCK:
> + Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK);
> + Clock = SocGetClock (Clock, ClockType, Args);
> + break;
> + default:
> + break;
> + }
> +
> + VA_END (Args);
> +
> + return Clock;
> +}
> +
> +/**
> + Return the current Boot Mode
> +
> + This function returns the boot reason on the platform
> +
> +**/
> +EFI_BOOT_MODE
> +ArmPlatformGetBootMode (
> + VOID
> + )
> +{
> + return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +/**
> + Initialize controllers that must setup in the normal world
> +
> + This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
> + in the PEI phase.
> +
> +**/
> +RETURN_STATUS
> +ArmPlatformInitialize (
> + IN UINTN MpId
> + )
> +{
> + UINT64 Clock;
> +
> + TimerConstructor ();
> +
> + I2cEarlyInitialize (LX2160A_I2C0_PHYS_ADDRESS);
> +
> + Clock = NxpPlatformGetClock (NXP_I2C_CLOCK, 0);
> +
> + // Set I2c Clock 100 KHz
> + I2cInitialize (LX2160A_I2C0_PHYS_ADDRESS, Clock, 100 * 1000);
> +
> + SocInit ();
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +PrePeiCoreGetMpCoreInfo (
> + OUT UINTN *CoreCount,
> + OUT ARM_CORE_INFO **ArmCoreTable
> + )
> +{
> + if (ArmIsMpCore()) {
> + *CoreCount = sizeof (mArmPlatformMpCoreInfoTable) / sizeof (ARM_CORE_INFO);
Use ARRAY_SIZE macro.
> + *ArmCoreTable = mArmPlatformMpCoreInfoTable;
> + return EFI_SUCCESS;
> + } else {
> + return EFI_UNSUPPORTED;
> + }
> +}
> +
> +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
> +NXP_PLATFORM_GET_CLOCK_PPI mPlatformGetClockPpi = { NxpPlatformGetClock };
> +
> +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
> + {
> + EFI_PEI_PPI_DESCRIPTOR_PPI,
> + &gArmMpCoreInfoPpiGuid,
> + &mMpCoreInfoPpi
> + }
> +};
> +
> +VOID
> +ArmPlatformGetPlatformPpiList (
> + OUT UINTN *PpiListSize,
> + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
> + )
> +{
> + *PpiListSize = sizeof (gPlatformPpiTable);
> + *PpiList = gPlatformPpiTable;
> +}
> +
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> new file mode 100644
> index 0000000000..24258e1502
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> @@ -0,0 +1,45 @@
> +#/* @file
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#*/
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = ArmPlatformLib
> + FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b
Cloned from LS1043aRdbPkg, which is cloned from BeagleBoardPkg.
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = ArmPlatformLib
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + Silicon/NXP/NxpQoriqLs.dec
> + Silicon/NXP/Chassis3V2/Chassis3V2.dec
> + Silicon/NXP/Chassis3V2/LX2160A/LX2160A.dec
> + Platform/NXP/NxpQoriqLsPlatform.dec
Sort alphabetically.
> +
> +[LibraryClasses]
> + ArmLib
> + SocLib
> + I2cLib
> + DebugLib
Sort alphabetically.
> +
> +[Sources.common]
> + ArmPlatformLib.c
> + ArmPlatformLibMem.c
> +
> +[Sources.AArch64]
> + AArch64/ArmPlatformHelper.S
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
> + gArmTokenSpaceGuid.PcdArmPrimaryCore
> +
> +[Ppis]
> + gArmMpCoreInfoPpiGuid
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibInternal.h b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibInternal.h
> new file mode 100644
> index 0000000000..fefbd273c8
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibInternal.h
> @@ -0,0 +1,26 @@
> +/** @file
> + Platform Specific data.
> +
> + Copyright 2020 NXP
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef __ARM_PLATFORM_LIB_INTERNAL_H__
> +#define __ARM_PLATFORM_LIB_INTERNAL_H__
Drop leading __.
> +
> +#include <Qixis.h>
This file does not appear to be used in this header, please move its
inclusion to files that actually use it.
/
Leif
> +
> +// This function should be better located into TimerLib implementation
> +RETURN_STATUS
> +EFIAPI
> +TimerConstructor (
> + VOID
> + );
> +
> +#define QIXIS_I2C_ADDRESS 0x66
> +
> +typedef QIXIS_MIN_LAYOUT QIXIS_LAYOUT;
> +
> +#endif
> +
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
> new file mode 100644
> index 0000000000..85bd7e6307
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
> @@ -0,0 +1,80 @@
> +/** @file
> +*
> +* Copyright 2020 NXP
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Soc.h>
> +
> +// Number of Virtual Memory Map Descriptors
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 10
> +
> +/**
> + Return the Virtual Memory Map of your platform
> +
> + This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
> +
> + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
> + Virtual Memory mapping. This array must be ended by a zero-filled
> + entry
> +
> +**/
> +VOID
> +ArmPlatformGetVirtualMemoryMap (
> + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
> + )
> +{
> + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
> + UINT32 Index;
> +
> + ASSERT (VirtualMemoryMap != NULL);
> +
> + VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
> + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
> +
> + if (VirtualMemoryTable == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__));
> + return;
> + }
> +
> + Index = 0;
> + // DRAM
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM0_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM0_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_DRAM0_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
> +
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM1_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM1_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_DRAM1_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
> +
> + // CCSR Space
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_CCSR_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_CCSR_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_CCSR_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> + // FlexSPI region
> + // TODO: check if we can change attributes for better performance
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_FLEXSPI_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_FLEXSPI_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_FLEXSPI_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> + // End of Table
> + VirtualMemoryTable[Index].PhysicalBase = 0;
> + VirtualMemoryTable[Index].VirtualBase = 0;
> + VirtualMemoryTable[Index].Length = 0;
> + VirtualMemoryTable[Index++].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
> +
> + ASSERT (Index < MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
> +
> + *VirtualMemoryMap = VirtualMemoryTable;
> +}
> diff --git a/Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc b/Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc
> new file mode 100644
> index 0000000000..215d73dd8f
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc
> @@ -0,0 +1,90 @@
> +## @file
> +# FDF include file with FD definition that defines an empty variable store.
> +#
> +# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
> +# Copyright (C) 2014, Red Hat, Inc.
> +# Copyright (c) 2016, Linaro, Ltd. All rights reserved.
> +# Copyright (c) 2016, Freescale Semiconductor. All rights reserved.
> +# Copyright 2017-2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +##
> +
> +[FD.LX2160ARDBNV_EFI]
> +
> +BaseAddress = 0x20500000
> +Size = 0x000C0000
> +ErasePolarity = 1
> +BlockSize = 0x1
> +NumBlocks = 0xC0000
> +
> +#
> +# Place NV Storage just above Platform Data Base
> +#
> +DEFINE NVRAM_AREA_VARIABLE_BASE = 0x00000000
> +DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x00040000
> +DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
> +DEFINE FTW_WORKING_SIZE = 0x00040000
> +DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
> +DEFINE FTW_SPARE_SIZE = 0x00040000
> +
> +#############################################################################
> +# LX2160ARDB NVRAM Area
> +# LX2160ARDB NVRAM Area contains: Variable + FTW Working + FTW Spare
> +#############################################################################
> +
> +$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
> +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
> +#NV_VARIABLE_STORE
> +DATA = {
> + ## This is the EFI_FIRMWARE_VOLUME_HEADER
> + # ZeroVector []
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + # FileSystemGuid: gEfiSystemNvDataFvGuid =
> + # { 0xFFF12B8D, 0x7696, 0x4C8B,
> + # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
> + 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
> + 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
> + # FvLength: Flash Size : 0x4000000
> + 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00,
> + # Signature "_FVH" # Attributes
> + 0x5f, 0x46, 0x56, 0x48, 0x36, 0x0E, 0x00, 0x00,
> + # HeaderLength # CheckSum # ExtHeaderOffset #Reserved #Revision
> + 0x48, 0x00, 0x08, 0xA6, 0x00, 0x00, 0x00, 0x02,
> + # Blockmap[0]: 0x4000 Blocks * 0x1000 Bytes / Block = SIZE_64MB
> + 0x00, 0x40, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
> + # Blockmap[1]: End
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + ## This is the VARIABLE_STORE_HEADER
> + # It is compatible with SECURE_BOOT_ENABLE == FALSE as well.
> + # Signature: gEfiVariableGuid =
> + # { 0xddcf3616, 0x3275, 0x4164,
> + # { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
> + 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
> + 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
> + # Size: 0x40000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) -
> + # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x3ffb8
> + # This can speed up the Variable Dispatch a bit.
> + 0xB8, 0xFF, 0x03, 0x00,
> + # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
> + 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> +}
> +
> +$(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
> +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
> +#NV_FTW_WORKING
> +DATA = {
> + # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
> + # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
> + 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
> + 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,
> + # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
> + 0x5b, 0xe7, 0xc6, 0x86, 0xFE, 0xFF, 0xFF, 0xFF,
> + # WriteQueueSize: UINT64
> + 0xE0, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00
> +}
> +
> +$(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
> +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
> +#NV_FTW_SPARE
> diff --git a/Platform/NXP/NxpQoriqLsPlatform.dec b/Platform/NXP/NxpQoriqLsPlatform.dec
> new file mode 100644
> index 0000000000..106b118188
> --- /dev/null
> +++ b/Platform/NXP/NxpQoriqLsPlatform.dec
> @@ -0,0 +1,23 @@
> +#/** @file
> +# NXP Layerscape processor package.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#**/
> +
> +[Defines]
> + DEC_SPECIFICATION = 1.27
> + PACKAGE_VERSION = 0.1
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +# Comments are used for Keywords and Module Types.
> +#
> +#
> +################################################################################
> +[Includes.common]
> + Include # Root include for the package
> +
> --
> 2.17.1
>
prev parent reply other threads:[~2020-02-12 21:36 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-07 12:43 [PATCH 00/19] ADD LX2160ARDB Platform Support Pankaj Bansal
2020-02-07 12:43 ` [PATCH 01/19] Silicon/NXP: Add I2c lib Pankaj Bansal
2020-02-08 17:13 ` Leif Lindholm
2020-02-09 11:49 ` [edk2-devel] " Ard Biesheuvel
2020-02-07 12:43 ` [PATCH 02/19] Silicon/NXP: changes to use I2clib in i2cdxe Pankaj Bansal
2020-02-08 17:23 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 03/19] NXP/LS1043aRdb: Move Soc specific components to soc files Pankaj Bansal
2020-02-08 17:27 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 04/19] Silicon/NXP: Remove DuartLib and use BaseSerialPortLib16550 Pankaj Bansal
2020-02-08 17:46 ` Leif Lindholm
2020-02-10 5:48 ` Pankaj Bansal
2020-02-12 23:27 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 05/19] NXP/BaseSerialPortLib16550: remove SerialPortInitalize functionality Pankaj Bansal
2020-02-07 12:43 ` [PATCH 06/19] Silicon/NXP: remove print information from Soc lib Pankaj Bansal
2020-02-10 17:09 ` [EXTERNAL] " Leif Lindholm
2020-02-07 12:43 ` [PATCH 07/19] Silicon/NXP: remove not needed components Pankaj Bansal
2020-02-10 17:11 ` Leif Lindholm
2020-02-11 7:24 ` Pankaj Bansal
2020-02-20 19:05 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 08/19] Silicon/NXP: Remove unnecessary PCDs Pankaj Bansal
2020-02-10 17:32 ` Leif Lindholm
2020-02-11 8:45 ` Pankaj Bansal
2020-02-20 18:56 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 09/19] Silicon/NXP: Move dsc file Pankaj Bansal
2020-02-11 11:35 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 10/19] Platform/NXP: rename the ArmPlatformLib as per ArmPlatformPkg Pankaj Bansal
2020-02-11 11:40 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 11/19] Silicon/NXP: Add Chassis Lib for Chassis2 Pankaj Bansal
2020-02-11 12:28 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 12/19] Silicon/NXP/LS1043A: Add SocLib Pankaj Bansal
2020-02-11 12:38 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 13/19] Silicon/NXP: Move RAM retrieval from SocLib Pankaj Bansal
2020-02-11 13:28 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 14/19] Silicon/NXP/LS1043A: Replce SocLib Pankaj Bansal
2020-02-11 13:35 ` Leif Lindholm
2020-02-12 9:37 ` Pankaj Bansal
2020-02-12 22:50 ` Leif Lindholm
2020-02-13 11:00 ` Pankaj Bansal
2020-02-20 18:45 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 15/19] Platform/NXP/LS1043ARDB: introduce PEI Phase Pankaj Bansal
2020-02-12 20:24 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 16/19] Silicon/NXP: Add Pl011 Serial port lib Pankaj Bansal
2020-02-12 20:26 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 17/19] Silicon/NXP: Add Chassis3V2 Pankaj Bansal
2020-02-12 20:33 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 18/19] Silicon/NXP: Add LX2160A SocLib Pankaj Bansal
2020-02-12 21:39 ` Leif Lindholm
2020-02-07 12:43 ` [PATCH 19/19] Platform/NXP: Add LX2160ARDBPKG Pankaj Bansal
2020-02-12 21:36 ` Leif Lindholm [this message]
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