From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by mx.groups.io with SMTP id smtpd.web10.7830.1582722851079983595 for ; Wed, 26 Feb 2020 05:14:11 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=MRHAC6iO; spf=pass (domain: linaro.org, ip: 209.85.128.65, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wm1-f65.google.com with SMTP id q9so3002073wmj.5 for ; Wed, 26 Feb 2020 05:14:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=j9Lf5E7gk9UP8d5P3FF3ca54OJhG/tbfi2x9TBr9Qdk=; b=MRHAC6iO8opMaVMAdkgwJn5UHgLvLw1r1XrIPNErIZaZPRwBqQhN+Z8F1JxE+X8CV4 xzbf2FJPie1JnnrzcByV02CXZsrDx297XavsCJCKBgk57F993Ezpwj+SnKwnQjq5eqbe 5dweacpO9S7miZRegnNc/a4nJTmW7k+tqXEnnhh+tUI06do5M1j2pY7G28breTY3Xm1d 0vgw8SyR7a1BR/2FMyf5GRnf9bN2JxYpbM7uGWqaoF52u9QaVwIk7gWtgg6U+AUfONJV iOrs0NVbF/9G5jeSO5yqmfUlyB1B7YH2Cee+bopuqjI1L93kZQO8lPW73hqLlMcdMeei jOpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j9Lf5E7gk9UP8d5P3FF3ca54OJhG/tbfi2x9TBr9Qdk=; b=hnbiXfTIKuwbG+5o0eBvzozYg2vN7zUru4yGvRrbt4Fpm+slP/d4eLPb34VPWArEcS AoW4iRnbxJj23G+RFRnVGgIbdzKrci5jKOOhphA/mL+/i+ByKlUMNOPKasu3zs/4lBAK triaQ8C+WeF8tldMHsuYyWWQvQZ9HCQUCPCnlVnlrDRkkz935D9TaMlq1dB1tfbgaJH1 Q85KR29b3dmPl1sfxJ3dmWQ7fw3hzFpUy/vwhGc2wPlWQJDkLW/RElmEFueSojV/0sff zYGdDXL+W6+G49ax276AjRZ0G90Lu4X0Xc6nruR1+alIb/wXsCWhQchkHYrNMC5URnsM egKA== X-Gm-Message-State: APjAAAUL4MpvIP91LMKy+M57yB4g9GsuM1VjZ52kTWYL8o/hfsXPixx9 YG/A61RWku/frkRQReh4H7GJqP9O/Cldjw== X-Google-Smtp-Source: APXvYqxOiW0xpQ8/LpD/8dPLSlIDE62ngBOqKjipIYdePR1omK4r75teRcU9J7iAZpqRbSlO3kIiqw== X-Received: by 2002:a1c:b457:: with SMTP id d84mr5710675wmf.172.1582722849292; Wed, 26 Feb 2020 05:14:09 -0800 (PST) Return-Path: Received: from e123331-lin.home ([2a01:cb1d:112:6f00:816e:ff0d:fb69:f613]) by smtp.gmail.com with ESMTPSA id s8sm3321690wrt.57.2020.02.26.05.14.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2020 05:14:08 -0800 (PST) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif@nuviainc.com, Ard Biesheuvel Subject: [PATCH 3/3] ArmPkg/ArmLib: ASSERT on set/way cache ops being used with MMU on Date: Wed, 26 Feb 2020 14:14:02 +0100 Message-Id: <20200226131402.30317-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200226131402.30317-1-ard.biesheuvel@linaro.org> References: <20200226131402.30317-1-ard.biesheuvel@linaro.org> On ARMv7 and up, doing cache maintenance by set/way is only permitted in the context of on/offlining a core, and any other uses should be avoided. Add ASSERT()s in the right place to ensure that any uses with the MMU enabled are caught in DEBUG builds. Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 7 +++++++ ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 7 +++++++ ArmPkg/Library/ArmLib/ArmBaseLib.inf | 3 +++ 3 files changed, 17 insertions(+) diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index 924bf48020e0..3fbd591192e2 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -10,6 +10,7 @@ #include #include +#include #include @@ -41,6 +42,8 @@ ArmInvalidateDataCache ( VOID ) { + ASSERT (!ArmMmuEnabled ()); + ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay); } @@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache ( VOID ) { + ASSERT (!ArmMmuEnabled ()); + ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay); } @@ -61,6 +66,8 @@ ArmCleanDataCache ( VOID ) { + ASSERT (!ArmMmuEnabled ()); + ArmDataSynchronizationBarrier (); AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } diff --git a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c index 5d93aa6e0b8c..2c4a23e1a1b2 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c @@ -10,6 +10,7 @@ #include #include +#include #include @@ -41,6 +42,8 @@ ArmInvalidateDataCache ( VOID ) { + ASSERT (!ArmMmuEnabled ()); + ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay); } @@ -51,6 +54,8 @@ ArmCleanInvalidateDataCache ( VOID ) { + ASSERT (!ArmMmuEnabled ()); + ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay); } @@ -61,6 +66,8 @@ ArmCleanDataCache ( VOID ) { + ASSERT (!ArmMmuEnabled ()); + ArmDataSynchronizationBarrier (); ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay); } diff --git a/ArmPkg/Library/ArmLib/ArmBaseLib.inf b/ArmPkg/Library/ArmLib/ArmBaseLib.inf index 106a09f821e1..f61c71b673d1 100644 --- a/ArmPkg/Library/ArmLib/ArmBaseLib.inf +++ b/ArmPkg/Library/ArmLib/ArmBaseLib.inf @@ -44,6 +44,9 @@ [Sources.AARCH64] AArch64/AArch64Support.S AArch64/AArch64ArchTimerSupport.S +[LibraryClasses] + DebugLib + [Packages] ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec -- 2.17.1