From: "Pete Batard" <pete@akeo.ie>
To: devel@edk2.groups.io
Cc: ard.biesheuvel@linaro.org, leif@nuviainc.com, philmd@redhat.com
Subject: [edk2-platforms][PATCH 14/15] Platform/RPi3: Merge ACPI code from RPi4
Date: Fri, 28 Feb 2020 10:38:54 +0000 [thread overview]
Message-ID: <20200228103855.11352-15-pete@akeo.ie> (raw)
In-Reply-To: <20200228103855.11352-1-pete@akeo.ie>
This basically copies all of the RPi4 platform ACPI source into RPi3
since the last commit updates the code to serve both platforms.
No alteration of original ACPI source files were applied.
Whereas this commit is pretty much superfluous (apart from the .dsc
changes), since these files will be removed in the next commit, we apply
it nonetheless so that the minimal alterations to the existing Raspberry
3 tables are made apparent.
Signed-off-by: Pete Batard <pete@akeo.ie>
---
Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.h | 88 +++++++++----
Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.inf | 11 +-
Platform/RaspberryPi/RPi3/AcpiTables/Csrt.aslc | 28 ++--
Platform/RaspberryPi/RPi3/AcpiTables/Dbg2.aslc | 2 +-
Platform/RaspberryPi/RPi3/AcpiTables/Dsdt.asl | 35 +++++
Platform/RaspberryPi/RPi3/AcpiTables/Gtdt.aslc | 1 -
Platform/RaspberryPi/RPi3/AcpiTables/Madt.aslc | 22 +++-
Platform/RaspberryPi/RPi3/AcpiTables/Pep.asl | 5 +-
Platform/RaspberryPi/RPi3/AcpiTables/Pep.c | 7 +-
Platform/RaspberryPi/RPi3/AcpiTables/Pep.h | 9 +-
Platform/RaspberryPi/RPi3/AcpiTables/Spcr.aslc | 3 +-
Platform/RaspberryPi/RPi3/AcpiTables/Uart.asl | 2 +-
Platform/RaspberryPi/RPi3/AcpiTables/Xhci.asl | 136 ++++++++++++++++++++
Platform/RaspberryPi/RPi3/RPi3.dsc | 4 +
14 files changed, 300 insertions(+), 53 deletions(-)
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.h
index be97fc4c1eff..0b8a8494450c 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.h
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.h
@@ -1,7 +1,8 @@
/** @file
*
- * RPi3 defines for constructing ACPI tables
+ * RPi defines for constructing ACPI tables
*
+ * Copyright (c) 2020, Pete Batard <pete@akeo.ie>
* Copyright (c) 2019, ARM Ltd. All rights reserved.
* Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
@@ -23,11 +24,15 @@
CreateDwordField (^BufName, ^MemName._BAS, VarName) \
Add (BCM2836_SOC_REGISTERS, Offset, VarName)
-#define EFI_ACPI_OEM_ID {'B','C','2','8','3','6'} // OEMID 6 bytes long
-#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','3','E','D','K','2') // OEM table id 8 bytes long
-#define EFI_ACPI_OEM_REVISION 0x02000820
-#define EFI_ACPI_CREATOR_ID SIGNATURE_32 ('R','P','I','3')
-#define EFI_ACPI_CREATOR_REVISION 0x00000097
+#if (RPI_MODEL == 3)
+#define EFI_ACPI_OEM_ID {'B','C','2','8','3','6'}
+#else
+#define EFI_ACPI_OEM_ID {'M','C','R','S','F','T'}
+#endif
+#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','_','E','D','K','2')
+#define EFI_ACPI_OEM_REVISION 0x00000100
+#define EFI_ACPI_CREATOR_ID SIGNATURE_32 ('E','D','K','2')
+#define EFI_ACPI_CREATOR_REVISION 0x00000100
#define EFI_ACPI_VENDOR_ID SIGNATURE_32 ('M','S','F','T')
@@ -49,8 +54,14 @@
#define EFI_ACPI_CSRT_DEVICE_ID_DMA 0x00000009 // Fixed id
#define EFI_ACPI_CSRT_RESOURCE_ID_IN_DMA_GRP 0x0 // Count up from 0
-#define RPI3_DMA_CHANNEL_COUNT 10 // All 10 DMA channels are listed, including the reserved ones
-#define RPI3_DMA_USED_CHANNEL_COUNT 5 // Use 5 DMA channels
+#define RPI_DMA_CHANNEL_COUNT 10 // All 10 DMA channels are listed, including the reserved ones
+#define RPI_DMA_USED_CHANNEL_COUNT 5 // Use 5 DMA channels
+
+#if (RPI_MODEL == 3)
+#define RPI_SYSTEM_TIMER_BASE_ADDRESS 0x4000001C
+#elif (RPI_MODEL == 4)
+#define RPI_SYSTEM_TIMER_BASE_ADDRESS 0xFF80001C
+#endif
#define EFI_ACPI_5_1_CSRT_REVISION 0x00000000
@@ -100,27 +111,54 @@ typedef struct
//------------------------------------------------------------------------
// Interrupts. These are specific to each platform
//------------------------------------------------------------------------
+#if (RPI_MODEL == 3)
+#define BCM2836_V3D_BUS_INTERRUPT 0x2A
+#define BCM2836_DMA_INTERRUPT 0x3B
+#define BCM2836_SPI1_INTERRUPT 0x3D
+#define BCM2836_SPI2_INTERRUPT 0x3D
+#define BCM2836_HVS_INTERRUPT 0x41
+#define BCM2836_HDMI0_INTERRUPT 0x48
+#define BCM2836_HDMI1_INTERRUPT 0x49
+#define BCM2836_PV2_INTERRUPT 0x4A
+#define BCM2836_PV0_INTERRUPT 0x4D
+#define BCM2836_PV1_INTERRUPT 0x4E
+#define BCM2836_MBOX_INTERRUPT 0x61
+#define BCM2836_VCHIQ_INTERRUPT 0x62
+#define BCM2386_GPIO_INTERRUPT0 0x51
+#define BCM2386_GPIO_INTERRUPT1 0x53
+#define BCM2836_I2C1_INTERRUPT 0x55
+#define BCM2836_I2C2_INTERRUPT 0x55
+#define BCM2836_SPI0_INTERRUPT 0x56
#define BCM2836_USB_INTERRUPT 0x29
-#define BCM2836_V3D_BUS_INTERRUPT 0x2A
-#define BCM2836_DMA_INTERRUPT 0x3B
-#define BCM2836_SPI1_INTERRUPT 0x3D
-#define BCM2836_SPI2_INTERRUPT 0x3D
-#define BCM2836_HVS_INTERRUPT 0x41
-#define BCM2836_HDMI0_INTERRUPT 0x48
-#define BCM2836_HDMI1_INTERRUPT 0x49
-#define BCM2836_PV2_INTERRUPT 0x4A
-#define BCM2836_PV0_INTERRUPT 0x4D
-#define BCM2836_PV1_INTERRUPT 0x4E
-#define BCM2836_MBOX_INTERRUPT 0x61
-#define BCM2836_VCHIQ_INTERRUPT 0x62
-#define BCM2386_GPIO_INTERRUPT0 0x51
-#define BCM2386_GPIO_INTERRUPT1 0x53
-#define BCM2836_I2C1_INTERRUPT 0x55
-#define BCM2836_I2C2_INTERRUPT 0x55
-#define BCM2836_SPI0_INTERRUPT 0x56
#define BCM2836_SDHOST_INTERRUPT 0x58
#define BCM2836_MMCHS1_INTERRUPT 0x5E
#define BCM2836_MINI_UART_INTERRUPT 0x3D
#define BCM2836_PL011_UART_INTERRUPT 0x59
+#elif (RPI_MODEL == 4)
+#define BCM2836_V3D_BUS_INTERRUPT 0x2A
+#define BCM2836_DMA_INTERRUPT 0x3B
+#define BCM2836_SPI1_INTERRUPT 0x3D
+#define BCM2836_SPI2_INTERRUPT 0x3D
+#define BCM2836_HVS_INTERRUPT 0x41
+#define BCM2836_HDMI0_INTERRUPT 0x48
+#define BCM2836_HDMI1_INTERRUPT 0x49
+#define BCM2836_PV2_INTERRUPT 0x4A
+#define BCM2836_PV0_INTERRUPT 0x4D
+#define BCM2836_PV1_INTERRUPT 0x4E
+#define BCM2836_MBOX_INTERRUPT 0x61
+#define BCM2836_VCHIQ_INTERRUPT 0x62
+#define BCM2386_GPIO_INTERRUPT0 0x51
+#define BCM2386_GPIO_INTERRUPT1 0x53
+#define BCM2836_I2C1_INTERRUPT 0x55
+#define BCM2836_I2C2_INTERRUPT 0x55
+#define BCM2836_SPI0_INTERRUPT 0x56
+#define BCM2836_USB_INTERRUPT 0x69
+#define BCM2836_SDHOST_INTERRUPT 0x98
+#define BCM2836_MMCHS1_INTERRUPT 0x9E
+#define BCM2836_MINI_UART_INTERRUPT 0x7D
+#define BCM2836_PL011_UART_INTERRUPT 0x99
+#define GENET_INTERRUPT0 0xBD
+#define GENET_INTERRUPT1 0xBE
+#endif
#endif // __ACPITABLES_H__
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.inf b/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.inf
index 9363660b0ef7..c95d75ed01bb 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.inf
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/AcpiTables.inf
@@ -2,6 +2,7 @@
#
# ACPI table data and ASL sources required to boot the platform.
#
+# Copyright (c) 2019, ARM Limited. All rights reserved.
# Copyright (c) 2017, Andrey Warkentin <andrey.warkentin@gmail.com>
# Copyright (c) Microsoft Corporation. All rights reserved.
#
@@ -35,15 +36,23 @@ [Sources]
[Packages]
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
- MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
Silicon/Broadcom/Bcm283x/Bcm283x.dec
+ Silicon/Broadcom/Drivers/Net/BcmNet.dec
[FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
+ gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress
+ gBcmNetTokenSpaceGuid.PcdBcmGenetRegistersAddress
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Csrt.aslc b/Platform/RaspberryPi/RPi3/AcpiTables/Csrt.aslc
index 0a8393a8076b..03d888fffb8b 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Csrt.aslc
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Csrt.aslc
@@ -2,22 +2,24 @@
*
* Core System Resource Table (CSRT)
*
+ * Copyright (c) 2019, ARM Ltd. All rights reserved.
* Copyright (c) Microsoft Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
+#include <IndustryStandard/Acpi.h>
#include <IndustryStandard/Bcm2836.h>
#include "AcpiTables.h"
-#define DMA_MAX_REQ_LINES 32
+#define RPI_DMA_MAX_REQ_LINES 32
#pragma pack (push, 1)
//------------------------------------------------------------------------
-// DMA Controller Vendor Data for RPi3
+// DMA Controller Vendor Data
//------------------------------------------------------------------------
typedef struct
{
@@ -35,7 +37,7 @@ typedef struct
} DMA_CONTROLLER_VENDOR_DATA;
//------------------------------------------------------------------------
-// DMA Controller on RPi3
+// DMA Controller
//------------------------------------------------------------------------
typedef struct
{
@@ -44,7 +46,7 @@ typedef struct
} RD_DMA_CONTROLLER;
//------------------------------------------------------------------------
-// DMA Channel Vendor Data for RPi3
+// DMA Channel Vendor Data
//------------------------------------------------------------------------
typedef struct
{
@@ -55,7 +57,7 @@ typedef struct
} DMA_CHANNEL_VENDOR_DATA;
//------------------------------------------------------------------------
-// DMA Channel on RPi3
+// DMA Channel
//------------------------------------------------------------------------
typedef struct
{
@@ -64,18 +66,18 @@ typedef struct
} RD_DMA_CHANNEL;
//------------------------------------------------------------------------
-// DMA Resource Group on RPi3
+// DMA Resource Group
//------------------------------------------------------------------------
typedef struct
{
EFI_ACPI_5_1_CSRT_RESOURCE_GROUP_HEADER ResGroupHeader;
RD_DMA_CONTROLLER DmaController;
- RD_DMA_CHANNEL DmaChannels[RPI3_DMA_CHANNEL_COUNT];
+ RD_DMA_CHANNEL DmaChannels[RPI_DMA_CHANNEL_COUNT];
} RG_DMA;
//----------------------------------------------------------------------------
-// CSRT table structure for RPi3 platform - current revision only includes DMA
+// CSRT table structure - current revision only includes DMA
//----------------------------------------------------------------------------
typedef struct
{
@@ -97,8 +99,8 @@ EFI_ACPI_5_1_CSRT_TABLE Csrt =
sizeof (EFI_ACPI_DESCRIPTION_HEADER) + sizeof (RG_DMA), // Length
EFI_ACPI_5_1_CSRT_REVISION, // Revision
0x00, // Checksum calculated at runtime.
- EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field "BC2836"
- EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) "RPI3EDK2"
+ EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field
+ EFI_ACPI_OEM_TABLE_ID, // OEM table identification (8 bytes long)
EFI_ACPI_OEM_REVISION, // OEM revision number.
EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID.
EFI_ACPI_CREATOR_REVISION // ASL compiler revision number.
@@ -137,13 +139,13 @@ EFI_ACPI_5_1_CSRT_TABLE Csrt =
sizeof (DMA_CONTROLLER_VENDOR_DATA), // Controller vendor data here
1,
BCM2836_DMA0_BASE_ADDRESS, // Base address for channels
- RPI3_DMA_CHANNEL_COUNT * BCM2836_DMA_CHANNEL_LENGTH, // Base size = Number of channels x channel size
+ RPI_DMA_CHANNEL_COUNT * BCM2836_DMA_CHANNEL_LENGTH, // Base size = Number of channels x channel size
BCM2836_DMA_CTRL_BASE_ADDRESS,// Base address for controller
8, // Base size = two registers
- RPI3_DMA_USED_CHANNEL_COUNT,
+ RPI_DMA_USED_CHANNEL_COUNT,
0, // cannot use controller interrupt
0, // Minimum Request Line
- DMA_MAX_REQ_LINES - 1, // Maximum Request Line
+ RPI_DMA_MAX_REQ_LINES - 1, // Maximum Request Line
FALSE,
},
},
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Dbg2.aslc b/Platform/RaspberryPi/RPi3/AcpiTables/Dbg2.aslc
index dcad8e205596..c3d5994f8e97 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Dbg2.aslc
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Dbg2.aslc
@@ -23,7 +23,7 @@
#define RPI_DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1
#define RPI_DBG2_NAMESPACESTRING_FIELD_SIZE 10
-#ifdef PL011_ENABLE
+#if (RPI_MODEL == 4)
#define RPI_UART_INTERFACE_TYPE EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART
#define RPI_UART_BASE_ADDRESS BCM2836_PL011_UART_BASE_ADDRESS
#define RPI_UART_LENGTH BCM2836_PL011_UART_LENGTH
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi3/AcpiTables/Dsdt.asl
index 1e17ec901042..c2775088b5a2 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Dsdt.asl
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Dsdt.asl
@@ -10,6 +10,7 @@
*
**/
+#include <BcmGenetDxe/Genet.h>
#include <IndustryStandard/Bcm2836.h>
#include <IndustryStandard/Bcm2836Gpio.h>
#include <IndustryStandard/Bcm2836Gpu.h>
@@ -30,6 +31,9 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
{
include ("Sdhc.asl")
include ("Pep.asl")
+#if (RPI_MODEL == 4)
+ include ("Xhci.asl")
+#endif
Device (CPU0)
{
@@ -284,6 +288,37 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
}
}
+#if (RPI_MODEL == 4)
+ Device (ETH0)
+ {
+ Name (_HID, "BCM6E4E")
+ Name (_CID, "BCM6E4E")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+ Method (_STA)
+ {
+ Return (0xf)
+ }
+ Method (_CRS, 0x0, Serialized)
+ {
+ Name (RBUF, ResourceTemplate ()
+ {
+ // No need for MEMORY32SETBASE on Genet as we have a straight base address constant
+ MEMORY32FIXED (ReadWrite, GENET_BASE_ADDRESS, GENET_LENGTH, )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { GENET_INTERRUPT0, GENET_INTERRUPT1 }
+ })
+ Return (RBUF)
+ }
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "brcm,max-dma-burst-size", 0x08 },
+ Package () { "phy-mode", "rgmii-rxid" },
+ }
+ })
+ }
+#endif
+
// Description: I2C
Device (I2C1)
{
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Gtdt.aslc b/Platform/RaspberryPi/RPi3/AcpiTables/Gtdt.aslc
index 0cd6be8cadaa..8453e487fb63 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Gtdt.aslc
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Gtdt.aslc
@@ -14,7 +14,6 @@
#include "AcpiTables.h"
-#define RPI_SYSTEM_TIMER_BASE_ADDRESS 0x4000001C
#define RPI_GTDT_GLOBAL_FLAGS 0
#define RPI_GTDT_GTIMER_FLAGS EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Madt.aslc b/Platform/RaspberryPi/RPi3/AcpiTables/Madt.aslc
index a42ddb8954df..4029cd191ab5 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Madt.aslc
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Madt.aslc
@@ -23,7 +23,9 @@
typedef struct {
EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
EFI_ACPI_5_1_GIC_STRUCTURE GicInterfaces[4];
- // Do *NOT* add a GIC Distributor on the Pi 3 or Windows 10 won't boot!
+#if (RPI_MODEL != 3)
+ EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+#endif
} PI_MULTIPLE_APIC_DESCRIPTION_TABLE;
#pragma pack ()
@@ -42,6 +44,7 @@ PI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
0, // Flags
},
{
+#if (RPI_MODEL == 3)
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
0, 0, GET_MPID(0, 0), EFI_ACPI_5_1_GIC_ENABLED, 0x09, 0x40000000, 0, 0, 0, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
@@ -50,7 +53,24 @@ PI_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
2, 2, GET_MPID(0, 2), EFI_ACPI_5_1_GIC_ENABLED, 0x09, 0x40000000, 0, 0, 0, 0),
EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
3, 3, GET_MPID(0, 3), EFI_ACPI_5_1_GIC_ENABLED, 0x09, 0x40000000, 0, 0, 0, 0),
+#elif (RPI_MODEL == 4)
+ EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
+ 0, 0, GET_MPID(0, 0), EFI_ACPI_5_1_GIC_ENABLED, 48, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 0xFF846000, 0xFF844000, 0x19, 0),
+ EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
+ 1, 1, GET_MPID(0, 1), EFI_ACPI_5_1_GIC_ENABLED, 49, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 0xFF846000, 0xFF844000, 0x19, 0),
+ EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
+ 2, 2, GET_MPID(0, 2), EFI_ACPI_5_1_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 0xFF846000, 0xFF844000, 0x19, 0),
+ EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
+ 3, 3, GET_MPID(0, 3), EFI_ACPI_5_1_GIC_ENABLED, 51, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
+ 0xFF846000, 0xFF844000, 0x19, 0),
+#endif
},
+#if (RPI_MODEL != 3)
+ EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0)
+#endif
};
//
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Pep.asl b/Platform/RaspberryPi/RPi3/AcpiTables/Pep.asl
index 2ddb27bcdbb3..8a0a44e1c4c9 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Pep.asl
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Pep.asl
@@ -2,6 +2,7 @@
*
* Platform Extension Plugin (PEP).
*
+ * Copyright (c) 2019, ARM Ltd. All rights reserved.
* Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
*
@@ -12,9 +13,9 @@
Device(PEPD)
{
//
- // RPI3 PEP virtual device.
+ // PEP virtual device.
//
- Name (_HID, "BCM2854") // Note: since pep on rpi3 is virtual device,
+ Name (_HID, "BCM2854") // Note: Since PEP on RPi is a virtual device,
Name (_CID, "BCM2854") // its device id needs to be generated by Microsoft
Name (_UID, 0x0)
Name (_CRS, ResourceTemplate ()
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Pep.c b/Platform/RaspberryPi/RPi3/AcpiTables/Pep.c
index 51db779d7976..f452580c703d 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Pep.c
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Pep.c
@@ -2,6 +2,7 @@
*
* PEP device tables
*
+ * Copyright (c) 2019, ARM Ltd. All rights reserved.
* Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
*
@@ -11,7 +12,7 @@
#include "Pep.h"
-PEP_PROCESSOR_TABLE_PLAT RPI3Processors = {
+PEP_PROCESSOR_TABLE_PLAT RpiProcessors = {
1, // Version
1, // NumberProcessors
{ // ProcessorInfo
@@ -29,7 +30,7 @@ PEP_PROCESSOR_TABLE_PLAT RPI3Processors = {
}
};
-PEP_COORDINATED_STATE_TABLE_PLAT RPI3CoordinatedStates = {
+PEP_COORDINATED_STATE_TABLE_PLAT RpiCoordinatedStates = {
1, // Version
1, // CoordinatedStateCount
{ // CordinatedStates[]
@@ -51,7 +52,7 @@ PEP_COORDINATED_STATE_TABLE_PLAT RPI3CoordinatedStates = {
}
};
-PEP_DEVICE_TABLE_PLAT RPI3Devices = {
+PEP_DEVICE_TABLE_PLAT RpiDevices = {
1, // Version
1, // NumberDevices
{ // DeviceInfo
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Pep.h b/Platform/RaspberryPi/RPi3/AcpiTables/Pep.h
index f5f04518dec6..30f6768f12a5 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Pep.h
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Pep.h
@@ -2,6 +2,7 @@
*
* PEP device defines
*
+ * Copyright (c) 2019, ARM Ltd. All rights reserved.
* Copyright (c) 2018, Andrei Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
*
@@ -13,10 +14,10 @@
* Note: Not everything is here. At least SOC_STATE_TYPE is missing.
*/
-#ifndef _RPI3PEP_H_INCLUDED_
-#define _RPI3PEP_H_INCLUDED_
+#ifndef _RPI_PEP_H_INCLUDED_
+#define _RPI_PEP_H_INCLUDED_
-#include <IndustryStandard/Acpi50.h>
+#include <IndustryStandard/Acpi.h>
#define PEP_MAX_DEPENDENCIES_PER_STATE 16
#define MAX_PROCESSOR_PATH_LENGTH 16
@@ -117,4 +118,4 @@ typedef struct _PEP_DEVICE_TABLE_PLAT {
PEP_DEVICE_INFO_PLAT DeviceInfo[P_NUMBER_DEVICES];
} PEP_DEVICE_TABLE_PLAT, *PPEP_DEVICE_TABLE_PLAT;
-#endif // _RPI3PEP_H_INCLUDED_
+#endif // _RPI_PEP_H_INCLUDED_
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Spcr.aslc b/Platform/RaspberryPi/RPi3/AcpiTables/Spcr.aslc
index cb17fbe0ff2f..bec4ad660ec9 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Spcr.aslc
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Spcr.aslc
@@ -18,7 +18,8 @@
#define RPI_UART_FLOW_CONTROL_NONE 0
-#ifdef PL011_ENABLE
+// Prefer PL011 serial output on the Raspberry Pi 4
+#if (RPI_MODEL == 4)
#define RPI_UART_INTERFACE_TYPE EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
#define RPI_UART_BASE_ADDRESS BCM2836_PL011_UART_BASE_ADDRESS
#define RPI_UART_INTERRUPT BCM2836_PL011_UART_INTERRUPT
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Uart.asl b/Platform/RaspberryPi/RPi3/AcpiTables/Uart.asl
index edd8bcc3b376..c466247bb33b 100644
--- a/Platform/RaspberryPi/RPi3/AcpiTables/Uart.asl
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Uart.asl
@@ -140,7 +140,7 @@ Device(BTH0)
// no flow control.
16, // ReceiveBufferSize
16, // TransmitBufferSize
-#ifdef PL011_ENABLE
+#if (RPI_MODEL == 4)
"\\_SB.URTM", // ResourceSource:
#else
"\\_SB.URT0", // ResourceSource:
diff --git a/Platform/RaspberryPi/RPi3/AcpiTables/Xhci.asl b/Platform/RaspberryPi/RPi3/AcpiTables/Xhci.asl
new file mode 100644
index 000000000000..0083d1992936
--- /dev/null
+++ b/Platform/RaspberryPi/RPi3/AcpiTables/Xhci.asl
@@ -0,0 +1,136 @@
+/** @file
+ *
+ * Copyright (c) 2019 Linaro, Limited. All rights reserved.
+ * Copyright (c) 2019 Andrei Warkentin <andrey.warkentin@gmail.com>
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ *
+ **/
+
+#include <IndustryStandard/Bcm2711.h>
+
+/*
+ * The following can be used to remove parenthesis from
+ * defined macros that the compiler complains about.
+ */
+#define ISOLATE_ARGS(...) __VA_ARGS__
+#define REMOVE_PARENTHESES(x) ISOLATE_ARGS x
+
+#define SANITIZED_PCIE_CPU_MMIO_WINDOW REMOVE_PARENTHESES(PCIE_CPU_MMIO_WINDOW)
+#define SANITIZED_PCIE_REG_BASE REMOVE_PARENTHESES(PCIE_REG_BASE)
+
+/*
+ * According to UEFI boot log for the VLI device on Pi 4.
+ */
+#define XHCI_REG_LENGTH 0x1000
+
+Device (SCB0) {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x0)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ /*
+ * Container devices with _DMA must have _CRS, meaning SCB0
+ * to provide all resources that XHC0 consumes (except
+ * interrupts).
+ */
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory (ResourceProducer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
+ 0x0,
+ 0x1, // LEN
+ ,
+ ,
+ MMIO
+ )
+ })
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
+ Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
+ Return (RBUF)
+ }
+
+ Name (_DMA, ResourceTemplate() {
+ /*
+ * XHC0 is limited to DMA to first 3GB. Note this
+ * only applies to PCIe, not GENET or other devices
+ * next to the A72.
+ */
+ QWordMemory (ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x0, // MIN
+ 0xbfffffff, // MAX
+ 0x0, // TRA
+ 0xc0000000, // LEN
+ ,
+ ,
+ )
+ })
+
+ Device (XHC0)
+ {
+ Name (_HID, "PNP0D10") // _HID: Hardware ID
+ Name (_UID, 0x0) // _UID: Unique ID
+ Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
+
+ Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
+ Name (RBUF, ResourceTemplate () {
+ QWordMemory (ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MIN
+ SANITIZED_PCIE_CPU_MMIO_WINDOW, // MAX
+ 0x0,
+ 0x1, // LEN
+ ,
+ ,
+ MMIO
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {
+ 175
+ }
+ })
+ CreateQwordField (RBUF, MMIO._MAX, MMBE)
+ CreateQwordField (RBUF, MMIO._LEN, MMLE)
+ Add (MMBE, XHCI_REG_LENGTH - 1, MMBE)
+ Add (MMLE, XHCI_REG_LENGTH - 1, MMLE)
+ Return (RBUF)
+ }
+
+ Method (_INI, 0, Serialized) {
+ OperationRegion (PCFG, SystemMemory, SANITIZED_PCIE_REG_BASE + PCIE_EXT_CFG_DATA, 0x1000)
+ Field (PCFG, AnyAcc, NoLock, Preserve) {
+ Offset (0),
+ VNID, 16, // Vendor ID
+ DVID, 16, // Device ID
+ CMND, 16, // Command register
+ STAT, 16, // Status register
+ }
+
+ // Set command register to:
+ // 1) decode MMIO (set bit 1)
+ // 2) enable DMA (set bit 2)
+ // 3) enable interrupts (clear bit 10)
+ Debug = "xHCI enable"
+ Store (0x6, CMND)
+ }
+ }
+}
diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc
index 94d1e5b1c45b..10f02737dce1 100644
--- a/Platform/RaspberryPi/RPi3/RPi3.dsc
+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc
@@ -218,6 +218,10 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
###################################################################################################
[BuildOptions]
+ GCC:*_*_*_CC_FLAGS = -DRPI_MODEL=3
+ GCC:*_*_*_ASLPP_FLAGS = -DRPI_MODEL=3
+ GCC:*_*_*_ASLCC_FLAGS = -DRPI_MODEL=3
+ GCC:*_*_*_VFRPP_FLAGS = -DRPI_MODEL=3
GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,--fix-cortex-a53-843419
GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -DNDEBUG
--
2.21.0.windows.1
next prev parent reply other threads:[~2020-02-28 10:39 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-28 10:38 [edk2-platforms][PATCH 00/15] Platform/RPi: Clean up and factorize ACPI Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 01/15] Platform/RPi: Move DW USB base address to Silicon Pete Batard
2020-03-02 11:21 ` Philippe Mathieu-Daudé
2020-02-28 10:38 ` [edk2-platforms][PATCH 02/15] Silicon/Bcm283x: Add missing peripherals constants Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 03/15] Silicon/Bcm283x: Add GPU/VideoCore and Power Management constants Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 04/15] Silicon/BcmGenet: Add missing I/O mapping length and clean up Pete Batard
2020-02-28 10:45 ` Ard Biesheuvel
2020-02-28 10:51 ` Pete Batard
2020-02-28 10:58 ` Ard Biesheuvel
2020-02-28 11:01 ` Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 05/15] Platform/RPi4: Use Silicon constants in ACPI headers Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 06/15] Platform/RPi3: " Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 07/15] Platform/RPi3: Switch to .aslc for serial related ACPI tables Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 08/15] Platform/RPi3: Update CSRT table to ACPI 5.1 Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 09/15] Platform/RPi3: Use proper aslc for FADT, GTDT and MADT tables generation Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 10/15] Platform/RPi4: Add RPI_MODEL constant and replace PL011_ENABLE Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 11/15] Platform/RPi4: Move ACPI interrupts definitions to AcpiTables.h Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 12/15] Platform/RPi3: " Pete Batard
2020-02-28 10:38 ` [edk2-platforms][PATCH 13/15] Platform/RPi4: Prepare ACPI code for factorization Pete Batard
2020-02-28 10:38 ` Pete Batard [this message]
2020-02-28 10:38 ` [edk2-platforms][PATCH 15/15] Platform/RPi: Factorize ACPI tables Pete Batard
2020-02-28 12:17 ` [edk2-platforms][PATCH 00/15] Platform/RPi: Clean up and factorize ACPI Ard Biesheuvel
2020-03-02 11:14 ` Ard Biesheuvel
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