From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by mx.groups.io with SMTP id smtpd.web10.12435.1582886353112625541 for ; Fri, 28 Feb 2020 02:39:13 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@akeo-ie.20150623.gappssmtp.com header.s=20150623 header.b=npvNDUvv; spf=none, err=permanent DNS error (domain: akeo.ie, ip: 209.85.128.67, mailfrom: pete@akeo.ie) Received: by mail-wm1-f67.google.com with SMTP id a141so2641567wme.2 for ; Fri, 28 Feb 2020 02:39:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=akeo-ie.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9Dl7r5XoVzvMJRtapJU7Z77phN5sFFz2HApc1+iKvvQ=; b=npvNDUvvt4RoToF96yphaeuv2SbH4oivwosoFdgMRwr/2IUPtGvU2fQTHhStb7W4YB nwuu/wjWys5dJdKRkUmeKoTH0kbk1Pqy9OG4euI0or5fDMnOqjKQTa3v9j+xQiLq3gPB UisSBKkiphoiLdJo7K2wXoI8nH75DCtt7xPbihm5+rz7+9ni2XIf9Tf1qYf6abL5D/4U Sm740VyMTAWoMOB8VDLVz+EzF1SF1IvASEoFH+LwAFg4WeQFS1X2Y8VECwZiCpHRSH1r VgnGQSoHi2TabwpoJ8d/HUBFngbOOAiHEITVLI25RDpdnMKbSE0I1NM91Oo5nPKuOyj0 Jbgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9Dl7r5XoVzvMJRtapJU7Z77phN5sFFz2HApc1+iKvvQ=; b=j3SRyvw6YkZ/CRSMmxIB6x6ea3K4DRHIt92XxiwWr99D0KN2KGrOuOiimzjTb54U/M hB11VaHep6yAr0RlQjUmiDf46AkvObl+lW/I7ew2up2L+w6HUdlik751IThjHwAS0icY O7CXl0KgMOh6fRQXXTDLvmMOS7MBiPHtB/JJILkxgAwdf4TYT8CqEJtxz9cezPKbQ3bn QJV7OnhJ91G+H1DB8F96ANTryAVpcQZ2u+6nCHUOK/cFDCWqY3+XiDqrxxRIcVO7hQsx VWzBsxIUX+KcVTDE9CIqTugM6rq6qlcxi3ECdCu8csPkx2bzHt3thvnNC7Nd3bLvN+Uy /axA== X-Gm-Message-State: APjAAAXEUdxdJTKOGS1Y8NxOTvBgunu2wxJuJJe5g8PhyuBSAZFKqFUM 5Ghbk0ePBolxARKa8s1FBjgM+e5xdow= X-Google-Smtp-Source: APXvYqyO4voN+4WexV2lyOj0RRTotwP3ZbsO+SjS6gRSrXwIYF+O51GgMv9S0MYMvij8Ge4PuQSu/g== X-Received: by 2002:a05:600c:1009:: with SMTP id c9mr4161662wmc.162.1582886351318; Fri, 28 Feb 2020 02:39:11 -0800 (PST) Return-Path: Received: from localhost.localdomain ([84.203.56.244]) by smtp.gmail.com with ESMTPSA id s8sm12341061wrt.57.2020.02.28.02.39.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 28 Feb 2020 02:39:10 -0800 (PST) From: "Pete Batard" To: devel@edk2.groups.io Cc: ard.biesheuvel@linaro.org, leif@nuviainc.com, philmd@redhat.com Subject: [edk2-platforms][PATCH 03/15] Silicon/Bcm283x: Add GPU/VideoCore and Power Management constants Date: Fri, 28 Feb 2020 10:38:43 +0000 Message-Id: <20200228103855.11352-4-pete@akeo.ie> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20200228103855.11352-1-pete@akeo.ie> References: <20200228103855.11352-1-pete@akeo.ie> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Whereas these devices are not explicitly described in the BCM2835 ARM Peripheral guide, they come as standard with the SoC and their constants can easily be found in the Device Trees for Bcm283x based devices. Create 2 new Silicon headers to host these constants. Signed-off-by: Pete Batard --- Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Gpu.h | 48 ++++++++++++++++++++ Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h | 34 ++++++++++++++ 2 files changed, 82 insertions(+) diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Gpu.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Gpu.h new file mode 100644 index 000000000000..4eea4cf22fd8 --- /dev/null +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Gpu.h @@ -0,0 +1,48 @@ +/** @file + * + * Copyright (c) 2020, Pete Batard + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * + **/ + +#include + +#ifndef __BCM2836_GPU_H__ +#define __BCM2836_GPU_H__ + +/* VideoCore constants */ + +#define BCM2836_VCHIQ_OFFSET 0x0000B840 +#define BCM2836_VCHIQ_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_VCHIQ_OFFSET) +#define BCM2836_VCHIQ_LENGTH 0x00000010 + +#define BCM2836_V3D_BUS_OFFSET 0x00C00000 +#define BCM2836_V3D_BUS_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_V3D_BUS_OFFSET) +#define BCM2836_V3D_BUS_LENGTH 0x00001000 + +#define BCM2836_HVS_OFFSET 0x00400000 +#define BCM2836_HVS_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_HVS_OFFSET) +#define BCM2836_HVS_LENGTH 0x00006000 + +#define BCM2836_PV0_OFFSET 0x00206000 +#define BCM2836_PV0_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PV0_OFFSET) +#define BCM2836_PV0_LENGTH 0x00000100 + +#define BCM2836_PV1_OFFSET 0x00207000 +#define BCM2836_PV1_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PV1_OFFSET) +#define BCM2836_PV1_LENGTH 0x00000100 + +#define BCM2836_PV2_OFFSET 0x00807000 +#define BCM2836_PV2_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PV2_OFFSET) +#define BCM2836_PV2_LENGTH 0x00000100 + +#define BCM2836_HDMI0_OFFSET 0x00902000 +#define BCM2836_HDMI0_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_HDMI0_OFFSET) +#define BCM2836_HDMI0_LENGTH 0x00000600 + +#define BCM2836_HDMI1_OFFSET 0x00808000 +#define BCM2836_HDMI1_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_HDMI1_OFFSET) +#define BCM2836_HDMI1_LENGTH 0x00000100 + +#endif /* __BCM2836_MISC_H__ */ diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h new file mode 100644 index 000000000000..e2581b8901ad --- /dev/null +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h @@ -0,0 +1,34 @@ +/** @file + * + * Copyright (c) 2020, Pete Batard + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * + **/ + +#include + +#ifndef __BCM2836_PWM_H__ +#define __BCM2836_PWM_H__ + +/* Power Management constants */ + +#define BCM2836_PWM_DMA_OFFSET 0x00007B00 +#define BCM2836_PWM_DMA_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_DMA_OFFSET) +#define BCM2836_PWM_DMA_LENGTH 0x00000100 + +#define BCM2836_PWM_CLK_OFFSET 0x001010A0 +#define BCM2836_PWM_CLK_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CLK_OFFSET) +#define BCM2836_PWM_CLK_LENGTH 0x00000008 + +#define BCM2836_PWM_CTRL_OFFSET 0x0020C000 +#define BCM2836_PWM_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CTRL_OFFSET) +#define BCM2836_PWM_CTRL_LENGTH 0x00000028 + +#define BCM2836_PWM_BUS_BASE_ADDRESS 0x7E20C000 +#define BCM2836_PWM_BUS_LENGTH 0x00000028 + +#define BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS 0xFF20C000 +#define BCM2836_PWM_CTRL_UNCACHED_LENGTH 0x00000028 + +#endif /* __BCM2836_PWM_H__ */ -- 2.21.0.windows.1