* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI.
@ 2020-02-29 14:13 Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 1/9] FatPkg: Add RISC-V architecture for " Abner Chang
` (9 more replies)
0 siblings, 10 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel; +Cc: abner.chang
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report (RISCV64 only):
https://github.com/tianocore/edk2-staging/pull/196
EDK2 CI report (All architectures):
https://github.com/tianocore/edk2-staging/pull/197
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Abner Chang (9):
FatPkg: Add RISC-V architecture for EDK2 CI.
FmpDevicePkg: Add RISC-V architecture for EDK2 CI.
NetworkPkg: Add RISC-V architecture for EDK2 CI.
NetworkPkg/HttpBootDxe: Add RISC-V architecture for EDK2 CI.
CryptoPkg: Add RISC-V architecture for EDK2 CI.
MdePkg/Include: Add RISC-V related definitions EDK2 CI.
SecurityPkg: Security package changes for RISC-V EDK2 CI.
ShellPkg: Shell package changes for RISC-V EDK2 CI.
UnitTestFrameworkPkg: Add RISC-V architecture for RISC-V EDK2 CI.
CryptoPkg/CryptoPkg.dsc | 3 ++-
FatPkg/FatPkg.dsc | 3 ++-
FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
NetworkPkg/NetworkPkg.dsc | 4 ++--
SecurityPkg/SecurityPkg.dsc | 4 ++--
ShellPkg/ShellPkg.dsc | 3 ++-
UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc | 3 ++-
CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +++++-
CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 ++++
CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
.../Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
.../Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++
CryptoPkg/Library/TlsLib/TlsLib.inf | 4 ++--
CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 4 ++--
CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++-
MdePkg/Include/IndustryStandard/Dhcp.h | 7 +++++++
NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++
19 files changed, 49 insertions(+), 18 deletions(-)
--
2.25.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 1/9] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 2/9] FmpDevicePkg: " Abner Chang
` (8 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Ray Ni, Leif Lindholm, Gilbert Chen,
Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
FatPkg/FatPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
index 1676c2eb8f..d86256068b 100644
--- a/FatPkg/FatPkg.dsc
+++ b/FatPkg/FatPkg.dsc
@@ -4,6 +4,7 @@
# This Platform file is used to generate the Binary Fat Drivers
# for EDK II Prime release.
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -14,7 +15,7 @@
PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c
PLATFORM_VERSION = 0.3
DSC_SPECIFICATION = 0x00010005
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
OUTPUT_DIRECTORY = Build/Fat
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 2/9] FmpDevicePkg: Add RISC-V architecture for EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 1/9] FatPkg: Add RISC-V architecture for " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 3/9] NetworkPkg: " Abner Chang
` (7 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Liming Gao, Michael D Kinney, Leif Lindholm,
Gilbert Chen, Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/FmpDevicePkg/FmpDevicePkg.dsc b/FmpDevicePkg/FmpDevicePkg.dsc
index f4093d3837..b8fb9d7c19 100644
--- a/FmpDevicePkg/FmpDevicePkg.dsc
+++ b/FmpDevicePkg/FmpDevicePkg.dsc
@@ -8,6 +8,7 @@
#
# Copyright (c) 2016, Microsoft Corporation. All rights reserved.<BR>
# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -19,7 +20,7 @@
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/FmpDevicePkg
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 3/9] NetworkPkg: Add RISC-V architecture for EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 1/9] FatPkg: Add RISC-V architecture for " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 2/9] FmpDevicePkg: " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 4/9] NetworkPkg/HttpBootDxe: " Abner Chang
` (6 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Jiaxin Wu, Siyuan Fu, Leif Lindholm, Gilbert Chen,
Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
NetworkPkg/NetworkPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/NetworkPkg/NetworkPkg.dsc b/NetworkPkg/NetworkPkg.dsc
index b149453d26..503d828f91 100644
--- a/NetworkPkg/NetworkPkg.dsc
+++ b/NetworkPkg/NetworkPkg.dsc
@@ -3,7 +3,7 @@
#
# (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
-#
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -14,7 +14,7 @@
PLATFORM_VERSION = 0.98
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/NetworkPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 4/9] NetworkPkg/HttpBootDxe: Add RISC-V architecture for EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (2 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 3/9] NetworkPkg: " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 5/9] CryptoPkg: " Abner Chang
` (5 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Jiaxin Wu, Siyuan Fu, Leif Lindholm, Gilbert Chen,
Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
index 74bbdac58e..606a466aae 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
@@ -2,6 +2,7 @@
Functions declaration related with DHCPv4 for HTTP boot driver.
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -35,6 +36,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_ARM
#elif defined (MDE_CPU_AARCH64)
#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_AARCH64
+#elif defined (MDE_CPU_RISCV64)
+#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_RISCV64
#elif defined (MDE_CPU_EBC)
#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_EBC
#endif
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 5/9] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (3 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 4/9] NetworkPkg/HttpBootDxe: " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 6/9] MdePkg/Include: Add RISC-V related definitions " Abner Chang
` (4 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Daniel Helmut Schaefer, Jian J Wang, Xiaoyu Lu,
Leif Lindholm, Gilbert Chen
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
---
CryptoPkg/CryptoPkg.dsc | 3 ++-
CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +++++-
CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 ++++
CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++
CryptoPkg/Library/TlsLib/TlsLib.inf | 4 ++--
CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 4 ++--
CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++-
11 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
index 4cb37b1349..f79ff331cf 100644
--- a/CryptoPkg/CryptoPkg.dsc
+++ b/CryptoPkg/CryptoPkg.dsc
@@ -3,6 +3,7 @@
# PEIM, DXE Driver, and SMM Driver with all crypto services enabled.
#
# Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -18,7 +19,7 @@
PLATFORM_VERSION = 0.98
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/CryptoPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
index 1bbe4f435a..a63ad66b4f 100644
--- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
@@ -7,6 +7,7 @@
# buffer overflow or integer overflow.
#
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -23,7 +24,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
@@ -72,6 +73,9 @@
[Sources.AARCH64]
Rand/CryptRand.c
+[Sources.RISCV64]
+ Rand/CryptRand.c
+
[Packages]
MdePkg/MdePkg.dec
CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
index bff308a4f5..e5b8ececc1 100644
--- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
@@ -12,6 +12,7 @@
# authenticode signature verification functions are not supported in this instance.
#
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -77,6 +78,9 @@
[Sources.AARCH64]
Rand/CryptRand.c
+[Sources.RISCV64]
+ Rand/CryptRand.c
+
[Packages]
MdePkg/MdePkg.dec
CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
index 8f53b0dfd0..9b4991cbb0 100644
--- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
+++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
@@ -7,6 +7,7 @@
# buffer overflow or integer overflow.
#
# Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -23,7 +24,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
index 9282b0fd6b..baa4433cbe 100644
--- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
@@ -3,6 +3,7 @@
# Protocol.
#
# Copyright (C) Microsoft Corporation. All rights reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -21,7 +22,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Packages]
diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
index 5c56e3320e..038ca71890 100644
--- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
@@ -3,6 +3,7 @@
# PPI.
#
# Copyright (C) Microsoft Corporation. All rights reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -20,7 +21,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Packages]
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index 3fa52f5543..01ee665183 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -2,6 +2,7 @@
# This module provides OpenSSL Library implementation.
#
# Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -661,6 +662,7 @@
GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
+ GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=format -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
index f1f9fbb938..5c2206f6fb 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
@@ -2,6 +2,7 @@
# This module provides OpenSSL Library implementation.
#
# Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -610,6 +611,7 @@
GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
+ GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
diff --git a/CryptoPkg/Library/TlsLib/TlsLib.inf b/CryptoPkg/Library/TlsLib/TlsLib.inf
index 2f3ce695c3..27209f4d7f 100644
--- a/CryptoPkg/Library/TlsLib/TlsLib.inf
+++ b/CryptoPkg/Library/TlsLib/TlsLib.inf
@@ -2,7 +2,7 @@
# SSL/TLS Wrapper Library Instance based on OpenSSL.
#
# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -19,7 +19,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
diff --git a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
index 33f0e7493f..b2920ddacf 100644
--- a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
+++ b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
@@ -2,7 +2,7 @@
# SSL/TLS Wrapper Null Library Instance.
#
# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -19,7 +19,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
diff --git a/CryptoPkg/Library/Include/CrtLibSupport.h b/CryptoPkg/Library/Include/CrtLibSupport.h
index 5a20ba636f..7a82f1d406 100644
--- a/CryptoPkg/Library/Include/CrtLibSupport.h
+++ b/CryptoPkg/Library/Include/CrtLibSupport.h
@@ -3,6 +3,7 @@
cryptographic library.
Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -43,7 +44,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define CONFIG_HEADER_BN_H
-#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) || defined(MDE_CPU_IA64)
+#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) || defined(MDE_CPU_IA64) || defined(MDE_CPU_RISCV64)
//
// With GCC we would normally use SIXTY_FOUR_BIT_LONG, but MSVC needs
// SIXTY_FOUR_BIT, because 'long' is 32-bit and only 'long long' is
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 6/9] MdePkg/Include: Add RISC-V related definitions EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (4 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 5/9] CryptoPkg: " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V " Abner Chang
` (3 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Michael D Kinney, Liming Gao, Leif Lindholm,
Gilbert Chen, Daniel Helmut Schaefer
HTTP/PXE boot RISC-V related definitions for EDK2 CI.
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
MdePkg/Include/IndustryStandard/Dhcp.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h b/MdePkg/Include/IndustryStandard/Dhcp.h
index f41f9f2f5b..121c48c42d 100644
--- a/MdePkg/Include/IndustryStandard/Dhcp.h
+++ b/MdePkg/Include/IndustryStandard/Dhcp.h
@@ -3,6 +3,7 @@
They are used to carry additional information and parameters in DHCP messages.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -266,11 +267,17 @@ typedef enum {
#define PXE_CLIENT_ARCH_EBC 0x0009 /// EBC for PXE
#define PXE_CLIENT_ARCH_ARM 0x000A /// Arm uefi 32 for PXE
#define PXE_CLIENT_ARCH_AARCH64 0x000B /// Arm uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV32 0x0019 /// RISC-V uefi 32 for PXE
+#define PXE_CLIENT_ARCH_RISCV64 0x001B /// RISC-V uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV128 0x001D /// RISC-V uefi 128 for PXE
#define HTTP_CLIENT_ARCH_IA32 0x000F /// x86 uefi boot from http
#define HTTP_CLIENT_ARCH_X64 0x0010 /// x64 uefi boot from http
#define HTTP_CLIENT_ARCH_EBC 0x0011 /// EBC boot from http
#define HTTP_CLIENT_ARCH_ARM 0x0012 /// Arm uefi 32 boot from http
#define HTTP_CLIENT_ARCH_AARCH64 0x0013 /// Arm uefi 64 boot from http
+#define HTTP_CLIENT_ARCH_RISCV32 0x001A /// RISC-V uefi 32 boot from http
+#define HTTP_CLIENT_ARCH_RISCV64 0x001C /// RISC-V uefi 64 boot from http
+#define HTTP_CLIENT_ARCH_RISCV128 0x001E /// RISC-V uefi 128 boot from http
#endif
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (5 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 6/9] MdePkg/Include: Add RISC-V related definitions " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-03-01 0:23 ` [edk2-devel] " Yao, Jiewen
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 8/9] ShellPkg: Shell " Abner Chang
` (2 subsequent siblings)
9 siblings, 1 reply; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Jiewen Yao, Jian J Wang, Chao Zhang, Leif Lindholm,
Gilbert Chen, Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture to SecurityPkg for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
SecurityPkg/SecurityPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
index a2eeadda7a..7db1ad855a 100644
--- a/SecurityPkg/SecurityPkg.dsc
+++ b/SecurityPkg/SecurityPkg.dsc
@@ -2,7 +2,7 @@
# Security Module Package for All Architectures.
#
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
-# (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -13,7 +13,7 @@
PLATFORM_VERSION = 0.98
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/SecurityPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 8/9] ShellPkg: Shell package changes for RISC-V EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (6 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 9/9] UnitTestFrameworkPkg: Add RISC-V architecture " Abner Chang
2020-03-04 10:22 ` [edk2-devel] [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes " Maciej Rabeda
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Ray Ni, Zhichao Gao, Leif Lindholm, Gilbert Chen,
Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture to ShellPkg for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
ShellPkg/ShellPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
index 91493400ca..b7ee856b3a 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
@@ -3,6 +3,7 @@
#
# Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2018, Arm Limited. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -14,7 +15,7 @@
PLATFORM_VERSION = 1.02
DSC_SPECIFICATION = 0x00010006
OUTPUT_DIRECTORY = Build/Shell
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 9/9] UnitTestFrameworkPkg: Add RISC-V architecture for RISC-V EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (7 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 8/9] ShellPkg: Shell " Abner Chang
@ 2020-02-29 14:13 ` Abner Chang
2020-03-04 10:22 ` [edk2-devel] [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes " Maciej Rabeda
9 siblings, 0 replies; 12+ messages in thread
From: Abner Chang @ 2020-02-29 14:13 UTC (permalink / raw)
To: devel
Cc: abner.chang, Michael D Kinney, Sean Brogan, Bret Barkelew,
Leif Lindholm, Gilbert Chen, Daniel Helmut Schaefer
BZ:2562
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
EDK2 CI report:
https://github.com/tianocore/edk2-staging/pull/196
https://github.com/tianocore/edk2-staging/pull/197
Add RISC-V architecture to UnitTestFrameworkPkg for RISC-V EDK2 CI.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
index 53d8f52754..2d84691bf1 100644
--- a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
+++ b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
@@ -2,6 +2,7 @@
# UnitTestFrameworkPkg
#
# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -13,7 +14,7 @@
PLATFORM_VERSION = 1.00
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/UnitTestFrameworkPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [edk2-devel] [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V EDK2 CI.
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V " Abner Chang
@ 2020-03-01 0:23 ` Yao, Jiewen
0 siblings, 0 replies; 12+ messages in thread
From: Yao, Jiewen @ 2020-03-01 0:23 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com
Cc: Wang, Jian J, Zhang, Chao B, Leif Lindholm, Gilbert Chen,
Daniel Helmut Schaefer
Reviewed-by: Jiewen.yao@intel.com
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner
> Chang
> Sent: Saturday, February 29, 2020 10:14 PM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Yao, Jiewen <jiewen.yao@intel.com>; Wang, Jian J
> <jian.j.wang@intel.com>; Zhang, Chao B <chao.b.zhang@intel.com>; Leif
> Lindholm <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>; Daniel
> Helmut Schaefer <daniel.schaefer@hpe.com>
> Subject: [edk2-devel] [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change
> PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V EDK2 CI.
>
> BZ:2562
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> EDK2 CI report:
> https://github.com/tianocore/edk2-staging/pull/196
> https://github.com/tianocore/edk2-staging/pull/197
>
> Add RISC-V architecture to SecurityPkg for EDK2 CI testing.
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Chao Zhang <chao.b.zhang@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
> ---
> SecurityPkg/SecurityPkg.dsc | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
> index a2eeadda7a..7db1ad855a 100644
> --- a/SecurityPkg/SecurityPkg.dsc
> +++ b/SecurityPkg/SecurityPkg.dsc
> @@ -2,7 +2,7 @@
> # Security Module Package for All Architectures.
>
> #
>
> # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
>
> -# (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
>
> +# (C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -13,7 +13,7 @@
> PLATFORM_VERSION = 0.98
>
> DSC_SPECIFICATION = 0x00010005
>
> OUTPUT_DIRECTORY = Build/SecurityPkg
>
> - SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
>
> + SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
>
> BUILD_TARGETS = DEBUG|RELEASE|NOOPT
>
> SKUID_IDENTIFIER = DEFAULT
>
>
>
> --
> 2.25.0
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
>
> View/Reply Online (#55118): https://edk2.groups.io/g/devel/message/55118
> Mute This Topic: https://groups.io/mt/71632580/1772286
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub [jiewen.yao@intel.com]
> -=-=-=-=-=-=
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [edk2-devel] [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI.
2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
` (8 preceding siblings ...)
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 9/9] UnitTestFrameworkPkg: Add RISC-V architecture " Abner Chang
@ 2020-03-04 10:22 ` Maciej Rabeda
9 siblings, 0 replies; 12+ messages in thread
From: Maciej Rabeda @ 2020-03-04 10:22 UTC (permalink / raw)
To: devel, abner.chang
Hi Abner,
For NetworkPkg (3-4/9) & MdePkg/Include (6/9):
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Thanks,
Maciej
On 29-Feb-20 15:13, Abner Chang wrote:
> BZ:2562
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> EDK2 CI report (RISCV64 only):
> https://github.com/tianocore/edk2-staging/pull/196
>
> EDK2 CI report (All architectures):
> https://github.com/tianocore/edk2-staging/pull/197
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
>
> Abner Chang (9):
> FatPkg: Add RISC-V architecture for EDK2 CI.
> FmpDevicePkg: Add RISC-V architecture for EDK2 CI.
> NetworkPkg: Add RISC-V architecture for EDK2 CI.
> NetworkPkg/HttpBootDxe: Add RISC-V architecture for EDK2 CI.
> CryptoPkg: Add RISC-V architecture for EDK2 CI.
> MdePkg/Include: Add RISC-V related definitions EDK2 CI.
> SecurityPkg: Security package changes for RISC-V EDK2 CI.
> ShellPkg: Shell package changes for RISC-V EDK2 CI.
> UnitTestFrameworkPkg: Add RISC-V architecture for RISC-V EDK2 CI.
>
> CryptoPkg/CryptoPkg.dsc | 3 ++-
> FatPkg/FatPkg.dsc | 3 ++-
> FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
> NetworkPkg/NetworkPkg.dsc | 4 ++--
> SecurityPkg/SecurityPkg.dsc | 4 ++--
> ShellPkg/ShellPkg.dsc | 3 ++-
> UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc | 3 ++-
> CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +++++-
> CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 ++++
> CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
> .../Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
> .../Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
> CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
> CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++
> CryptoPkg/Library/TlsLib/TlsLib.inf | 4 ++--
> CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 4 ++--
> CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++-
> MdePkg/Include/IndustryStandard/Dhcp.h | 7 +++++++
> NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++
> 19 files changed, 49 insertions(+), 18 deletions(-)
>
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-03-04 10:23 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
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2020-02-29 14:13 [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes for RISC-V EDK2 CI Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 1/9] FatPkg: Add RISC-V architecture for " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 2/9] FmpDevicePkg: " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 3/9] NetworkPkg: " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 4/9] NetworkPkg/HttpBootDxe: " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 5/9] CryptoPkg: " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 6/9] MdePkg/Include: Add RISC-V related definitions " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 7/9] SecurityPkg: Security package changes for RISC-V " Abner Chang
2020-03-01 0:23 ` [edk2-devel] " Yao, Jiewen
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 8/9] ShellPkg: Shell " Abner Chang
2020-02-29 14:13 ` [edk2-staging/RISC-V-V2: RISC-V EDK2 CI Code Change PATCH v1 9/9] UnitTestFrameworkPkg: Add RISC-V architecture " Abner Chang
2020-03-04 10:22 ` [edk2-devel] [edk2-staging/RISC-V-V2: RISC-V EDK2 CI PATCH v1 0/9] Necessary code changes " Maciej Rabeda
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