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* [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files.
@ 2020-03-04  5:26 Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI Abner Chang
                   ` (5 more replies)
  0 siblings, 6 replies; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Leif Lindholm,
	Michael D Kinney, Liming Gao, Gilbert Chen,
	Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

This set of patches enale RISC-V architecture on EDK2 CI test process.
The external dependency of toolchain for RISCV64 architecture is retrieved from:
https://media.githubusercontent.com/media/riscv/riscv-uefi-edk2-docs/master/gcc-riscv-edk2-ci-toolchain/.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>

Abner Chang (6):
  RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI.
  RiscVPkg: Add RiscVPkg yaml file for EDK2 CI.
  MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V EDK2 CI.
  BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.
  .azurepipelines: Add RISC-V architecture on RISC-V EDK2 CI.
  .pytool: Add RISC-V architecture on RISC-V EDK2 CI.

 .azurepipelines/Ubuntu-GCC5.yml               |  3 +-
 .pytool/CISettings.py                         | 15 +++-
 .../Bin/gcc_riscv64_unknown_ext_dep.yaml      | 21 +++++
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  | 31 +++++++
 MdeModulePkg/MdeModulePkg.ci.yaml             |  4 +-
 RiscVPkg/RiscVPkg.ci.yaml                     | 80 ++++++++++++++++++
 RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml     | 81 +++++++++++++++++++
 7 files changed, 230 insertions(+), 5 deletions(-)
 create mode 100644 BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml
 create mode 100644 RiscVPkg/RiscVPkg.ci.yaml
 create mode 100644 RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml

-- 
2.25.0


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI.
  2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
@ 2020-03-04  5:26 ` Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg " Abner Chang
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Leif Lindholm,
	Gilbert Chen, Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Add yaml file for EDK2 CI testing on RiscVPlatformPkg.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml | 81 +++++++++++++++++++++++
 1 file changed, 81 insertions(+)
 create mode 100644 RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml

diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml b/RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml
new file mode 100644
index 0000000000..669874a028
--- /dev/null
+++ b/RiscVPlatformPkg/RiscVPlatformPkg.ci.yaml
@@ -0,0 +1,81 @@
+## @file
+# CI configuration for RiscVPlatformPkg
+#
+# Copyright (c) Microsoft Corporation
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+    ## options defined ci/Plugin/CompilerPlugin
+    "CompilerPlugin": {
+        "DscPath": "RiscVPlatformPkg.dsc"
+    },
+    ## options defined ci/Plugin/HostUnitTestCompilerPlugin
+    "HostUnitTestCompilerPlugin": {
+    },
+
+    ## options defined ci/Plugin/CharEncodingCheck
+    "CharEncodingCheck": {
+        "IgnoreFiles": []
+    },
+
+    ## options defined ci/Plugin/DependencyCheck
+    "DependencyCheck": {
+        "AcceptableDependencies": [
+            "MdePkg/MdePkg.dec",
+            "MdeModulePkg/MdeModulePkg.dec",
+            "RiscVPkg/RiscVPkg.dec",
+            "RiscVPlatformPkg/RiscVPlatformPkg.dec"
+        ],
+        # For host based unit tests
+        "AcceptableDependencies-HOST_APPLICATION":[],
+        # For UEFI shell based apps
+        "AcceptableDependencies-UEFI_APPLICATION":[],
+        "IgnoreInf": []
+    },
+
+    ## options defined ci/Plugin/DscCompleteCheck
+    "DscCompleteCheck": {
+        "IgnoreInf": [],
+        "DscPath": "RiscVPlatformPkg.dsc"
+    },
+    ## options defined ci/Plugin/HostUnitTestDscCompleteCheck
+    "HostUnitTestDscCompleteCheck": {
+    },
+
+    ## options defined ci/Plugin/GuidCheck
+    "GuidCheck": {
+        "IgnoreGuidName": [],
+        "IgnoreGuidValue": ["00000000-0000-0000-0000-000000000000"],
+        "IgnoreFoldersAndFiles": [],
+        "IgnoreDuplicates": []
+    },
+
+    ## options defined ci/Plugin/LibraryClassCheck
+    "LibraryClassCheck": {
+        "IgnoreHeaderFile": []
+    },
+
+    ## options defined ci/Plugin/SpellCheck
+    "SpellCheck": {
+        "AuditOnly": True,           # Fails test but run in AuditOnly mode to collect log
+        "IgnoreStandardPaths": [     # Standard Plugin defined paths that should be ignore
+            "*.c", "*.h", "*.s", "*.asl", "*.inf"
+        ],
+        "IgnoreFiles": [],
+        "ExtendWords": [           # words to extend to the dictionary for this package
+            "LIGHTGRAY",
+            "DARKGRAY",
+            "LIGHTBLUE",
+            "LIGHTGREEN",
+            "LIGHTCYAN",
+            "LIGHTRED",
+            "LIGHTMAGENTA",
+            "FVMAIN",
+            "VARCHECKPCD",
+            "Getxx",
+            "lzturbo"
+        ],
+        "AdditionalIncludePaths": [] # Additional paths to spell check relative to package root (wildcards supported)
+    }
+}
-- 
2.25.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg yaml file for EDK2 CI.
  2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI Abner Chang
@ 2020-03-04  5:26 ` Abner Chang
  2020-03-07 22:18   ` [edk2-devel] " Sean
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V " Abner Chang
                   ` (3 subsequent siblings)
  5 siblings, 1 reply; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Leif Lindholm,
	Gilbert Chen, Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Add yaml file for EDK2 CI testing on RiscVPkg.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 RiscVPkg/RiscVPkg.ci.yaml | 80 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)
 create mode 100644 RiscVPkg/RiscVPkg.ci.yaml

diff --git a/RiscVPkg/RiscVPkg.ci.yaml b/RiscVPkg/RiscVPkg.ci.yaml
new file mode 100644
index 0000000000..74a42cd59c
--- /dev/null
+++ b/RiscVPkg/RiscVPkg.ci.yaml
@@ -0,0 +1,80 @@
+## @file
+# CI configuration for RiscVPkg
+#
+# Copyright (c) Microsoft Corporation
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+    ## options defined ci/Plugin/CompilerPlugin
+    "CompilerPlugin": {
+        "DscPath": "RiscVPkg.dsc"
+    },
+    ## options defined ci/Plugin/HostUnitTestCompilerPlugin
+    "HostUnitTestCompilerPlugin": {
+    },
+
+    ## options defined ci/Plugin/CharEncodingCheck
+    "CharEncodingCheck": {
+        "IgnoreFiles": []
+    },
+
+    ## options defined ci/Plugin/DependencyCheck
+    "DependencyCheck": {
+        "AcceptableDependencies": [
+            "MdePkg/MdePkg.dec",
+            "MdeModulePkg/MdeModulePkg.dec",
+            "EmbeddedPkg/EmbeddedPkg.dec",
+            "RiscVPkg/RiscVPkg.dec"
+        ],
+        # For host based unit tests
+        "AcceptableDependencies-HOST_APPLICATION":[],
+        # For UEFI shell based apps
+        "AcceptableDependencies-UEFI_APPLICATION":[],
+        "IgnoreInf": []
+    },
+
+    ## options defined ci/Plugin/DscCompleteCheck
+    "DscCompleteCheck": {
+        "IgnoreInf": [],
+        "DscPath": "RiscVPkg.dsc"
+    },
+    ## options defined ci/Plugin/HostUnitTestDscCompleteCheck
+    "HostUnitTestDscCompleteCheck": {},
+
+    ## options defined ci/Plugin/GuidCheck
+    "GuidCheck": {
+        "IgnoreGuidName": [],
+        "IgnoreGuidValue": ["00000000-0000-0000-0000-000000000000"],
+        "IgnoreFoldersAndFiles": [],
+        "IgnoreDuplicates": []
+    },
+
+    ## options defined ci/Plugin/LibraryClassCheck
+    "LibraryClassCheck": {
+        "IgnoreHeaderFile": []
+    },
+
+    ## options defined ci/Plugin/SpellCheck
+    "SpellCheck": {
+        "AuditOnly": True,           # Fails test but run in AuditOnly mode to collect log
+        "IgnoreStandardPaths": [     # Standard Plugin defined paths that should be ignore
+            "*.c", "*.h", "*.s", "*.asl", "*.inf"
+        ],
+        "IgnoreFiles": [],
+        "ExtendWords": [           # words to extend to the dictionary for this package
+            "LIGHTGRAY",
+            "DARKGRAY",
+            "LIGHTBLUE",
+            "LIGHTGREEN",
+            "LIGHTCYAN",
+            "LIGHTRED",
+            "LIGHTMAGENTA",
+            "FVMAIN",
+            "VARCHECKPCD",
+            "Getxx",
+            "lzturbo"
+        ],
+        "AdditionalIncludePaths": [] # Additional paths to spell check relative to package root (wildcards supported)
+    }
+}
-- 
2.25.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V EDK2 CI.
  2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg " Abner Chang
@ 2020-03-04  5:26 ` Abner Chang
  2020-03-07 22:15   ` [edk2-devel] " Sean
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture " Abner Chang
                   ` (2 subsequent siblings)
  5 siblings, 1 reply; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Leif Lindholm,
	Michael D Kinney, Liming Gao, Gilbert Chen,
	Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Revise yaml file for EDK2 CI testing on RISC-V architecture.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 MdeModulePkg/MdeModulePkg.ci.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/MdeModulePkg.ci.yaml b/MdeModulePkg/MdeModulePkg.ci.yaml
index 3b6e747075..d957af68fc 100644
--- a/MdeModulePkg/MdeModulePkg.ci.yaml
+++ b/MdeModulePkg/MdeModulePkg.ci.yaml
@@ -2,6 +2,7 @@
 # CI configuration for MdeModulePkg
 #
 # Copyright (c) Microsoft Corporation
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 {
@@ -25,7 +26,8 @@
             "MdePkg/MdePkg.dec",
             "MdeModulePkg/MdeModulePkg.dec",
             "StandaloneMmPkg/StandaloneMmPkg.dec",
-            "ArmPkg/ArmPkg.dec"  # this should be fixed by promoting an abstraction
+            "ArmPkg/ArmPkg.dec",  # this should be fixed by promoting an abstraction
+            "RiscVPkg/RiscVPkg.dec" # this should be fixed by promoting an abstraction
         ],
         # For host based unit tests
         "AcceptableDependencies-HOST_APPLICATION":[
-- 
2.25.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.
  2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
                   ` (2 preceding siblings ...)
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V " Abner Chang
@ 2020-03-04  5:26 ` Abner Chang
  2020-03-07 22:13   ` [edk2-devel] " Sean
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 5/6] .azurepipelines: Add RISC-V architecture on " Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 6/6] .pytool: " Abner Chang
  5 siblings, 1 reply; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Bob Feng, Leif Lindholm,
	Michael D Kinney, Liming Gao, Gilbert Chen,
	Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

EDK CI for RISC-V architecture

Enable RISC-V architecture for RISC-V EDK2 CI testing.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 .../Bin/gcc_riscv64_unknown_ext_dep.yaml      | 21 +++++++++++++
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  | 31 +++++++++++++++++++
 2 files changed, 52 insertions(+)
 create mode 100644 BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml

diff --git a/BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml b/BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml
new file mode 100644
index 0000000000..38fe300a68
--- /dev/null
+++ b/BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml
@@ -0,0 +1,21 @@
+## @file
+# Download GCC RISCV64 compiler from RISC-V Organization release site
+# Set shell variable GCC5_RISCV64_INSTALL to this folder
+#
+# This is only downloaded when a build activates scope gcc_riscv64_unknown
+#
+# Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+  "scope": "gcc_riscv64_unknown",
+  "type": "web",
+  "name": "gcc_riscv64_unknown",
+  "source": "https://media.githubusercontent.com/media/riscv/riscv-uefi-edk2-docs/master/gcc-riscv-edk2-ci-toolchain/gcc-riscv-9.2.0-2020.02-x86_64_riscv64-unknown-gnu.tar.xz",
+  "version": "9.2.0",
+  "compression_type": "tar",
+  "internal_path": "/gcc-riscv-9.2.0-2020.02-x86_64_riscv64-unknown-gnu",
+  "flags": ["set_shell_var", ],
+  "var_name": "GCC5_RISCV64_INSTALL"
+}
diff --git a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
index c31641e931..502d2c21d2 100644
--- a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
+++ b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
@@ -4,6 +4,7 @@
 # This plugin works in conjuncture with the tools_def
 #
 # Copyright (c) Microsoft Corporation
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 import os
@@ -36,6 +37,12 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
                 self.Logger.critical("Failed in check arm")
                 return ret
 
+            # Check RISCV64 compiler
+            ret = self._check_riscv64()
+            if ret != 0:
+                self.Logger.critical("Failed in check riscv64")
+                return ret
+
         return 0
 
     def _check_arm(self):
@@ -83,3 +90,27 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
             return -2
 
         return 0
+
+    def _check_riscv64(self):
+        # check to see if full path already configured
+        if shell_environment.GetEnvironment().get_shell_var("GCC5_RISCV64_PREFIX") is not None:
+            self.Logger.info("GCC5_RISCV64_PREFIX is already set.")
+
+        else:
+            # now check for install dir.  If set then set the Prefix
+            install_path = shell_environment.GetEnvironment(
+            ).get_shell_var("GCC5_RISCV64_INSTALL")
+            if install_path is None:
+                return 0
+
+            # make GCC5_RISCV64_PREFIX to align with tools_def.txt
+            prefix = os.path.join(install_path, "bin", "riscv64-unknown-elf-")
+            shell_environment.GetEnvironment().set_shell_var("GCC5_RISCV64_PREFIX", prefix)
+
+        # now confirm it exists
+        if not os.path.exists(shell_environment.GetEnvironment().get_shell_var("GCC5_RISCV64_PREFIX") + "gcc"):
+            self.Logger.error(
+                "Path for GCC5_RISCV64_PREFIX toolchain is invalid")
+            return -2
+
+        return 0
-- 
2.25.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [edk2/master PATCH RISC-V CI v1 5/6] .azurepipelines: Add RISC-V architecture on RISC-V EDK2 CI.
  2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
                   ` (3 preceding siblings ...)
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture " Abner Chang
@ 2020-03-04  5:26 ` Abner Chang
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 6/6] .pytool: " Abner Chang
  5 siblings, 0 replies; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Leif Lindholm,
	Michael D Kinney, Gilbert Chen, Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Add RISC-V architecture on RISC-V EDK2 CI.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 .azurepipelines/Ubuntu-GCC5.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azurepipelines/Ubuntu-GCC5.yml b/.azurepipelines/Ubuntu-GCC5.yml
index a26a3a2cb2..7cd67c98da 100644
--- a/.azurepipelines/Ubuntu-GCC5.yml
+++ b/.azurepipelines/Ubuntu-GCC5.yml
@@ -2,6 +2,7 @@
 # Azure Pipeline build file for a build using ubuntu and GCC5
 #
 # Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 trigger:
@@ -14,5 +15,5 @@ jobs:
   parameters:
     tool_chain_tag: 'GCC5'
     vm_image: 'ubuntu-latest'
-    arch_list: "IA32,X64,ARM,AARCH64"
+    arch_list: "IA32,X64,ARM,AARCH64,RISCV64"
 
-- 
2.25.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [edk2/master PATCH RISC-V CI v1 6/6] .pytool: Add RISC-V architecture on RISC-V EDK2 CI.
  2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
                   ` (4 preceding siblings ...)
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 5/6] .azurepipelines: Add RISC-V architecture on " Abner Chang
@ 2020-03-04  5:26 ` Abner Chang
  2020-03-07 22:08   ` [edk2-devel] " Sean
  5 siblings, 1 reply; 13+ messages in thread
From: Abner Chang @ 2020-03-04  5:26 UTC (permalink / raw)
  To: devel
  Cc: abner.chang, Bret Barkelew, Sean Brogan, Leif Lindholm,
	Michael D Kinney, Gilbert Chen, Daniel Helmut Schaefer

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Add RISC-V architecture on RISC-V EDK2 CI testing.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 .pytool/CISettings.py | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index 79593d9dc5..2ef55e366d 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -1,6 +1,7 @@
 # @file
 #
 # Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 import os
@@ -49,15 +50,19 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
                 "ShellPkg",
                 "FatPkg",
                 "CryptoPkg",
-                "UnitTestFrameworkPkg"
+                "UnitTestFrameworkPkg",
+                "RiscVPkg",
+                "RiscVPlatformPkg"
                 )
 
     def GetArchitecturesSupported(self):
         ''' return iterable of edk2 architectures supported by this build '''
-        return ("IA32",
+        return (
+                "IA32",
                 "X64",
                 "ARM",
-                "AARCH64")
+                "AARCH64",
+                "RISCV64")
 
     def GetTargetsSupported(self):
         ''' return iterable of edk2 target tags supported by this build '''
@@ -130,6 +135,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
                 scopes += ("gcc_aarch64_linux",)
             if "ARM" in self.ActualArchitectures:
                 scopes += ("gcc_arm_linux",)
+            if "RISCV64" in self.ActualArchitectures:
+                scopes += ("gcc_riscv64_unknown",)
 
         return scopes
 
@@ -144,6 +151,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
             "CryptoPkg/Library/OpensslLib/openssl", False))
         rs.append(RequiredSubmodule(
             "UnitTestFrameworkPkg/Library/CmockaLib/cmocka", False))
+        rs.append(RequiredSubmodule(
+            "RiscVPkg/Library/RiscVOpensbiLib/opensbi", False))
         return rs
 
     def GetName(self):
-- 
2.25.0


^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 6/6] .pytool: Add RISC-V architecture on RISC-V EDK2 CI.
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 6/6] .pytool: " Abner Chang
@ 2020-03-07 22:08   ` Sean
  2020-03-09  1:31     ` Abner Chang
  0 siblings, 1 reply; 13+ messages in thread
From: Sean @ 2020-03-07 22:08 UTC (permalink / raw)
  To: Abner Chang, devel

[-- Attachment #1: Type: text/plain, Size: 281 bytes --]

I never saw a patch in the series that actually added the submodule to the .gitmodules file but maybe i missed that.  If that is approved then the changes to this file look ok.  I have no idea why all the line endings are shown but the substantial changes here look fine to me.

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture " Abner Chang
@ 2020-03-07 22:13   ` Sean
  2020-03-09  1:34     ` Abner Chang
  0 siblings, 1 reply; 13+ messages in thread
From: Sean @ 2020-03-07 22:13 UTC (permalink / raw)
  To: Abner Chang, devel

[-- Attachment #1: Type: text/plain, Size: 408 bytes --]

On Tue, Mar 3, 2020 at 10:02 PM, Abner Chang wrote:

> 
> BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml

Web extdeps can have a hash so we are sure we get the expected file.  My opinion is for edk2 extdeps we should use this feature.

https://github.com/tianocore/edk2-pytool-extensions/blob/master/docs/usability/using_extdep.md#sha256-optional

The rest of the changes look good.
Thanks
Sean

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V EDK2 CI.
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V " Abner Chang
@ 2020-03-07 22:15   ` Sean
  0 siblings, 0 replies; 13+ messages in thread
From: Sean @ 2020-03-07 22:15 UTC (permalink / raw)
  To: Abner Chang, devel

[-- Attachment #1: Type: text/plain, Size: 262 bytes --]

Given that i think MdeModulePkg depending on ArmPkg is a bug that should get fixed, I don't agree with this change.  If there is an api needed for these different architectures then the definition of the API should move to Mde or MdeModulePkg.

Thanks
Sean

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg yaml file for EDK2 CI.
  2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg " Abner Chang
@ 2020-03-07 22:18   ` Sean
  0 siblings, 0 replies; 13+ messages in thread
From: Sean @ 2020-03-07 22:18 UTC (permalink / raw)
  To: Abner Chang, devel

[-- Attachment #1: Type: text/plain, Size: 301 bytes --]

The options in the spellcheck object seem to be copied from a different package.  I would start with an empty set and then add in "ExtendWords" for unique and valid words in the package.  I would also suggest that for any new package we should start with the spellcheck on (not in auditonly mode).

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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 6/6] .pytool: Add RISC-V architecture on RISC-V EDK2 CI.
  2020-03-07 22:08   ` [edk2-devel] " Sean
@ 2020-03-09  1:31     ` Abner Chang
  0 siblings, 0 replies; 13+ messages in thread
From: Abner Chang @ 2020-03-09  1:31 UTC (permalink / raw)
  To: devel@edk2.groups.io, sean.brogan@microsoft.com


[-- Attachment #1.1: Type: text/plain, Size: 1212 bytes --]

Sean, the RISC-V edk2 port patches against to ek2-stating were reviewed. The submodule one attached FYR.

We have three sets of RISC-V edk2 port patches,

1.  Patches for RISC-V EDK2  CI enablement (This is what you are reviewing now).

2.  Patches for edk2 modules other than RISC-V ones, which fix the issues for building  packages respectively on RISC-V arch.

3 . RISC-V edk2 port

Patch of submodule is belong to #3 set.

We will have to make #1 and #2 to get in edk2 master and then submit #3 against to edk2/master, pull request to trigger CI as well.



Thanks

Abner


From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Sean via Groups.Io
Sent: Sunday, March 8, 2020 6:09 AM
To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; devel@edk2.groups.io
Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 6/6] .pytool: Add RISC-V architecture on RISC-V EDK2 CI.

I never saw a patch in the series that actually added the submodule to the .gitmodules file but maybe i missed that.  If that is approved then the changes to this file look ok.  I have no idea why all the line endings are shown but the substantial changes here look fine to me.


[-- Attachment #1.2: Type: text/html, Size: 6162 bytes --]

[-- Attachment #2: Type: message/rfc822, Size: 9766 bytes --]

From: Leif Lindholm <leif.lindholm@linaro.org>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>, "Chang, Abner (HPS SW/FW Technologist)" <abner.chang@hpe.com>
Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 27/29] edk2-staging/RISC-V-V2: Add submodule
Date: Thu, 26 Sep 2019 22:24:28 +0000
Message-ID: <20190926222428.GB25504@bivouac.eciton.net>

On Mon, Sep 23, 2019 at 08:31:53AM +0800, Abner Chang wrote:
> Add submodule opensbi under RiscVPkg. The current supported opensbi
> version for RISC-V edk2 port is commit ID:ce228ee (tags/v0.4).
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> ---
>  .gitmodules      | 16 ++++++++++------
>  RiscVPkg/opensbi |  1 +
>  2 files changed, 11 insertions(+), 6 deletions(-)
>  create mode 160000 RiscVPkg/opensbi
>
> diff --git a/.gitmodules b/.gitmodules
> index 508f0c1..6d3e28c 100644
> --- a/.gitmodules
> +++ b/.gitmodules
> @@ -1,6 +1,10 @@
> -[submodule "CryptoPkg/Library/OpensslLib/openssl"]
> -     path = CryptoPkg/Library/OpensslLib/openssl
> -     url = https://github.com/openssl/openssl
> -[submodule "SoftFloat"]
> -     path = ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3
> -     url = https://github.com/ucb-bar/berkeley-softfloat-3.git
> +[submodule "CryptoPkg/Library/OpensslLib/openssl"]
> +     path = CryptoPkg/Library/OpensslLib/openssl
> +     url = https://github.com/openssl/openssl
> +[submodule "SoftFloat"]
> +     path = ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3
> +     url = https://github.com/ucb-bar/berkeley-softfloat-3.git

Can you investigate why the pre-existing modules are deleted and
re-added as part of this patch?

Other than that, this is all good.

/
    Leif

> +[submodule "RiscVPkg/opensbi"]
> +     path = RiscVPkg/opensbi
> +     url = https://github.com/riscv/opensbi.git
> +
> diff --git a/RiscVPkg/opensbi b/RiscVPkg/opensbi
> new file mode 160000
> index 0000000..ce228ee
> --- /dev/null
> +++ b/RiscVPkg/opensbi
> @@ -0,0 +1 @@
> +Subproject commit ce228ee0919deb9957192d723eecc8aaae2697c6
> --
> 2.7.4
>
>
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^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.
  2020-03-07 22:13   ` [edk2-devel] " Sean
@ 2020-03-09  1:34     ` Abner Chang
  0 siblings, 0 replies; 13+ messages in thread
From: Abner Chang @ 2020-03-09  1:34 UTC (permalink / raw)
  To: Sean, devel@edk2.groups.io

[-- Attachment #1: Type: text/plain, Size: 760 bytes --]

This sounds good. Will send update with others.

From: sean.brogan via [] [mailto:sean.brogan=microsoft.com@[]]
Sent: Sunday, March 8, 2020 6:14 AM
To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; devel@edk2.groups.io
Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture for RISC-V EDK2 CI.

On Tue, Mar 3, 2020 at 10:02 PM, Abner Chang wrote:
BaseTools/Bin/gcc_riscv64_unknown_ext_dep.yaml
Web extdeps can have a hash so we are sure we get the expected file.  My opinion is for edk2 extdeps we should use this feature.

https://github.com/tianocore/edk2-pytool-extensions/blob/master/docs/usability/using_extdep.md#sha256-optional

The rest of the changes look good.
Thanks
Sean

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^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2020-03-09  1:34 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI Abner Chang
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg " Abner Chang
2020-03-07 22:18   ` [edk2-devel] " Sean
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V " Abner Chang
2020-03-07 22:15   ` [edk2-devel] " Sean
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture " Abner Chang
2020-03-07 22:13   ` [edk2-devel] " Sean
2020-03-09  1:34     ` Abner Chang
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 5/6] .azurepipelines: Add RISC-V architecture on " Abner Chang
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 6/6] .pytool: " Abner Chang
2020-03-07 22:08   ` [edk2-devel] " Sean
2020-03-09  1:31     ` Abner Chang

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