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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Bret Barkelew <Bret.Barkelew@microsoft.com>,
	Sean Brogan <sean.brogan@microsoft.com>,
	Leif Lindholm <leif@nuviainc.com>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Gilbert Chen <gilbert.chen@hpe.com>,
	Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
Subject: [edk2/master PATCH RISC-V CI v1 5/6] .azurepipelines: Add RISC-V architecture on RISC-V EDK2 CI.
Date: Wed,  4 Mar 2020 13:26:06 +0800	[thread overview]
Message-ID: <20200304052607.31801-6-abner.chang@hpe.com> (raw)
In-Reply-To: <20200304052607.31801-1-abner.chang@hpe.com>

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Add RISC-V architecture on RISC-V EDK2 CI.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
 .azurepipelines/Ubuntu-GCC5.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azurepipelines/Ubuntu-GCC5.yml b/.azurepipelines/Ubuntu-GCC5.yml
index a26a3a2cb2..7cd67c98da 100644
--- a/.azurepipelines/Ubuntu-GCC5.yml
+++ b/.azurepipelines/Ubuntu-GCC5.yml
@@ -2,6 +2,7 @@
 # Azure Pipeline build file for a build using ubuntu and GCC5
 #
 # Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 trigger:
@@ -14,5 +15,5 @@ jobs:
   parameters:
     tool_chain_tag: 'GCC5'
     vm_image: 'ubuntu-latest'
-    arch_list: "IA32,X64,ARM,AARCH64"
+    arch_list: "IA32,X64,ARM,AARCH64,RISCV64"
 
-- 
2.25.0


  parent reply	other threads:[~2020-03-04  6:02 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04  5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI Abner Chang
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg " Abner Chang
2020-03-07 22:18   ` [edk2-devel] " Sean
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V " Abner Chang
2020-03-07 22:15   ` [edk2-devel] " Sean
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture " Abner Chang
2020-03-07 22:13   ` [edk2-devel] " Sean
2020-03-09  1:34     ` Abner Chang
2020-03-04  5:26 ` Abner Chang [this message]
2020-03-04  5:26 ` [edk2/master PATCH RISC-V CI v1 6/6] .pytool: Add RISC-V architecture on " Abner Chang
2020-03-07 22:08   ` [edk2-devel] " Sean
2020-03-09  1:31     ` Abner Chang

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