From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Bret Barkelew <Bret.Barkelew@microsoft.com>,
Sean Brogan <sean.brogan@microsoft.com>,
Leif Lindholm <leif@nuviainc.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Gilbert Chen <gilbert.chen@hpe.com>,
Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
Subject: [edk2/master PATCH RISC-V CI v1 6/6] .pytool: Add RISC-V architecture on RISC-V EDK2 CI.
Date: Wed, 4 Mar 2020 13:26:07 +0800 [thread overview]
Message-ID: <20200304052607.31801-7-abner.chang@hpe.com> (raw)
In-Reply-To: <20200304052607.31801-1-abner.chang@hpe.com>
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Add RISC-V architecture on RISC-V EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
.pytool/CISettings.py | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index 79593d9dc5..2ef55e366d 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -1,6 +1,7 @@
# @file
#
# Copyright (c) Microsoft Corporation.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import os
@@ -49,15 +50,19 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"ShellPkg",
"FatPkg",
"CryptoPkg",
- "UnitTestFrameworkPkg"
+ "UnitTestFrameworkPkg",
+ "RiscVPkg",
+ "RiscVPlatformPkg"
)
def GetArchitecturesSupported(self):
''' return iterable of edk2 architectures supported by this build '''
- return ("IA32",
+ return (
+ "IA32",
"X64",
"ARM",
- "AARCH64")
+ "AARCH64",
+ "RISCV64")
def GetTargetsSupported(self):
''' return iterable of edk2 target tags supported by this build '''
@@ -130,6 +135,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
scopes += ("gcc_aarch64_linux",)
if "ARM" in self.ActualArchitectures:
scopes += ("gcc_arm_linux",)
+ if "RISCV64" in self.ActualArchitectures:
+ scopes += ("gcc_riscv64_unknown",)
return scopes
@@ -144,6 +151,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"CryptoPkg/Library/OpensslLib/openssl", False))
rs.append(RequiredSubmodule(
"UnitTestFrameworkPkg/Library/CmockaLib/cmocka", False))
+ rs.append(RequiredSubmodule(
+ "RiscVPkg/Library/RiscVOpensbiLib/opensbi", False))
return rs
def GetName(self):
--
2.25.0
next prev parent reply other threads:[~2020-03-04 6:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-04 5:26 [edk2/master PATCH RISC-V CI v1 0/6] RISC-V EDK2 CI configuration files Abner Chang
2020-03-04 5:26 ` [edk2/master PATCH RISC-V CI v1 1/6] RiscVPlatformPkg: Add RiscVPlatformPkg yaml file for EDK2 CI Abner Chang
2020-03-04 5:26 ` [edk2/master PATCH RISC-V CI v1 2/6] RiscVPkg: Add RiscVPkg " Abner Chang
2020-03-07 22:18 ` [edk2-devel] " Sean
2020-03-04 5:26 ` [edk2/master PATCH RISC-V CI v1 3/6] MdeModulePkg: Revise MdeModulePkg yaml file for RISC-V " Abner Chang
2020-03-07 22:15 ` [edk2-devel] " Sean
2020-03-04 5:26 ` [edk2/master PATCH RISC-V CI v1 4/6] BaseTools: Enable RISC-V architecture " Abner Chang
2020-03-07 22:13 ` [edk2-devel] " Sean
2020-03-09 1:34 ` Abner Chang
2020-03-04 5:26 ` [edk2/master PATCH RISC-V CI v1 5/6] .azurepipelines: Add RISC-V architecture on " Abner Chang
2020-03-04 5:26 ` Abner Chang [this message]
2020-03-07 22:08 ` [edk2-devel] [edk2/master PATCH RISC-V CI v1 6/6] .pytool: " Sean
2020-03-09 1:31 ` Abner Chang
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