From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by mx.groups.io with SMTP id smtpd.web10.10398.1583402437793394528 for ; Thu, 05 Mar 2020 02:00:38 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=xvLyhC8F; spf=pass (domain: linaro.org, ip: 209.85.221.68, mailfrom: ard.biesheuvel@linaro.org) Received: by mail-wr1-f68.google.com with SMTP id z15so6228364wrl.1 for ; Thu, 05 Mar 2020 02:00:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K78U94/uJ9ubrYlG0ubw+vo3btoMMElTZfcEns6X8NM=; b=xvLyhC8FKxPZl5s7qfAVi32w+R9/XdM0HHeHZHTKl95hlsr7TMtYon0eDK/J5WK/Xf QNOyUo15NQalwPFdVLImlUrSyUHQix8/Z1/mxO+OvI0B7+emt36luzzJwT/t+FkA5qxw xy54CsPTrw9oW21l5DRR5XUj1Pmus7+1cdgLApOoljPcuJF06ssWRF34lTaQrQsbfOgJ A4RKHo1U34dTdEz2+st71xcFFHhir6e7Er+mKbdAK7k5/jKFEJmL/4DMyJEpzk9xE3zx LmkdLGTAzBVswH2l47JzgiIpdRkfXxToHGoC/uZMTpNsp+YBNwC4NHICD5wvXv+Padbm p7QA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=K78U94/uJ9ubrYlG0ubw+vo3btoMMElTZfcEns6X8NM=; b=s0+oeF4E5T8P9LIOo1opIN18XkwvZyM3qDl3xrCjotwpcsTPzovxV/PqBOMYy9JnPQ ySqSs1dcSnNR7R3soucP22IXT65PjGCaNTGgs4PBA5k6A7/4xcorzK2bhJAOMzNVoHMT 3xF3qxK4TCg+ps5Wx53PGdf2bhuqxAotngeO5BXXu/IufR0GG8QEni9ewPuFuneGR1vz ce5BGeWRR1U8ZIVPoYVT2S4z7B2BciEveFwBMjWgLEVzT1pdaKQOjHIc19KSbj/3IF// tEytdCnVV8Z/3atciuuETW09A2X12nSZ4eQtc6UMdhXnYCCKUR7Pd2mJu/ZqqZGMnJZ7 bG/g== X-Gm-Message-State: ANhLgQ3M5buKOwN9FQuwXj1HwIFtaZh7kVumJoK77c3ns/LsIvZw5JbM yx2vmYFLJb5Ndgnyuz/3OiYcqDNe3D6HUA== X-Google-Smtp-Source: ADFU+vsvA9lVGpf+betYqGvmTCNWkHcPh2Z5Lr8mc/xUv1BcyNl6Po/ZtXEsaHqplgiGvpXnmckL5A== X-Received: by 2002:adf:ec50:: with SMTP id w16mr9514043wrn.9.1583402435881; Thu, 05 Mar 2020 02:00:35 -0800 (PST) Return-Path: Received: from e123331-lin.home ([2a01:cb1d:112:6f00:816e:ff0d:fb69:f613]) by smtp.gmail.com with ESMTPSA id g206sm8569051wme.46.2020.03.05.02.00.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Mar 2020 02:00:35 -0800 (PST) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif@nuviainc.com, Ard Biesheuvel Subject: [PATCH 1/2] ArmPkg/ArmMmuLib ARM: use AllocateAlignedPages() for alignment Date: Thu, 5 Mar 2020 11:00:29 +0100 Message-Id: <20200305100030.20048-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200305100030.20048-1-ard.biesheuvel@linaro.org> References: <20200305100030.20048-1-ard.biesheuvel@linaro.org> Instead of overallocating memory and align the resulting base address manually, use the AllocateAlignedPages () helper, which achieves the same, and might even manage that without leaking a chunk of memory of the same size as the allocation itself. While at it, fix up a variable declaration in the same hunk, and drop a comment whose contents add nothing to the following line of code. Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c index 7c7cad2c3d9d..0800ef560d89 100644 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c @@ -138,8 +138,9 @@ PopulateLevel2PageTable ( // Case where a virtual memory map descriptor overlapped a section entry // Allocate a Level2 Page Table for this Section - TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_PAGE_SIZE + TRANSLATION_TABLE_PAGE_ALIGNMENT)); - TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK; + TranslationTable = (UINTN)AllocateAlignedPages ( + EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE), + TRANSLATION_TABLE_PAGE_ALIGNMENT); // Translate the Section Descriptor into Page Descriptor SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE); @@ -162,9 +163,9 @@ PopulateLevel2PageTable ( return; } } else { - TranslationTable = (UINTN)AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_PAGE_SIZE + TRANSLATION_TABLE_PAGE_ALIGNMENT)); - TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK; - + TranslationTable = (UINTN)AllocateAlignedPages ( + EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE), + TRANSLATION_TABLE_PAGE_ALIGNMENT); ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE); *SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) | @@ -328,16 +329,16 @@ ArmConfigureMmu ( OUT UINTN *TranslationTableSize OPTIONAL ) { - VOID* TranslationTable; + VOID *TranslationTable; ARM_MEMORY_REGION_ATTRIBUTES TranslationTableAttribute; UINT32 TTBRAttributes; - // Allocate pages for translation table. - TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT)); + TranslationTable = AllocateAlignedPages ( + EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE), + TRANSLATION_TABLE_SECTION_ALIGNMENT); if (TranslationTable == NULL) { return RETURN_OUT_OF_RESOURCES; } - TranslationTable = (VOID*)(((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK); if (TranslationTableBase != NULL) { *TranslationTableBase = TranslationTable; -- 2.17.1