* [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-12 5:39 ` [edk2-devel] " Ni, Ray
2020-03-12 7:07 ` Ni, Ray
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 02/11] FmpDevicePkg: " Abner Chang
` (9 subsequent siblings)
10 siblings, 2 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel; +Cc: abner.chang, Ray Ni, Leif Lindholm, Gilbert Chen, Daniel Schaefer
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Add RISC-V architecture for EDK2 CI testing.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
FatPkg/FatPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
index 1676c2eb8f..d86256068b 100644
--- a/FatPkg/FatPkg.dsc
+++ b/FatPkg/FatPkg.dsc
@@ -4,6 +4,7 @@
# This Platform file is used to generate the Binary Fat Drivers
# for EDK II Prime release.
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -14,7 +15,7 @@
PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c
PLATFORM_VERSION = 0.3
DSC_SPECIFICATION = 0x00010005
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
OUTPUT_DIRECTORY = Build/Fat
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI Abner Chang
@ 2020-03-12 5:39 ` Ni, Ray
2020-03-12 6:27 ` Abner Chang
2020-03-12 7:07 ` Ni, Ray
1 sibling, 1 reply; 28+ messages in thread
From: Ni, Ray @ 2020-03-12 5:39 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com, Gao, Liming,
Kinney, Michael D
Cc: Leif Lindholm, Gilbert Chen, Daniel Schaefer
Abner,
Has the change to BaseTools supporting new ARCH been merged?
Liming, Mike,
Does INF specification need to be updated for this new ARCH?
Thanks,
Ray
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner Chang
> Sent: Friday, March 6, 2020 1:36 PM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Ni, Ray <ray.ni@intel.com>; Leif Lindholm <leif@nuviainc.com>; Gilbert Chen
> <gilbert.chen@hpe.com>; Daniel Schaefer <daniel.schaefer@hpe.com>
> Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
>
> BZ:2562:
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> Add RISC-V architecture for EDK2 CI testing.
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> ---
> FatPkg/FatPkg.dsc | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
> index 1676c2eb8f..d86256068b 100644
> --- a/FatPkg/FatPkg.dsc
> +++ b/FatPkg/FatPkg.dsc
> @@ -4,6 +4,7 @@
> # This Platform file is used to generate the Binary Fat Drivers
>
> # for EDK II Prime release.
>
> # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
>
> #
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> @@ -14,7 +15,7 @@
> PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c
>
> PLATFORM_VERSION = 0.3
>
> DSC_SPECIFICATION = 0x00010005
>
> - SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
>
> + SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
>
> OUTPUT_DIRECTORY = Build/Fat
>
> BUILD_TARGETS = DEBUG|RELEASE|NOOPT
>
> SKUID_IDENTIFIER = DEFAULT
>
> --
> 2.25.0
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
>
> View/Reply Online (#55584): https://edk2.groups.io/g/devel/message/55584
> Mute This Topic: https://groups.io/mt/71767323/1712937
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub [ray.ni@intel.com]
> -=-=-=-=-=-=
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-12 5:39 ` [edk2-devel] " Ni, Ray
@ 2020-03-12 6:27 ` Abner Chang
2020-03-12 6:47 ` Liming Gao
0 siblings, 1 reply; 28+ messages in thread
From: Abner Chang @ 2020-03-12 6:27 UTC (permalink / raw)
To: devel@edk2.groups.io, ray.ni@intel.com, Gao, Liming,
Kinney, Michael D
Cc: Leif Lindholm, Chen, Gilbert, Schaefer, Daniel (DualStudy)
> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Ni,
> Ray
> Sent: Thursday, March 12, 2020 1:40 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>; Gao, Liming <liming.gao@intel.com>; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>
> Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1
> 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
>
> Abner,
> Has the change to BaseTools supporting new ARCH been merged?
No, not yet. The whole changes to RISCV64 ARCH is in the separate huge set of patches. We have three sets of RISC-V edk2 port.
1. Patches for RISC-V EDK2 CI enablement
2. Patches for edk2 modules other than RISC-V ones, which fix the issues for building packages respectively on RISC-V arch.
3 . RISC-V edk2 port
The patch needs your Reviewed-by is belong to #2. We can have a PR for #3 and trigger CI testing once #1 and #2 are merged to master.
>
> Liming, Mike,
> Does INF specification need to be updated for this new ARCH?
Good question, how to submit the changes to these specs?
>
> Thanks,
> Ray
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner
> > Chang
> > Sent: Friday, March 6, 2020 1:36 PM
> > To: devel@edk2.groups.io
> > Cc: abner.chang@hpe.com; Ni, Ray <ray.ni@intel.com>; Leif Lindholm
> > <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>; Daniel
> > Schaefer <daniel.schaefer@hpe.com>
> > Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1
> 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> >
> > BZ:2562:
> > INVALID URI REMOVED
> > e.org_show-5Fbug.cgi-3Fid-
> 3D2562&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_
> >
> SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKB
> Egf8jkKDBs
> > rX81gAFwMi_pmEH2-
> g&s=7pymX9FxJA5arZHTI9zd_qr3b2Jk2tx3OVff9UkxoW4&e=
> >
> > Add RISC-V architecture for EDK2 CI testing.
> >
> > Signed-off-by: Abner Chang <abner.chang@hpe.com>
> >
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>
> > Cc: Gilbert Chen <gilbert.chen@hpe.com>
> > Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> > ---
> > FatPkg/FatPkg.dsc | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc index
> > 1676c2eb8f..d86256068b 100644
> > --- a/FatPkg/FatPkg.dsc
> > +++ b/FatPkg/FatPkg.dsc
> > @@ -4,6 +4,7 @@
> > # This Platform file is used to generate the Binary Fat Drivers
> >
> > # for EDK II Prime release.
> >
> > # Copyright (c) 2007 - 2018, Intel Corporation. All rights
> > reserved.<BR>
> >
> > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All
> > +rights reserved.<BR>
> >
> > #
> >
> > # SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > #
> >
> > @@ -14,7 +15,7 @@
> > PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c
> >
> > PLATFORM_VERSION = 0.3
> >
> > DSC_SPECIFICATION = 0x00010005
> >
> > - SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
> >
> > + SUPPORTED_ARCHITECTURES =
> IA32|X64|EBC|ARM|AARCH64|RISCV64
> >
> > OUTPUT_DIRECTORY = Build/Fat
> >
> > BUILD_TARGETS = DEBUG|RELEASE|NOOPT
> >
> > SKUID_IDENTIFIER = DEFAULT
> >
> > --
> > 2.25.0
> >
> >
> > -=-=-=-=-=-=
> > Groups.io Links: You receive all messages sent to this group.
> >
> > View/Reply Online (#55584):
> > INVALID URI REMOVED
> 3A__edk2.groups.io_g_
> >
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> 6FZBN4Vgi4U
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> 3A__groups.io_mt_7176
> >
> 7323_1712937&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_SN6FZBN4V
> gi4Ulkskz6q
> >
> U3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKDBsrX81gAFwMi
> _pmEH2-g&s
> > =wuAcZWk-ZDd7lyPIz4_Ph3LwBqgNanz3lag5-evIjns&e=
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> > Unsubscribe: INVALID URI REMOVED
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> ugjVyUKBEgf8jkKDBsrX81gAFwMi_pmEH2-g&s=dAyFUfd07U1tFQRk-
> aK_WytEXVsMhZszgAPW8IoXljA&e= [ray.ni@intel.com]
> > -=-=-=-=-=-=
>
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-12 6:27 ` Abner Chang
@ 2020-03-12 6:47 ` Liming Gao
2020-03-20 1:16 ` Michael D Kinney
0 siblings, 1 reply; 28+ messages in thread
From: Liming Gao @ 2020-03-12 6:47 UTC (permalink / raw)
To: Chang, Abner (HPS SW/FW Technologist), devel@edk2.groups.io,
Ni, Ray, Kinney, Michael D
Cc: Leif Lindholm, Chen, Gilbert, Schaefer, Daniel (DualStudy)
Edk2 spec are listed in https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Specifications
This change requires to update INF/DEC/DSC/FDF/Build spec. You can find their github repo in the above link. Then, create git patch for the change.
Thanks
Liming
-----Original Message-----
From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>
Sent: 2020年3月12日 14:27
To: devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>; Gao, Liming <liming.gao@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy) <daniel.schaefer@hpe.com>
Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Ni, Ray
> Sent: Thursday, March 12, 2020 1:40 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>; Gao, Liming <liming.gao@intel.com>; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>
> Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1
> 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
>
> Abner,
> Has the change to BaseTools supporting new ARCH been merged?
No, not yet. The whole changes to RISCV64 ARCH is in the separate huge set of patches. We have three sets of RISC-V edk2 port.
1. Patches for RISC-V EDK2 CI enablement 2. Patches for edk2 modules other than RISC-V ones, which fix the issues for building packages respectively on RISC-V arch.
3 . RISC-V edk2 port
The patch needs your Reviewed-by is belong to #2. We can have a PR for #3 and trigger CI testing once #1 and #2 are merged to master.
>
> Liming, Mike,
> Does INF specification need to be updated for this new ARCH?
Good question, how to submit the changes to these specs?
>
> Thanks,
> Ray
>
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner
> > Chang
> > Sent: Friday, March 6, 2020 1:36 PM
> > To: devel@edk2.groups.io
> > Cc: abner.chang@hpe.com; Ni, Ray <ray.ni@intel.com>; Leif Lindholm
> > <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>; Daniel
> > Schaefer <daniel.schaefer@hpe.com>
> > Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1
> 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> >
> > BZ:2562:
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__bugzilla.tianoc
> > or
> > e.org_show-5Fbug.cgi-3Fid-
> 3D2562&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_
> >
> SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKB
> Egf8jkKDBs
> > rX81gAFwMi_pmEH2-
> g&s=7pymX9FxJA5arZHTI9zd_qr3b2Jk2tx3OVff9UkxoW4&e=
> >
> > Add RISC-V architecture for EDK2 CI testing.
> >
> > Signed-off-by: Abner Chang <abner.chang@hpe.com>
> >
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>
> > Cc: Gilbert Chen <gilbert.chen@hpe.com>
> > Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> > ---
> > FatPkg/FatPkg.dsc | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc index
> > 1676c2eb8f..d86256068b 100644
> > --- a/FatPkg/FatPkg.dsc
> > +++ b/FatPkg/FatPkg.dsc
> > @@ -4,6 +4,7 @@
> > # This Platform file is used to generate the Binary Fat Drivers
> >
> > # for EDK II Prime release.
> >
> > # Copyright (c) 2007 - 2018, Intel Corporation. All rights
> > reserved.<BR>
> >
> > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP.
> > +All rights reserved.<BR>
> >
> > #
> >
> > # SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > #
> >
> > @@ -14,7 +15,7 @@
> > PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c
> >
> > PLATFORM_VERSION = 0.3
> >
> > DSC_SPECIFICATION = 0x00010005
> >
> > - SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
> >
> > + SUPPORTED_ARCHITECTURES =
> IA32|X64|EBC|ARM|AARCH64|RISCV64
> >
> > OUTPUT_DIRECTORY = Build/Fat
> >
> > BUILD_TARGETS = DEBUG|RELEASE|NOOPT
> >
> > SKUID_IDENTIFIER = DEFAULT
> >
> > --
> > 2.25.0
> >
> >
> > -=-=-=-=-=-=
> > Groups.io Links: You receive all messages sent to this group.
> >
> > View/Reply Online (#55584):
> > https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__edk2.groups.io_g_
> >
> devel_message_55584&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_SN
> 6FZBN4Vgi4U
> >
> lkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKDBsrX81g
> AFwMi_pm
> > EH2-g&s=WRly7Kh6eK9ppe59UcH-U5xBt7Lsp2K38n1jfPO1mKg&e=
> > Mute This Topic:
> > https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__groups.io_mt_7176
> >
> 7323_1712937&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_SN6FZBN4V
> gi4Ulkskz6q
> >
> U3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKDBsrX81gAFwMi
> _pmEH2-g&s
> > =wuAcZWk-ZDd7lyPIz4_Ph3LwBqgNanz3lag5-evIjns&e=
> > Group Owner: devel+owner@edk2.groups.io
> > Unsubscribe: https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__edk2.groups.io_g_devel_unsub&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2
> LFWg&r=_SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0Amn
> ugjVyUKBEgf8jkKDBsrX81gAFwMi_pmEH2-g&s=dAyFUfd07U1tFQRk-
> aK_WytEXVsMhZszgAPW8IoXljA&e= [ray.ni@intel.com]
> > -=-=-=-=-=-=
>
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-12 6:47 ` Liming Gao
@ 2020-03-20 1:16 ` Michael D Kinney
2020-03-20 3:28 ` Liming Gao
0 siblings, 1 reply; 28+ messages in thread
From: Michael D Kinney @ 2020-03-20 1:16 UTC (permalink / raw)
To: Gao, Liming, Chang, Abner (HPS SW/FW Technologist),
devel@edk2.groups.io, Ni, Ray, Kinney, Michael D
Cc: Leif Lindholm, Chen, Gilbert, Schaefer, Daniel (DualStudy)
Liming,
I agree that spec updates would be good so the CPU arch
name RISCV64 can be reserved.
However, I believe the current specs define their EBNF
to be flexible and support new CPU archs without a spec
change. As long as BaseTools follows the EBNF, no build
tool changes should be required to support a new arch.
For example the EBNF below supports <OA> that can be
and name.
<OA> ::= (a-zA-Z)(a-zA-Z0-9)*
<arch> ::= {"IA32"} {"X64"} {"EBC"} {<OA>} {"COMMON"}
I do not think any of the RISCV64 code changes should be
blocked by spec updates or BaseTools changes.
Do you agree?
Thanks,
Mike
> -----Original Message-----
> From: Gao, Liming <liming.gao@intel.com>
> Sent: Wednesday, March 11, 2020 11:47 PM
> To: Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>; devel@edk2.groups.io; Ni, Ray
> <ray.ni@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>
> Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI
> Code Changes v1 01/11] FatPkg: Add RISC-V architecture
> for EDK2 CI.
>
> Edk2 spec are listed in
> https://github.com/tianocore/tianocore.github.io/wiki/E
> DK-II-Specifications
>
> This change requires to update INF/DEC/DSC/FDF/Build
> spec. You can find their github repo in the above link.
> Then, create git patch for the change.
>
> Thanks
> Liming
> -----Original Message-----
> From: Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>
> Sent: 2020年3月12日 14:27
> To: devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>;
> Gao, Liming <liming.gao@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>
> Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI
> Code Changes v1 01/11] FatPkg: Add RISC-V architecture
> for EDK2 CI.
>
>
>
> > -----Original Message-----
> > From: devel@edk2.groups.io
> [mailto:devel@edk2.groups.io] On Behalf Of
> > Ni, Ray
> > Sent: Thursday, March 12, 2020 1:40 PM
> > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW
> Technologist)
> > <abner.chang@hpe.com>; Gao, Liming
> <liming.gao@intel.com>; Kinney,
> > Michael D <michael.d.kinney@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > <daniel.schaefer@hpe.com>
> > Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V
> CI Code Changes v1
> > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> >
> > Abner,
> > Has the change to BaseTools supporting new ARCH been
> merged?
> No, not yet. The whole changes to RISCV64 ARCH is in
> the separate huge set of patches. We have three sets of
> RISC-V edk2 port.
>
> 1. Patches for RISC-V EDK2 CI enablement 2. Patches
> for edk2 modules other than RISC-V ones, which fix the
> issues for building packages respectively on RISC-V
> arch.
> 3 . RISC-V edk2 port
>
> The patch needs your Reviewed-by is belong to #2. We
> can have a PR for #3 and trigger CI testing once #1 and
> #2 are merged to master.
>
> >
> > Liming, Mike,
> > Does INF specification need to be updated for this
> new ARCH?
> Good question, how to submit the changes to these
> specs?
>
> >
> > Thanks,
> > Ray
> >
> > > -----Original Message-----
> > > From: devel@edk2.groups.io <devel@edk2.groups.io>
> On Behalf Of Abner
> > > Chang
> > > Sent: Friday, March 6, 2020 1:36 PM
> > > To: devel@edk2.groups.io
> > > Cc: abner.chang@hpe.com; Ni, Ray
> <ray.ni@intel.com>; Leif Lindholm
> > > <leif@nuviainc.com>; Gilbert Chen
> <gilbert.chen@hpe.com>; Daniel
> > > Schaefer <daniel.schaefer@hpe.com>
> > > Subject: [edk2-devel] [edk2/master PATCH RISC-V CI
> Code Changes v1
> > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> > >
> > > BZ:2562:
> > > https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__bugzilla.tianoc
> > > or
> > > e.org_show-5Fbug.cgi-3Fid-
> > 3D2562&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_
> > >
> >
> SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0Amnugj
> VyUKB
> > Egf8jkKDBs
> > > rX81gAFwMi_pmEH2-
> > g&s=7pymX9FxJA5arZHTI9zd_qr3b2Jk2tx3OVff9UkxoW4&e=
> > >
> > > Add RISC-V architecture for EDK2 CI testing.
> > >
> > > Signed-off-by: Abner Chang <abner.chang@hpe.com>
> > >
> > > Cc: Ray Ni <ray.ni@intel.com>
> > > Cc: Leif Lindholm <leif@nuviainc.com>
> > > Cc: Gilbert Chen <gilbert.chen@hpe.com>
> > > Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> > > ---
> > > FatPkg/FatPkg.dsc | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
> index
> > > 1676c2eb8f..d86256068b 100644
> > > --- a/FatPkg/FatPkg.dsc
> > > +++ b/FatPkg/FatPkg.dsc
> > > @@ -4,6 +4,7 @@
> > > # This Platform file is used to generate the
> Binary Fat Drivers
> > >
> > > # for EDK II Prime release.
> > >
> > > # Copyright (c) 2007 - 2018, Intel Corporation.
> All rights
> > > reserved.<BR>
> > >
> > > +# Copyright (c) 2020, Hewlett Packard Enterprise
> Development LP.
> > > +All rights reserved.<BR>
> > >
> > > #
> > >
> > > # SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > > #
> > >
> > > @@ -14,7 +15,7 @@
> > > PLATFORM_GUID = 25b55dbc-9d0b-
> 4a32-80da-46e1273d622c
> > >
> > > PLATFORM_VERSION = 0.3
> > >
> > > DSC_SPECIFICATION = 0x00010005
> > >
> > > - SUPPORTED_ARCHITECTURES =
> IA32|X64|EBC|ARM|AARCH64
> > >
> > > + SUPPORTED_ARCHITECTURES =
> > IA32|X64|EBC|ARM|AARCH64|RISCV64
> > >
> > > OUTPUT_DIRECTORY = Build/Fat
> > >
> > > BUILD_TARGETS =
> DEBUG|RELEASE|NOOPT
> > >
> > > SKUID_IDENTIFIER = DEFAULT
> > >
> > > --
> > > 2.25.0
> > >
> > >
> > > -=-=-=-=-=-=
> > > Groups.io Links: You receive all messages sent to
> this group.
> > >
> > > View/Reply Online (#55584):
> > > https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__edk2.groups.io_g_
> > >
> >
> devel_message_55584&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r
> =_SN
> > 6FZBN4Vgi4U
> > >
> >
> lkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKD
> BsrX81g
> > AFwMi_pm
> > > EH2-g&s=WRly7Kh6eK9ppe59UcH-
> U5xBt7Lsp2K38n1jfPO1mKg&e=
> > > Mute This Topic:
> > > https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__groups.io_mt_7176
> > >
> >
> 7323_1712937&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_SN6FZ
> BN4V
> > gi4Ulkskz6q
> > >
> >
> U3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKDBsrX81g
> AFwMi
> > _pmEH2-g&s
> > > =wuAcZWk-ZDd7lyPIz4_Ph3LwBqgNanz3lag5-evIjns&e=
> > > Group Owner: devel+owner@edk2.groups.io
> > > Unsubscribe:
> https://urldefense.proofpoint.com/v2/url?u=https-
> >
> 3A__edk2.groups.io_g_devel_unsub&d=DwIFAg&c=C5b8zRQO1mi
> GmBeVZ2
> >
> LFWg&r=_SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hd
> x0Amn
> > ugjVyUKBEgf8jkKDBsrX81gAFwMi_pmEH2-
> g&s=dAyFUfd07U1tFQRk-
> > aK_WytEXVsMhZszgAPW8IoXljA&e= [ray.ni@intel.com]
> > > -=-=-=-=-=-=
> >
> >
> >
>
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-20 1:16 ` Michael D Kinney
@ 2020-03-20 3:28 ` Liming Gao
2020-03-20 3:49 ` Bob Feng
0 siblings, 1 reply; 28+ messages in thread
From: Liming Gao @ 2020-03-20 3:28 UTC (permalink / raw)
To: Kinney, Michael D, Chang, Abner (HPS SW/FW Technologist),
devel@edk2.groups.io, Ni, Ray, Feng, Bob C
Cc: Leif Lindholm, Chen, Gilbert, Schaefer, Daniel (DualStudy)
Include Bob to confirm BaseTools behavior.
Thanks
Liming
> -----Original Message-----
> From: Kinney, Michael D <michael.d.kinney@intel.com>
> Sent: Friday, March 20, 2020 9:17 AM
> To: Gao, Liming <liming.gao@intel.com>; Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; devel@edk2.groups.io;
> Ni, Ray <ray.ni@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>
> Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
>
> Liming,
>
> I agree that spec updates would be good so the CPU arch
> name RISCV64 can be reserved.
>
> However, I believe the current specs define their EBNF
> to be flexible and support new CPU archs without a spec
> change. As long as BaseTools follows the EBNF, no build
> tool changes should be required to support a new arch.
>
> For example the EBNF below supports <OA> that can be
> and name.
>
> <OA> ::= (a-zA-Z)(a-zA-Z0-9)*
> <arch> ::= {"IA32"} {"X64"} {"EBC"} {<OA>} {"COMMON"}
>
> I do not think any of the RISCV64 code changes should be
> blocked by spec updates or BaseTools changes.
>
> Do you agree?
>
> Thanks,
>
> Mike
>
>
> > -----Original Message-----
> > From: Gao, Liming <liming.gao@intel.com>
> > Sent: Wednesday, March 11, 2020 11:47 PM
> > To: Chang, Abner (HPS SW/FW Technologist)
> > <abner.chang@hpe.com>; devel@edk2.groups.io; Ni, Ray
> > <ray.ni@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > <daniel.schaefer@hpe.com>
> > Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI
> > Code Changes v1 01/11] FatPkg: Add RISC-V architecture
> > for EDK2 CI.
> >
> > Edk2 spec are listed in
> > https://github.com/tianocore/tianocore.github.io/wiki/E
> > DK-II-Specifications
> >
> > This change requires to update INF/DEC/DSC/FDF/Build
> > spec. You can find their github repo in the above link.
> > Then, create git patch for the change.
> >
> > Thanks
> > Liming
> > -----Original Message-----
> > From: Chang, Abner (HPS SW/FW Technologist)
> > <abner.chang@hpe.com>
> > Sent: 2020年3月12日 14:27
> > To: devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>;
> > Gao, Liming <liming.gao@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > <daniel.schaefer@hpe.com>
> > Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI
> > Code Changes v1 01/11] FatPkg: Add RISC-V architecture
> > for EDK2 CI.
> >
> >
> >
> > > -----Original Message-----
> > > From: devel@edk2.groups.io
> > [mailto:devel@edk2.groups.io] On Behalf Of
> > > Ni, Ray
> > > Sent: Thursday, March 12, 2020 1:40 PM
> > > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW
> > Technologist)
> > > <abner.chang@hpe.com>; Gao, Liming
> > <liming.gao@intel.com>; Kinney,
> > > Michael D <michael.d.kinney@intel.com>
> > > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > > <daniel.schaefer@hpe.com>
> > > Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V
> > CI Code Changes v1
> > > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> > >
> > > Abner,
> > > Has the change to BaseTools supporting new ARCH been
> > merged?
> > No, not yet. The whole changes to RISCV64 ARCH is in
> > the separate huge set of patches. We have three sets of
> > RISC-V edk2 port.
> >
> > 1. Patches for RISC-V EDK2 CI enablement 2. Patches
> > for edk2 modules other than RISC-V ones, which fix the
> > issues for building packages respectively on RISC-V
> > arch.
> > 3 . RISC-V edk2 port
> >
> > The patch needs your Reviewed-by is belong to #2. We
> > can have a PR for #3 and trigger CI testing once #1 and
> > #2 are merged to master.
> >
> > >
> > > Liming, Mike,
> > > Does INF specification need to be updated for this
> > new ARCH?
> > Good question, how to submit the changes to these
> > specs?
> >
> > >
> > > Thanks,
> > > Ray
> > >
> > > > -----Original Message-----
> > > > From: devel@edk2.groups.io <devel@edk2.groups.io>
> > On Behalf Of Abner
> > > > Chang
> > > > Sent: Friday, March 6, 2020 1:36 PM
> > > > To: devel@edk2.groups.io
> > > > Cc: abner.chang@hpe.com; Ni, Ray
> > <ray.ni@intel.com>; Leif Lindholm
> > > > <leif@nuviainc.com>; Gilbert Chen
> > <gilbert.chen@hpe.com>; Daniel
> > > > Schaefer <daniel.schaefer@hpe.com>
> > > > Subject: [edk2-devel] [edk2/master PATCH RISC-V CI
> > Code Changes v1
> > > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> > > >
> > > > BZ:2562:
> > > > https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__bugzilla.tianoc
> > > > or
> > > > e.org_show-5Fbug.cgi-3Fid-
> > > 3D2562&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_
> > > >
> > >
> > SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0Amnugj
> > VyUKB
> > > Egf8jkKDBs
> > > > rX81gAFwMi_pmEH2-
> > > g&s=7pymX9FxJA5arZHTI9zd_qr3b2Jk2tx3OVff9UkxoW4&e=
> > > >
> > > > Add RISC-V architecture for EDK2 CI testing.
> > > >
> > > > Signed-off-by: Abner Chang <abner.chang@hpe.com>
> > > >
> > > > Cc: Ray Ni <ray.ni@intel.com>
> > > > Cc: Leif Lindholm <leif@nuviainc.com>
> > > > Cc: Gilbert Chen <gilbert.chen@hpe.com>
> > > > Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> > > > ---
> > > > FatPkg/FatPkg.dsc | 3 ++-
> > > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
> > index
> > > > 1676c2eb8f..d86256068b 100644
> > > > --- a/FatPkg/FatPkg.dsc
> > > > +++ b/FatPkg/FatPkg.dsc
> > > > @@ -4,6 +4,7 @@
> > > > # This Platform file is used to generate the
> > Binary Fat Drivers
> > > >
> > > > # for EDK II Prime release.
> > > >
> > > > # Copyright (c) 2007 - 2018, Intel Corporation.
> > All rights
> > > > reserved.<BR>
> > > >
> > > > +# Copyright (c) 2020, Hewlett Packard Enterprise
> > Development LP.
> > > > +All rights reserved.<BR>
> > > >
> > > > #
> > > >
> > > > # SPDX-License-Identifier: BSD-2-Clause-Patent
> > > >
> > > > #
> > > >
> > > > @@ -14,7 +15,7 @@
> > > > PLATFORM_GUID = 25b55dbc-9d0b-
> > 4a32-80da-46e1273d622c
> > > >
> > > > PLATFORM_VERSION = 0.3
> > > >
> > > > DSC_SPECIFICATION = 0x00010005
> > > >
> > > > - SUPPORTED_ARCHITECTURES =
> > IA32|X64|EBC|ARM|AARCH64
> > > >
> > > > + SUPPORTED_ARCHITECTURES =
> > > IA32|X64|EBC|ARM|AARCH64|RISCV64
> > > >
> > > > OUTPUT_DIRECTORY = Build/Fat
> > > >
> > > > BUILD_TARGETS =
> > DEBUG|RELEASE|NOOPT
> > > >
> > > > SKUID_IDENTIFIER = DEFAULT
> > > >
> > > > --
> > > > 2.25.0
> > > >
> > > >
> > > > -=-=-=-=-=-=
> > > > Groups.io Links: You receive all messages sent to
> > this group.
> > > >
> > > > View/Reply Online (#55584):
> > > > https://urldefense.proofpoint.com/v2/url?u=https-
> > > 3A__edk2.groups.io_g_
> > > >
> > >
> > devel_message_55584&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r
> > =_SN
> > > 6FZBN4Vgi4U
> > > >
> > >
> > lkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKD
> > BsrX81g
> > > AFwMi_pm
> > > > EH2-g&s=WRly7Kh6eK9ppe59UcH-
> > U5xBt7Lsp2K38n1jfPO1mKg&e=
> > > > Mute This Topic:
> > > > https://urldefense.proofpoint.com/v2/url?u=https-
> > > 3A__groups.io_mt_7176
> > > >
> > >
> > 7323_1712937&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_SN6FZ
> > BN4V
> > > gi4Ulkskz6q
> > > >
> > >
> > U3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKDBsrX81g
> > AFwMi
> > > _pmEH2-g&s
> > > > =wuAcZWk-ZDd7lyPIz4_Ph3LwBqgNanz3lag5-evIjns&e=
> > > > Group Owner: devel+owner@edk2.groups.io
> > > > Unsubscribe:
> > https://urldefense.proofpoint.com/v2/url?u=https-
> > >
> > 3A__edk2.groups.io_g_devel_unsub&d=DwIFAg&c=C5b8zRQO1mi
> > GmBeVZ2
> > >
> > LFWg&r=_SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hd
> > x0Amn
> > > ugjVyUKBEgf8jkKDBsrX81gAFwMi_pmEH2-
> > g&s=dAyFUfd07U1tFQRk-
> > > aK_WytEXVsMhZszgAPW8IoXljA&e= [ray.ni@intel.com]
> > > > -=-=-=-=-=-=
> > >
> > >
> > >
> >
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-20 3:28 ` Liming Gao
@ 2020-03-20 3:49 ` Bob Feng
0 siblings, 0 replies; 28+ messages in thread
From: Bob Feng @ 2020-03-20 3:49 UTC (permalink / raw)
To: Gao, Liming, Kinney, Michael D,
Chang, Abner (HPS SW/FW Technologist), devel@edk2.groups.io,
Ni, Ray
Cc: Leif Lindholm, Chen, Gilbert, Schaefer, Daniel (DualStudy)
I agree with Mike.
No need to change BaseTools.
Thanks,
Bob
-----Original Message-----
From: Gao, Liming
Sent: Friday, March 20, 2020 11:28 AM
To: Kinney, Michael D <michael.d.kinney@intel.com>; Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>; devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>; Feng, Bob C <bob.c.feng@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy) <daniel.schaefer@hpe.com>
Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
Include Bob to confirm BaseTools behavior.
Thanks
Liming
> -----Original Message-----
> From: Kinney, Michael D <michael.d.kinney@intel.com>
> Sent: Friday, March 20, 2020 9:17 AM
> To: Gao, Liming <liming.gao@intel.com>; Chang, Abner (HPS SW/FW
> Technologist) <abner.chang@hpe.com>; devel@edk2.groups.io; Ni, Ray
> <ray.ni@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schaefer@hpe.com>
> Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
>
> Liming,
>
> I agree that spec updates would be good so the CPU arch name RISCV64
> can be reserved.
>
> However, I believe the current specs define their EBNF to be flexible
> and support new CPU archs without a spec change. As long as BaseTools
> follows the EBNF, no build tool changes should be required to support
> a new arch.
>
> For example the EBNF below supports <OA> that can be and name.
>
> <OA> ::= (a-zA-Z)(a-zA-Z0-9)*
> <arch> ::= {"IA32"} {"X64"} {"EBC"} {<OA>} {"COMMON"}
>
> I do not think any of the RISCV64 code changes should be blocked by
> spec updates or BaseTools changes.
>
> Do you agree?
>
> Thanks,
>
> Mike
>
>
> > -----Original Message-----
> > From: Gao, Liming <liming.gao@intel.com>
> > Sent: Wednesday, March 11, 2020 11:47 PM
> > To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>;
> > devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > <daniel.schaefer@hpe.com>
> > Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes
> > v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> >
> > Edk2 spec are listed in
> > https://github.com/tianocore/tianocore.github.io/wiki/E
> > DK-II-Specifications
> >
> > This change requires to update INF/DEC/DSC/FDF/Build spec. You can
> > find their github repo in the above link.
> > Then, create git patch for the change.
> >
> > Thanks
> > Liming
> > -----Original Message-----
> > From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>
> > Sent: 2020年3月12日 14:27
> > To: devel@edk2.groups.io; Ni, Ray <ray.ni@intel.com>; Gao, Liming
> > <liming.gao@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > <daniel.schaefer@hpe.com>
> > Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes
> > v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> >
> >
> >
> > > -----Original Message-----
> > > From: devel@edk2.groups.io
> > [mailto:devel@edk2.groups.io] On Behalf Of
> > > Ni, Ray
> > > Sent: Thursday, March 12, 2020 1:40 PM
> > > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW
> > Technologist)
> > > <abner.chang@hpe.com>; Gao, Liming
> > <liming.gao@intel.com>; Kinney,
> > > Michael D <michael.d.kinney@intel.com>
> > > Cc: Leif Lindholm <leif@nuviainc.com>; Chen, Gilbert
> > > <gilbert.chen@hpe.com>; Schaefer, Daniel (DualStudy)
> > > <daniel.schaefer@hpe.com>
> > > Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V
> > CI Code Changes v1
> > > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> > >
> > > Abner,
> > > Has the change to BaseTools supporting new ARCH been
> > merged?
> > No, not yet. The whole changes to RISCV64 ARCH is in the separate
> > huge set of patches. We have three sets of RISC-V edk2 port.
> >
> > 1. Patches for RISC-V EDK2 CI enablement 2. Patches for edk2
> > modules other than RISC-V ones, which fix the issues for building
> > packages respectively on RISC-V arch.
> > 3 . RISC-V edk2 port
> >
> > The patch needs your Reviewed-by is belong to #2. We can have a PR
> > for #3 and trigger CI testing once #1 and
> > #2 are merged to master.
> >
> > >
> > > Liming, Mike,
> > > Does INF specification need to be updated for this
> > new ARCH?
> > Good question, how to submit the changes to these specs?
> >
> > >
> > > Thanks,
> > > Ray
> > >
> > > > -----Original Message-----
> > > > From: devel@edk2.groups.io <devel@edk2.groups.io>
> > On Behalf Of Abner
> > > > Chang
> > > > Sent: Friday, March 6, 2020 1:36 PM
> > > > To: devel@edk2.groups.io
> > > > Cc: abner.chang@hpe.com; Ni, Ray
> > <ray.ni@intel.com>; Leif Lindholm
> > > > <leif@nuviainc.com>; Gilbert Chen
> > <gilbert.chen@hpe.com>; Daniel
> > > > Schaefer <daniel.schaefer@hpe.com>
> > > > Subject: [edk2-devel] [edk2/master PATCH RISC-V CI
> > Code Changes v1
> > > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> > > >
> > > > BZ:2562:
> > > > https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__bugzilla.tianoc
> > > > or
> > > > e.org_show-5Fbug.cgi-3Fid-
> > > 3D2562&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_
> > > >
> > >
> > SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0Amnugj
> > VyUKB
> > > Egf8jkKDBs
> > > > rX81gAFwMi_pmEH2-
> > > g&s=7pymX9FxJA5arZHTI9zd_qr3b2Jk2tx3OVff9UkxoW4&e=
> > > >
> > > > Add RISC-V architecture for EDK2 CI testing.
> > > >
> > > > Signed-off-by: Abner Chang <abner.chang@hpe.com>
> > > >
> > > > Cc: Ray Ni <ray.ni@intel.com>
> > > > Cc: Leif Lindholm <leif@nuviainc.com>
> > > > Cc: Gilbert Chen <gilbert.chen@hpe.com>
> > > > Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> > > > ---
> > > > FatPkg/FatPkg.dsc | 3 ++-
> > > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
> > index
> > > > 1676c2eb8f..d86256068b 100644
> > > > --- a/FatPkg/FatPkg.dsc
> > > > +++ b/FatPkg/FatPkg.dsc
> > > > @@ -4,6 +4,7 @@
> > > > # This Platform file is used to generate the
> > Binary Fat Drivers
> > > >
> > > > # for EDK II Prime release.
> > > >
> > > > # Copyright (c) 2007 - 2018, Intel Corporation.
> > All rights
> > > > reserved.<BR>
> > > >
> > > > +# Copyright (c) 2020, Hewlett Packard Enterprise
> > Development LP.
> > > > +All rights reserved.<BR>
> > > >
> > > > #
> > > >
> > > > # SPDX-License-Identifier: BSD-2-Clause-Patent
> > > >
> > > > #
> > > >
> > > > @@ -14,7 +15,7 @@
> > > > PLATFORM_GUID = 25b55dbc-9d0b-
> > 4a32-80da-46e1273d622c
> > > >
> > > > PLATFORM_VERSION = 0.3
> > > >
> > > > DSC_SPECIFICATION = 0x00010005
> > > >
> > > > - SUPPORTED_ARCHITECTURES =
> > IA32|X64|EBC|ARM|AARCH64
> > > >
> > > > + SUPPORTED_ARCHITECTURES =
> > > IA32|X64|EBC|ARM|AARCH64|RISCV64
> > > >
> > > > OUTPUT_DIRECTORY = Build/Fat
> > > >
> > > > BUILD_TARGETS =
> > DEBUG|RELEASE|NOOPT
> > > >
> > > > SKUID_IDENTIFIER = DEFAULT
> > > >
> > > > --
> > > > 2.25.0
> > > >
> > > >
> > > > -=-=-=-=-=-=
> > > > Groups.io Links: You receive all messages sent to
> > this group.
> > > >
> > > > View/Reply Online (#55584):
> > > > https://urldefense.proofpoint.com/v2/url?u=https-
> > > 3A__edk2.groups.io_g_
> > > >
> > >
> > devel_message_55584&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r
> > =_SN
> > > 6FZBN4Vgi4U
> > > >
> > >
> > lkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKD
> > BsrX81g
> > > AFwMi_pm
> > > > EH2-g&s=WRly7Kh6eK9ppe59UcH-
> > U5xBt7Lsp2K38n1jfPO1mKg&e=
> > > > Mute This Topic:
> > > > https://urldefense.proofpoint.com/v2/url?u=https-
> > > 3A__groups.io_mt_7176
> > > >
> > >
> > 7323_1712937&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_SN6FZ
> > BN4V
> > > gi4Ulkskz6q
> > > >
> > >
> > U3NYRO03nHp9P7Z5q59A3E&m=hdx0AmnugjVyUKBEgf8jkKDBsrX81g
> > AFwMi
> > > _pmEH2-g&s
> > > > =wuAcZWk-ZDd7lyPIz4_Ph3LwBqgNanz3lag5-evIjns&e=
> > > > Group Owner: devel+owner@edk2.groups.io
> > > > Unsubscribe:
> > https://urldefense.proofpoint.com/v2/url?u=https-
> > >
> > 3A__edk2.groups.io_g_devel_unsub&d=DwIFAg&c=C5b8zRQO1mi
> > GmBeVZ2
> > >
> > LFWg&r=_SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hd
> > x0Amn
> > > ugjVyUKBEgf8jkKDBsrX81gAFwMi_pmEH2-
> > g&s=dAyFUfd07U1tFQRk-
> > > aK_WytEXVsMhZszgAPW8IoXljA&e= [ray.ni@intel.com]
> > > > -=-=-=-=-=-=
> > >
> > >
> > >
> >
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI Abner Chang
2020-03-12 5:39 ` [edk2-devel] " Ni, Ray
@ 2020-03-12 7:07 ` Ni, Ray
1 sibling, 0 replies; 28+ messages in thread
From: Ni, Ray @ 2020-03-12 7:07 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com
Cc: Leif Lindholm, Gilbert Chen, Daniel Schaefer
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner Chang
> Sent: Friday, March 6, 2020 1:36 PM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Ni, Ray <ray.ni@intel.com>; Leif Lindholm <leif@nuviainc.com>; Gilbert Chen
> <gilbert.chen@hpe.com>; Daniel Schaefer <daniel.schaefer@hpe.com>
> Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
>
> BZ:2562:
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> Add RISC-V architecture for EDK2 CI testing.
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> ---
> FatPkg/FatPkg.dsc | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
> index 1676c2eb8f..d86256068b 100644
> --- a/FatPkg/FatPkg.dsc
> +++ b/FatPkg/FatPkg.dsc
> @@ -4,6 +4,7 @@
> # This Platform file is used to generate the Binary Fat Drivers
>
> # for EDK II Prime release.
>
> # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
>
> #
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> @@ -14,7 +15,7 @@
> PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c
>
> PLATFORM_VERSION = 0.3
>
> DSC_SPECIFICATION = 0x00010005
>
> - SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
>
> + SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
>
> OUTPUT_DIRECTORY = Build/Fat
>
> BUILD_TARGETS = DEBUG|RELEASE|NOOPT
>
> SKUID_IDENTIFIER = DEFAULT
>
> --
> 2.25.0
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
>
> View/Reply Online (#55584): https://edk2.groups.io/g/devel/message/55584
> Mute This Topic: https://groups.io/mt/71767323/1712937
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub [ray.ni@intel.com]
> -=-=-=-=-=-=
^ permalink raw reply [flat|nested] 28+ messages in thread
* [edk2/master PATCH RISC-V CI Code Changes v1 02/11] FmpDevicePkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-27 3:20 ` [edk2-devel] " Liming Gao
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 03/11] NetworkPkg: " Abner Chang
` (8 subsequent siblings)
10 siblings, 1 reply; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Liming Gao, Michael D Kinney, Leif Lindholm,
Gilbert Chen, Daniel Schaefer
Add RISC-V architecture for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/FmpDevicePkg/FmpDevicePkg.dsc b/FmpDevicePkg/FmpDevicePkg.dsc
index f4093d3837..b8fb9d7c19 100644
--- a/FmpDevicePkg/FmpDevicePkg.dsc
+++ b/FmpDevicePkg/FmpDevicePkg.dsc
@@ -8,6 +8,7 @@
#
# Copyright (c) 2016, Microsoft Corporation. All rights reserved.<BR>
# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -19,7 +20,7 @@
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/FmpDevicePkg
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 02/11] FmpDevicePkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 02/11] FmpDevicePkg: " Abner Chang
@ 2020-03-27 3:20 ` Liming Gao
0 siblings, 0 replies; 28+ messages in thread
From: Liming Gao @ 2020-03-27 3:20 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com
Cc: Kinney, Michael D, Leif Lindholm, Gilbert Chen, Daniel Schaefer
Reviewed-by: Liming Gao <liming.gao@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner Chang
Sent: 2020年3月6日 13:36
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com; Gao, Liming <liming.gao@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>; Leif Lindholm <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>; Daniel Schaefer <daniel.schaefer@hpe.com>
Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 02/11] FmpDevicePkg: Add RISC-V architecture for EDK2 CI.
Add RISC-V architecture for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/FmpDevicePkg/FmpDevicePkg.dsc b/FmpDevicePkg/FmpDevicePkg.dsc index f4093d3837..b8fb9d7c19 100644
--- a/FmpDevicePkg/FmpDevicePkg.dsc
+++ b/FmpDevicePkg/FmpDevicePkg.dsc
@@ -8,6 +8,7 @@
# # Copyright (c) 2016, Microsoft Corporation. All rights reserved.<BR> # Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> # # SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -19,7 +20,7 @@
PLATFORM_VERSION = 0.1 DSC_SPECIFICATION = 0x00010005 OUTPUT_DIRECTORY = Build/FmpDevicePkg- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64 BUILD_TARGETS = DEBUG|RELEASE|NOOPT SKUID_IDENTIFIER = DEFAULT --
2.25.0
-=-=-=-=-=-=
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#55575): https://edk2.groups.io/g/devel/message/55575
Mute This Topic: https://groups.io/mt/71767310/1759384
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [liming.gao@intel.com] -=-=-=-=-=-=
^ permalink raw reply [flat|nested] 28+ messages in thread
* [edk2/master PATCH RISC-V CI Code Changes v1 03/11] NetworkPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 01/11] FatPkg: Add RISC-V architecture for EDK2 CI Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 02/11] FmpDevicePkg: " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 04/11] NetworkPkg/HttpBootDxe: " Abner Chang
` (7 subsequent siblings)
10 siblings, 0 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Maciej Rabeda, Jiaxin Wu, Siyuan Fu, Leif Lindholm,
Gilbert Chen, Daniel Schaefer
Add RISC-V architecture for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
NetworkPkg/NetworkPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/NetworkPkg/NetworkPkg.dsc b/NetworkPkg/NetworkPkg.dsc
index b149453d26..503d828f91 100644
--- a/NetworkPkg/NetworkPkg.dsc
+++ b/NetworkPkg/NetworkPkg.dsc
@@ -3,7 +3,7 @@
#
# (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
-#
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -14,7 +14,7 @@
PLATFORM_VERSION = 0.98
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/NetworkPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* [edk2/master PATCH RISC-V CI Code Changes v1 04/11] NetworkPkg/HttpBootDxe: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (2 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 03/11] NetworkPkg: " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: " Abner Chang
` (6 subsequent siblings)
10 siblings, 0 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Maciej Rabeda, Jiaxin Wu, Siyuan Fu, Leif Lindholm,
Gilbert Chen, Daniel Schaefer
Add RISC-V architecture for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
index 74bbdac58e..606a466aae 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
@@ -2,6 +2,7 @@
Functions declaration related with DHCPv4 for HTTP boot driver.
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -35,6 +36,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_ARM
#elif defined (MDE_CPU_AARCH64)
#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_AARCH64
+#elif defined (MDE_CPU_RISCV64)
+#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_RISCV64
#elif defined (MDE_CPU_EBC)
#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE HTTP_CLIENT_ARCH_EBC
#endif
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (3 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 04/11] NetworkPkg/HttpBootDxe: " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-17 9:19 ` Xiaoyu Lu
` (2 more replies)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 06/11] MdePkg/Include: Add RISC-V related definitions " Abner Chang
` (5 subsequent siblings)
10 siblings, 3 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Daniel Schaefer, Jian J Wang, Xiaoyu Lu,
Leif Lindholm, Gilbert Chen
Add RISC-V architecture for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
---
CryptoPkg/CryptoPkg.dsc | 3 ++-
CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +++++-
CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 ++++
CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++
CryptoPkg/Library/TlsLib/TlsLib.inf | 4 ++--
CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 4 ++--
CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++-
11 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
index 4cb37b1349..f79ff331cf 100644
--- a/CryptoPkg/CryptoPkg.dsc
+++ b/CryptoPkg/CryptoPkg.dsc
@@ -3,6 +3,7 @@
# PEIM, DXE Driver, and SMM Driver with all crypto services enabled.
#
# Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -18,7 +19,7 @@
PLATFORM_VERSION = 0.98
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/CryptoPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
index 1bbe4f435a..a63ad66b4f 100644
--- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
@@ -7,6 +7,7 @@
# buffer overflow or integer overflow.
#
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -23,7 +24,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
@@ -72,6 +73,9 @@
[Sources.AARCH64]
Rand/CryptRand.c
+[Sources.RISCV64]
+ Rand/CryptRand.c
+
[Packages]
MdePkg/MdePkg.dec
CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
index bff308a4f5..e5b8ececc1 100644
--- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
@@ -12,6 +12,7 @@
# authenticode signature verification functions are not supported in this instance.
#
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -77,6 +78,9 @@
[Sources.AARCH64]
Rand/CryptRand.c
+[Sources.RISCV64]
+ Rand/CryptRand.c
+
[Packages]
MdePkg/MdePkg.dec
CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
index 8f53b0dfd0..9b4991cbb0 100644
--- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
+++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
@@ -7,6 +7,7 @@
# buffer overflow or integer overflow.
#
# Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -23,7 +24,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
index 9282b0fd6b..baa4433cbe 100644
--- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
@@ -3,6 +3,7 @@
# Protocol.
#
# Copyright (C) Microsoft Corporation. All rights reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -21,7 +22,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Packages]
diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
index 5c56e3320e..038ca71890 100644
--- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
@@ -3,6 +3,7 @@
# PPI.
#
# Copyright (C) Microsoft Corporation. All rights reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -20,7 +21,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Packages]
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index 3fa52f5543..01ee665183 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -2,6 +2,7 @@
# This module provides OpenSSL Library implementation.
#
# Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -661,6 +662,7 @@
GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
+ GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=format -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
index f1f9fbb938..5c2206f6fb 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
@@ -2,6 +2,7 @@
# This module provides OpenSSL Library implementation.
#
# Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -610,6 +611,7 @@
GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
+ GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
diff --git a/CryptoPkg/Library/TlsLib/TlsLib.inf b/CryptoPkg/Library/TlsLib/TlsLib.inf
index 2f3ce695c3..27209f4d7f 100644
--- a/CryptoPkg/Library/TlsLib/TlsLib.inf
+++ b/CryptoPkg/Library/TlsLib/TlsLib.inf
@@ -2,7 +2,7 @@
# SSL/TLS Wrapper Library Instance based on OpenSSL.
#
# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -19,7 +19,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
diff --git a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
index 33f0e7493f..b2920ddacf 100644
--- a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
+++ b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
@@ -2,7 +2,7 @@
# SSL/TLS Wrapper Null Library Instance.
#
# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -19,7 +19,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
diff --git a/CryptoPkg/Library/Include/CrtLibSupport.h b/CryptoPkg/Library/Include/CrtLibSupport.h
index 5a20ba636f..7a82f1d406 100644
--- a/CryptoPkg/Library/Include/CrtLibSupport.h
+++ b/CryptoPkg/Library/Include/CrtLibSupport.h
@@ -3,6 +3,7 @@
cryptographic library.
Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -43,7 +44,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define CONFIG_HEADER_BN_H
-#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) || defined(MDE_CPU_IA64)
+#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) || defined(MDE_CPU_IA64) || defined(MDE_CPU_RISCV64)
//
// With GCC we would normally use SIXTY_FOUR_BIT_LONG, but MSVC needs
// SIXTY_FOUR_BIT, because 'long' is 32-bit and only 'long long' is
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: " Abner Chang
@ 2020-03-17 9:19 ` Xiaoyu Lu
2020-07-13 9:27 ` [edk2-devel] " Laszlo Ersek
2020-07-22 0:58 ` Guomin Jiang
2 siblings, 0 replies; 28+ messages in thread
From: Xiaoyu Lu @ 2020-03-17 9:19 UTC (permalink / raw)
To: Abner Chang, devel@edk2.groups.io
Cc: Daniel Schaefer, Wang, Jian J, Leif Lindholm, Gilbert Chen
Reviewed-by: Xiaoyu Lu <xiaoyux.lu@intel.com>
> -----Original Message-----
> From: Abner Chang [mailto:abner.chang@hpe.com]
> Sent: Friday, March 6, 2020 1:36 PM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Daniel Schaefer <daniel.schaefer@hpe.com>;
> Wang, Jian J <jian.j.wang@intel.com>; Lu, XiaoyuX <xiaoyux.lu@intel.com>;
> Leif Lindholm <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>
> Subject: [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg:
> Add RISC-V architecture for EDK2 CI.
>
> Add RISC-V architecture for EDK2 CI testing.
>
> BZ:2562:
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> Co-authored-by: Daniel Schaefer <daniel.schaefer@hpe.com>
>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> ---
> CryptoPkg/CryptoPkg.dsc | 3 ++-
> CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +++++-
> CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 ++++
> CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
> CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
> CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
> CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
> CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++
> CryptoPkg/Library/TlsLib/TlsLib.inf | 4 ++--
> CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 4 ++--
> CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++-
> 11 files changed, 27 insertions(+), 10 deletions(-)
>
> diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
> index 4cb37b1349..f79ff331cf 100644
> --- a/CryptoPkg/CryptoPkg.dsc
> +++ b/CryptoPkg/CryptoPkg.dsc
> @@ -3,6 +3,7 @@
> # PEIM, DXE Driver, and SMM Driver with all crypto services enabled.
>
> #
>
> # Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -18,7 +19,7 @@
> PLATFORM_VERSION = 0.98
>
> DSC_SPECIFICATION = 0x00010005
>
> OUTPUT_DIRECTORY = Build/CryptoPkg
>
> - SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
>
> + SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
>
> BUILD_TARGETS = DEBUG|RELEASE|NOOPT
>
> SKUID_IDENTIFIER = DEFAULT
>
>
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> index 1bbe4f435a..a63ad66b4f 100644
> --- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> @@ -7,6 +7,7 @@
> # buffer overflow or integer overflow.
>
> #
>
> # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -23,7 +24,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> @@ -72,6 +73,9 @@
> [Sources.AARCH64]
>
> Rand/CryptRand.c
>
>
>
> +[Sources.RISCV64]
>
> + Rand/CryptRand.c
>
> +
>
> [Packages]
>
> MdePkg/MdePkg.dec
>
> CryptoPkg/CryptoPkg.dec
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> index bff308a4f5..e5b8ececc1 100644
> --- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> @@ -12,6 +12,7 @@
> # authenticode signature verification functions are not supported in this
> instance.
>
> #
>
> # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -77,6 +78,9 @@
> [Sources.AARCH64]
>
> Rand/CryptRand.c
>
>
>
> +[Sources.RISCV64]
>
> + Rand/CryptRand.c
>
> +
>
> [Packages]
>
> MdePkg/MdePkg.dec
>
> CryptoPkg/CryptoPkg.dec
>
> diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> index 8f53b0dfd0..9b4991cbb0 100644
> --- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> +++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> @@ -7,6 +7,7 @@
> # buffer overflow or integer overflow.
>
> #
>
> # Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -23,7 +24,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> index 9282b0fd6b..baa4433cbe 100644
> --- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> @@ -3,6 +3,7 @@
> # Protocol.
>
> #
>
> # Copyright (C) Microsoft Corporation. All rights reserved.
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -21,7 +22,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Packages]
>
> diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> index 5c56e3320e..038ca71890 100644
> --- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> @@ -3,6 +3,7 @@
> # PPI.
>
> #
>
> # Copyright (C) Microsoft Corporation. All rights reserved.
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -20,7 +21,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Packages]
>
> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> index 3fa52f5543..01ee665183 100644
> --- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> +++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> @@ -2,6 +2,7 @@
> # This module provides OpenSSL Library implementation.
>
> #
>
> # Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -661,6 +662,7 @@
> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -
> Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-
> error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
>
> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-error=unused-but-set-variable
>
> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-format -Wno-error=unused-but-set-variable
>
> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=format -
> Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-
> variable
>
> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -
> Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-
> error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
>
> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> index f1f9fbb938..5c2206f6fb 100644
> --- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> +++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> @@ -2,6 +2,7 @@
> # This module provides OpenSSL Library implementation.
>
> #
>
> # Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -610,6 +611,7 @@
> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -
> Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-
> error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
>
> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-error=unused-but-set-variable
>
> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-format -Wno-error=unused-but-set-variable
>
> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-format -Wno-error=unused-but-set-variable
>
> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -
> Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-
> error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
>
> diff --git a/CryptoPkg/Library/TlsLib/TlsLib.inf
> b/CryptoPkg/Library/TlsLib/TlsLib.inf
> index 2f3ce695c3..27209f4d7f 100644
> --- a/CryptoPkg/Library/TlsLib/TlsLib.inf
> +++ b/CryptoPkg/Library/TlsLib/TlsLib.inf
> @@ -2,7 +2,7 @@
> # SSL/TLS Wrapper Library Instance based on OpenSSL.
>
> #
>
> # Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
>
> -# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
>
> +# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -19,7 +19,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> diff --git a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> index 33f0e7493f..b2920ddacf 100644
> --- a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> +++ b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> @@ -2,7 +2,7 @@
> # SSL/TLS Wrapper Null Library Instance.
>
> #
>
> # Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
>
> -# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
>
> +# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -19,7 +19,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> diff --git a/CryptoPkg/Library/Include/CrtLibSupport.h
> b/CryptoPkg/Library/Include/CrtLibSupport.h
> index 5a20ba636f..7a82f1d406 100644
> --- a/CryptoPkg/Library/Include/CrtLibSupport.h
> +++ b/CryptoPkg/Library/Include/CrtLibSupport.h
> @@ -3,6 +3,7 @@
> cryptographic library.
>
>
>
> Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
>
>
> **/
>
> @@ -43,7 +44,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>
>
> #define CONFIG_HEADER_BN_H
>
>
>
> -#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) ||
> defined(MDE_CPU_IA64)
>
> +#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) ||
> defined(MDE_CPU_IA64) || defined(MDE_CPU_RISCV64)
>
> //
>
> // With GCC we would normally use SIXTY_FOUR_BIT_LONG, but MSVC
> needs
>
> // SIXTY_FOUR_BIT, because 'long' is 32-bit and only 'long long' is
>
> --
> 2.25.0
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: " Abner Chang
2020-03-17 9:19 ` Xiaoyu Lu
@ 2020-07-13 9:27 ` Laszlo Ersek
2020-07-13 18:05 ` Laszlo Ersek
2020-07-22 0:58 ` Guomin Jiang
2 siblings, 1 reply; 28+ messages in thread
From: Laszlo Ersek @ 2020-07-13 9:27 UTC (permalink / raw)
To: devel, abner.chang
Cc: Daniel Schaefer, Jian J Wang, Xiaoyu Lu, Leif Lindholm,
Gilbert Chen
Hi Abner,
just noticed the following difference in this patch (now commit
9025a014f9d9a):
On 03/06/20 06:36, Abner Chang wrote:
> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> index 3fa52f5543..01ee665183 100644
> --- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> +++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> @@ -661,6 +662,7 @@
> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=format -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
vs.
> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> index f1f9fbb938..5c2206f6fb 100644
> --- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> +++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> @@ -610,6 +611,7 @@
> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
Why do RISCV64_CC_FLAGS differ between "OpensslLib.inf" and
"OpensslLibCrypto.inf"?
The former has "-Wno-error=format" additionally. I think we should
either remove it, or else add it to "OpensslLibCrypto.inf" as well.
These INF files should be easily diffable against each other. The only
differences should be (a) in the generated file list (the
"OpensslLib.inf" file should list a bunch of "ssl/..." pathnames, while
the other INF file should list none), and (b) in the BASE_NAME /
MODULE_UNI_FILE / FILE_GUID defines.
If you agree, can you please submit a patch, for eliminating the
difference in RISCV64_CC_FLAGS?
Thanks
Laszlo
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-07-13 9:27 ` [edk2-devel] " Laszlo Ersek
@ 2020-07-13 18:05 ` Laszlo Ersek
2020-07-14 1:13 ` Abner Chang
0 siblings, 1 reply; 28+ messages in thread
From: Laszlo Ersek @ 2020-07-13 18:05 UTC (permalink / raw)
To: devel, abner.chang
Cc: Daniel Schaefer, Jian J Wang, Xiaoyu Lu, Leif Lindholm,
Gilbert Chen
On 07/13/20 11:27, Laszlo Ersek wrote:
> Hi Abner,
>
> just noticed the following difference in this patch (now commit
> 9025a014f9d9a):
>
> On 03/06/20 06:36, Abner Chang wrote:
>
>> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
>> index 3fa52f5543..01ee665183 100644
>> --- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
>> +++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
>> @@ -661,6 +662,7 @@
>> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
>> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
>> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
>> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=format -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
>> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
>
> vs.
>
>> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
>> index f1f9fbb938..5c2206f6fb 100644
>> --- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
>> +++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
>> @@ -610,6 +611,7 @@
>> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
>> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
>> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
>> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-variable
>> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
>
> Why do RISCV64_CC_FLAGS differ between "OpensslLib.inf" and
> "OpensslLibCrypto.inf"?
>
> The former has "-Wno-error=format" additionally. I think we should
> either remove it, or else add it to "OpensslLibCrypto.inf" as well.
>
> These INF files should be easily diffable against each other. The only
> differences should be (a) in the generated file list (the
> "OpensslLib.inf" file should list a bunch of "ssl/..." pathnames, while
> the other INF file should list none), and (b) in the BASE_NAME /
> MODULE_UNI_FILE / FILE_GUID defines.
>
> If you agree, can you please submit a patch, for eliminating the
> difference in RISCV64_CC_FLAGS?
I've filed <https://bugzilla.tianocore.org/show_bug.cgi?id=2848> about this.
Thanks
Laszlo
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-07-13 18:05 ` Laszlo Ersek
@ 2020-07-14 1:13 ` Abner Chang
0 siblings, 0 replies; 28+ messages in thread
From: Abner Chang @ 2020-07-14 1:13 UTC (permalink / raw)
To: devel@edk2.groups.io, lersek@redhat.com
Cc: Schaefer, Daniel (DualStudy), Jian J Wang, Xiaoyu Lu,
Leif Lindholm, Chen, Gilbert
Sure Laszlo, I will figure it out.
> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Tuesday, July 14, 2020 2:06 AM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> <abner.chang@hpe.com>
> Cc: Schaefer, Daniel (DualStudy) <daniel.schaefer@hpe.com>; Jian J Wang
> <jian.j.wang@intel.com>; Xiaoyu Lu <xiaoyux.lu@intel.com>; Leif Lindholm
> <leif@nuviainc.com>; Chen, Gilbert <gilbert.chen@hpe.com>
> Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1
> 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
>
> On 07/13/20 11:27, Laszlo Ersek wrote:
> > Hi Abner,
> >
> > just noticed the following difference in this patch (now commit
> > 9025a014f9d9a):
> >
> > On 03/06/20 06:36, Abner Chang wrote:
> >
> >> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> >> b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> >> index 3fa52f5543..01ee665183 100644
> >> --- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> >> +++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> >> @@ -661,6 +662,7 @@
> >> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -
> Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-
> error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
> >> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-error=unused-but-set-variable
> >> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS)
> >> -Wno-error=maybe-uninitialized -Wno-format
> >> -Wno-error=unused-but-set-variable
> >> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-
> error=format
> >> + -Wno-error=maybe-uninitialized -Wno-format
> >> + -Wno-error=unused-but-set-variable
> >> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> >> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> >> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> >> -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign
> >> -Wno-error=implicit-function-declaration
> >> -Wno-error=ignored-pragma-optimize
> >
> > vs.
> >
> >> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> >> b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> >> index f1f9fbb938..5c2206f6fb 100644
> >> --- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> >> +++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> >> @@ -610,6 +611,7 @@
> >> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -
> Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-
> error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
> >> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-error=unused-but-set-variable
> >> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS)
> >> -Wno-error=maybe-uninitialized -Wno-format
> >> -Wno-error=unused-but-set-variable
> >> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS)
> >> + -Wno-error=maybe-uninitialized -Wno-format
> >> + -Wno-error=unused-but-set-variable
> >> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> >> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> >> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
> >> -Wno-error=incompatible-pointer-types -Wno-error=pointer-sign
> >> -Wno-error=implicit-function-declaration
> >> -Wno-error=ignored-pragma-optimize
> >
> > Why do RISCV64_CC_FLAGS differ between "OpensslLib.inf" and
> > "OpensslLibCrypto.inf"?
> >
> > The former has "-Wno-error=format" additionally. I think we should
> > either remove it, or else add it to "OpensslLibCrypto.inf" as well.
> >
> > These INF files should be easily diffable against each other. The only
> > differences should be (a) in the generated file list (the
> > "OpensslLib.inf" file should list a bunch of "ssl/..." pathnames,
> > while the other INF file should list none), and (b) in the BASE_NAME /
> > MODULE_UNI_FILE / FILE_GUID defines.
> >
> > If you agree, can you please submit a patch, for eliminating the
> > difference in RISCV64_CC_FLAGS?
>
> I've filed <https://bugzilla.tianocore.org/show_bug.cgi?id=2848> about this.
>
> Thanks
> Laszlo
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: " Abner Chang
2020-03-17 9:19 ` Xiaoyu Lu
2020-07-13 9:27 ` [edk2-devel] " Laszlo Ersek
@ 2020-07-22 0:58 ` Guomin Jiang
2 siblings, 0 replies; 28+ messages in thread
From: Guomin Jiang @ 2020-07-22 0:58 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com
Cc: Daniel Schaefer, Wang, Jian J, Lu, XiaoyuX, Leif Lindholm,
Gilbert Chen
Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner
> Chang
> Sent: Friday, March 6, 2020 1:36 PM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Daniel Schaefer <daniel.schaefer@hpe.com>;
> Wang, Jian J <jian.j.wang@intel.com>; Lu, XiaoyuX <xiaoyux.lu@intel.com>;
> Leif Lindholm <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>
> Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1
> 05/11] CryptoPkg: Add RISC-V architecture for EDK2 CI.
>
> Add RISC-V architecture for EDK2 CI testing.
>
> BZ:2562:
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> Signed-off-by: Abner Chang <abner.chang@hpe.com>
> Co-authored-by: Daniel Schaefer <daniel.schaefer@hpe.com>
>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> ---
> CryptoPkg/CryptoPkg.dsc | 3 ++-
> CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +++++-
> CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 ++++
> CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
> CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
> CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
> CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
> CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++
> CryptoPkg/Library/TlsLib/TlsLib.inf | 4 ++--
> CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 4 ++--
> CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++-
> 11 files changed, 27 insertions(+), 10 deletions(-)
>
> diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
> index 4cb37b1349..f79ff331cf 100644
> --- a/CryptoPkg/CryptoPkg.dsc
> +++ b/CryptoPkg/CryptoPkg.dsc
> @@ -3,6 +3,7 @@
> # PEIM, DXE Driver, and SMM Driver with all crypto services enabled.
>
> #
>
> # Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -18,7 +19,7 @@
> PLATFORM_VERSION = 0.98
>
> DSC_SPECIFICATION = 0x00010005
>
> OUTPUT_DIRECTORY = Build/CryptoPkg
>
> - SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
>
> + SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
>
> BUILD_TARGETS = DEBUG|RELEASE|NOOPT
>
> SKUID_IDENTIFIER = DEFAULT
>
>
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> index 1bbe4f435a..a63ad66b4f 100644
> --- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> @@ -7,6 +7,7 @@
> # buffer overflow or integer overflow.
>
> #
>
> # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -23,7 +24,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> @@ -72,6 +73,9 @@
> [Sources.AARCH64]
>
> Rand/CryptRand.c
>
>
>
> +[Sources.RISCV64]
>
> + Rand/CryptRand.c
>
> +
>
> [Packages]
>
> MdePkg/MdePkg.dec
>
> CryptoPkg/CryptoPkg.dec
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> index bff308a4f5..e5b8ececc1 100644
> --- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
> @@ -12,6 +12,7 @@
> # authenticode signature verification functions are not supported in this
> instance.
>
> #
>
> # Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -77,6 +78,9 @@
> [Sources.AARCH64]
>
> Rand/CryptRand.c
>
>
>
> +[Sources.RISCV64]
>
> + Rand/CryptRand.c
>
> +
>
> [Packages]
>
> MdePkg/MdePkg.dec
>
> CryptoPkg/CryptoPkg.dec
>
> diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> index 8f53b0dfd0..9b4991cbb0 100644
> --- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> +++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
> @@ -7,6 +7,7 @@
> # buffer overflow or integer overflow.
>
> #
>
> # Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -23,7 +24,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> index 9282b0fd6b..baa4433cbe 100644
> --- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
> @@ -3,6 +3,7 @@
> # Protocol.
>
> #
>
> # Copyright (C) Microsoft Corporation. All rights reserved.
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -21,7 +22,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Packages]
>
> diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> index 5c56e3320e..038ca71890 100644
> --- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf
> @@ -3,6 +3,7 @@
> # PPI.
>
> #
>
> # Copyright (C) Microsoft Corporation. All rights reserved.
>
> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -20,7 +21,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Packages]
>
> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> index 3fa52f5543..01ee665183 100644
> --- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> +++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
> @@ -2,6 +2,7 @@
> # This module provides OpenSSL Library implementation.
>
> #
>
> # Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -661,6 +662,7 @@
> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -
> Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-
> error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
>
> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-error=unused-but-set-variable
>
> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-format -Wno-error=unused-but-set-variable
>
> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=format -
> Wno-error=maybe-uninitialized -Wno-format -Wno-error=unused-but-set-
> variable
>
> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -
> Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-
> error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
>
> diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> index f1f9fbb938..5c2206f6fb 100644
> --- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> +++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
> @@ -2,6 +2,7 @@
> # This module provides OpenSSL Library implementation.
>
> #
>
> # Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +# (C) Copyright 2020 Hewlett Packard Enterprise Development LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -610,6 +611,7 @@
> GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) -
> Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -Wno-
> error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
>
> GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-error=unused-but-set-variable
>
> GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-format -Wno-error=unused-but-set-variable
>
> + GCC:*_*_RISCV64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-
> uninitialized -Wno-format -Wno-error=unused-but-set-variable
>
> GCC:*_CLANG35_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
>
> GCC:*_CLANGPDB_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized -
> Wno-error=incompatible-pointer-types -Wno-error=pointer-sign -Wno-
> error=implicit-function-declaration -Wno-error=ignored-pragma-optimize
>
> diff --git a/CryptoPkg/Library/TlsLib/TlsLib.inf
> b/CryptoPkg/Library/TlsLib/TlsLib.inf
> index 2f3ce695c3..27209f4d7f 100644
> --- a/CryptoPkg/Library/TlsLib/TlsLib.inf
> +++ b/CryptoPkg/Library/TlsLib/TlsLib.inf
> @@ -2,7 +2,7 @@
> # SSL/TLS Wrapper Library Instance based on OpenSSL.
>
> #
>
> # Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
>
> -# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
>
> +# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development
> LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -19,7 +19,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> diff --git a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> index 33f0e7493f..b2920ddacf 100644
> --- a/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> +++ b/CryptoPkg/Library/TlsLibNull/TlsLibNull.inf
> @@ -2,7 +2,7 @@
> # SSL/TLS Wrapper Null Library Instance.
>
> #
>
> # Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
>
> -# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
>
> +# (C) Copyright 2016-2020 Hewlett Packard Enterprise Development
> LP<BR>
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> ##
>
> @@ -19,7 +19,7 @@
> #
>
> # The following information is for reference only and not required by the
> build tools.
>
> #
>
> -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
>
> +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
>
> #
>
>
>
> [Sources]
>
> diff --git a/CryptoPkg/Library/Include/CrtLibSupport.h
> b/CryptoPkg/Library/Include/CrtLibSupport.h
> index 5a20ba636f..7a82f1d406 100644
> --- a/CryptoPkg/Library/Include/CrtLibSupport.h
> +++ b/CryptoPkg/Library/Include/CrtLibSupport.h
> @@ -3,6 +3,7 @@
> cryptographic library.
>
>
>
> Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
>
> +Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
>
>
> **/
>
> @@ -43,7 +44,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>
>
> #define CONFIG_HEADER_BN_H
>
>
>
> -#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) ||
> defined(MDE_CPU_IA64)
>
> +#if defined(MDE_CPU_X64) || defined(MDE_CPU_AARCH64) ||
> defined(MDE_CPU_IA64) || defined(MDE_CPU_RISCV64)
>
> //
>
> // With GCC we would normally use SIXTY_FOUR_BIT_LONG, but MSVC
> needs
>
> // SIXTY_FOUR_BIT, because 'long' is 32-bit and only 'long long' is
>
> --
> 2.25.0
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
>
> View/Reply Online (#55577): https://edk2.groups.io/g/devel/message/55577
> Mute This Topic: https://groups.io/mt/71767313/4399222
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub
> [guomin.jiang@intel.com]
> -=-=-=-=-=-=
^ permalink raw reply [flat|nested] 28+ messages in thread
* [edk2/master PATCH RISC-V CI Code Changes v1 06/11] MdePkg/Include: Add RISC-V related definitions EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (4 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 05/11] CryptoPkg: " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 07/11] SecurityPkg: Security package changes for RISC-V " Abner Chang
` (4 subsequent siblings)
10 siblings, 0 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Maciej Rabeda, Michael D Kinney, Liming Gao,
Leif Lindholm, Gilbert Chen, Daniel Schaefer
HTTP/PXE boot RISC-V related definitions for EDK2 CI.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
MdePkg/Include/IndustryStandard/Dhcp.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h b/MdePkg/Include/IndustryStandard/Dhcp.h
index f41f9f2f5b..121c48c42d 100644
--- a/MdePkg/Include/IndustryStandard/Dhcp.h
+++ b/MdePkg/Include/IndustryStandard/Dhcp.h
@@ -3,6 +3,7 @@
They are used to carry additional information and parameters in DHCP messages.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -266,11 +267,17 @@ typedef enum {
#define PXE_CLIENT_ARCH_EBC 0x0009 /// EBC for PXE
#define PXE_CLIENT_ARCH_ARM 0x000A /// Arm uefi 32 for PXE
#define PXE_CLIENT_ARCH_AARCH64 0x000B /// Arm uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV32 0x0019 /// RISC-V uefi 32 for PXE
+#define PXE_CLIENT_ARCH_RISCV64 0x001B /// RISC-V uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV128 0x001D /// RISC-V uefi 128 for PXE
#define HTTP_CLIENT_ARCH_IA32 0x000F /// x86 uefi boot from http
#define HTTP_CLIENT_ARCH_X64 0x0010 /// x64 uefi boot from http
#define HTTP_CLIENT_ARCH_EBC 0x0011 /// EBC boot from http
#define HTTP_CLIENT_ARCH_ARM 0x0012 /// Arm uefi 32 boot from http
#define HTTP_CLIENT_ARCH_AARCH64 0x0013 /// Arm uefi 64 boot from http
+#define HTTP_CLIENT_ARCH_RISCV32 0x001A /// RISC-V uefi 32 boot from http
+#define HTTP_CLIENT_ARCH_RISCV64 0x001C /// RISC-V uefi 64 boot from http
+#define HTTP_CLIENT_ARCH_RISCV128 0x001E /// RISC-V uefi 128 boot from http
#endif
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* [edk2/master PATCH RISC-V CI Code Changes v1 07/11] SecurityPkg: Security package changes for RISC-V EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (5 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 06/11] MdePkg/Include: Add RISC-V related definitions " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 08/11] ShellPkg: Shell " Abner Chang
` (3 subsequent siblings)
10 siblings, 0 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Jiewen Yao, Jian J Wang, Chao Zhang, Leif Lindholm,
Gilbert Chen, Daniel Schaefer
Add RISC-V architecture to SecurityPkg for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
SecurityPkg/SecurityPkg.dsc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
index a2eeadda7a..7db1ad855a 100644
--- a/SecurityPkg/SecurityPkg.dsc
+++ b/SecurityPkg/SecurityPkg.dsc
@@ -2,7 +2,7 @@
# Security Module Package for All Architectures.
#
# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
-# (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -13,7 +13,7 @@
PLATFORM_VERSION = 0.98
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/SecurityPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* [edk2/master PATCH RISC-V CI Code Changes v1 08/11] ShellPkg: Shell package changes for RISC-V EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (6 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 07/11] SecurityPkg: Security package changes for RISC-V " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-12 2:21 ` [edk2-devel] " Gao, Zhichao
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 09/11] UnitTestFrameworkPkg: Add RISC-V architecture " Abner Chang
` (2 subsequent siblings)
10 siblings, 1 reply; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Ray Ni, Zhichao Gao, Leif Lindholm, Gilbert Chen,
Daniel Schaefer
Add RISC-V architecture to ShellPkg for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
ShellPkg/ShellPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
index 91493400ca..b7ee856b3a 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
@@ -3,6 +3,7 @@
#
# Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2018, Arm Limited. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -14,7 +15,7 @@
PLATFORM_VERSION = 1.02
DSC_SPECIFICATION = 0x00010006
OUTPUT_DIRECTORY = Build/Shell
- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 08/11] ShellPkg: Shell package changes for RISC-V EDK2 CI.
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 08/11] ShellPkg: Shell " Abner Chang
@ 2020-03-12 2:21 ` Gao, Zhichao
0 siblings, 0 replies; 28+ messages in thread
From: Gao, Zhichao @ 2020-03-12 2:21 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com
Cc: Ni, Ray, Leif Lindholm, Gilbert Chen, Daniel Schaefer
Acked-by: Zhichao Gao <zhichao.gao@intel.com>
Thanks,
Zhichao
-----Original Message-----
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Abner Chang
Sent: Friday, March 6, 2020 1:36 PM
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com; Ni, Ray <ray.ni@intel.com>; Gao, Zhichao <zhichao.gao@intel.com>; Leif Lindholm <leif@nuviainc.com>; Gilbert Chen <gilbert.chen@hpe.com>; Daniel Schaefer <daniel.schaefer@hpe.com>
Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 08/11] ShellPkg: Shell package changes for RISC-V EDK2 CI.
Add RISC-V architecture to ShellPkg for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
ShellPkg/ShellPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc index 91493400ca..b7ee856b3a 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
@@ -3,6 +3,7 @@
# # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR> # Copyright (c) 2018, Arm Limited. All rights reserved.<BR>+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> # # SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -14,7 +15,7 @@
PLATFORM_VERSION = 1.02 DSC_SPECIFICATION = 0x00010006 OUTPUT_DIRECTORY = Build/Shell- SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64 BUILD_TARGETS = DEBUG|RELEASE|NOOPT SKUID_IDENTIFIER = DEFAULT --
2.25.0
-=-=-=-=-=-=
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#55580): https://edk2.groups.io/g/devel/message/55580
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Unsubscribe: https://edk2.groups.io/g/devel/unsub [zhichao.gao@intel.com] -=-=-=-=-=-=
^ permalink raw reply [flat|nested] 28+ messages in thread
* [edk2/master PATCH RISC-V CI Code Changes v1 09/11] UnitTestFrameworkPkg: Add RISC-V architecture for RISC-V EDK2 CI.
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (7 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 08/11] ShellPkg: Shell " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 10/11] MdePkg/DxeServicesLib: Add RISC-V architecture Abner Chang
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 11/11] MdeModulePkg: Use LockBoxNullLib for RISC-V Abner Chang
10 siblings, 0 replies; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Michael D Kinney, Sean Brogan, Bret Barkelew,
Leif Lindholm, Gilbert Chen, Daniel Schaefer
Add RISC-V architecture to UnitTestFrameworkPkg for RISC-V EDK2 CI.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
index 53d8f52754..2d84691bf1 100644
--- a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
+++ b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
@@ -2,6 +2,7 @@
# UnitTestFrameworkPkg
#
# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -13,7 +14,7 @@
PLATFORM_VERSION = 1.00
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/UnitTestFrameworkPkg
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* [edk2/master PATCH RISC-V CI Code Changes v1 10/11] MdePkg/DxeServicesLib: Add RISC-V architecture
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (8 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 09/11] UnitTestFrameworkPkg: Add RISC-V architecture " Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-27 3:21 ` Liming Gao
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 11/11] MdeModulePkg: Use LockBoxNullLib for RISC-V Abner Chang
10 siblings, 1 reply; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Gilbert Chen, Leif Lindholm, Michael D Kinney,
Liming Gao
From: Daniel Schaefer <daniel.schaefer@hpe.com>
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
---
MdePkg/Library/DxeServicesLib/DxeServicesLib.inf | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
index d60f76129b..ec3e8711c2 100644
--- a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+++ b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
@@ -22,13 +22,13 @@
LIBRARY_CLASS = DxeServicesLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE UEFI_APPLICATION UEFI_DRIVER
#
-# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
#
[Sources]
DxeServicesLib.c
-[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64]
+[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
Allocate.c
[Sources.X64]
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [edk2/master PATCH RISC-V CI Code Changes v1 10/11] MdePkg/DxeServicesLib: Add RISC-V architecture
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 10/11] MdePkg/DxeServicesLib: Add RISC-V architecture Abner Chang
@ 2020-03-27 3:21 ` Liming Gao
0 siblings, 0 replies; 28+ messages in thread
From: Liming Gao @ 2020-03-27 3:21 UTC (permalink / raw)
To: Abner Chang, devel@edk2.groups.io
Cc: Gilbert Chen, Leif Lindholm, Kinney, Michael D
Reviewed-by: Liming Gao <liming.gao@intel.com>
-----Original Message-----
From: Abner Chang <abner.chang@hpe.com>
Sent: 2020年3月6日 13:36
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com; Gilbert Chen <gilbert.chen@hpe.com>; Leif Lindholm <leif@nuviainc.com>; Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming <liming.gao@intel.com>
Subject: [edk2/master PATCH RISC-V CI Code Changes v1 10/11] MdePkg/DxeServicesLib: Add RISC-V architecture
From: Daniel Schaefer <daniel.schaefer@hpe.com>
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
---
MdePkg/Library/DxeServicesLib/DxeServicesLib.inf | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
index d60f76129b..ec3e8711c2 100644
--- a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+++ b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
@@ -22,13 +22,13 @@
LIBRARY_CLASS = DxeServicesLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE UEFI_APPLICATION UEFI_DRIVER
#
-# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
#
[Sources]
DxeServicesLib.c
-[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64]
+[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
Allocate.c
[Sources.X64]
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [edk2/master PATCH RISC-V CI Code Changes v1 11/11] MdeModulePkg: Use LockBoxNullLib for RISC-V
2020-03-06 5:36 [edk2/master PATCH RISC-V CI Code Changes v1 00/11] Necessary code changes for RISCV64 CI testing Abner Chang
` (9 preceding siblings ...)
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 10/11] MdePkg/DxeServicesLib: Add RISC-V architecture Abner Chang
@ 2020-03-06 5:36 ` Abner Chang
2020-03-19 8:01 ` [edk2-devel] " Dong, Eric
10 siblings, 1 reply; 28+ messages in thread
From: Abner Chang @ 2020-03-06 5:36 UTC (permalink / raw)
To: devel
Cc: abner.chang, Leif Lindholm, Gilbert Chen, Dandan Bi, Liming Gao,
Jian J Wang, Hao A Wu
From: Daniel Schaefer <daniel.schaefer@hpe.com>
RISC-V doesn't have SMM.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
---
MdeModulePkg/MdeModulePkg.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index a8ee0cc933..ad2bf959c6 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -187,7 +187,7 @@
RiscVOpensbiLib|RiscVPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
RiscVPlatformDxeIplLib|RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf
-[LibraryClasses.EBC]
+[LibraryClasses.EBC, LibraryClasses.RISCV64]
LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
[PcdsFeatureFlag]
--
2.25.0
^ permalink raw reply related [flat|nested] 28+ messages in thread* Re: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 11/11] MdeModulePkg: Use LockBoxNullLib for RISC-V
2020-03-06 5:36 ` [edk2/master PATCH RISC-V CI Code Changes v1 11/11] MdeModulePkg: Use LockBoxNullLib for RISC-V Abner Chang
@ 2020-03-19 8:01 ` Dong, Eric
0 siblings, 0 replies; 28+ messages in thread
From: Dong, Eric @ 2020-03-19 8:01 UTC (permalink / raw)
To: devel@edk2.groups.io, abner.chang@hpe.com
Cc: Leif Lindholm, Gilbert Chen, Bi, Dandan, Gao, Liming,
Wang, Jian J, Wu, Hao A
Reviewed-by: Eric Dong <eric.dong@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Abner Chang
> Sent: Friday, March 6, 2020 1:36 PM
> To: devel@edk2.groups.io
> Cc: abner.chang@hpe.com; Leif Lindholm <leif@nuviainc.com>; Gilbert Chen
> <gilbert.chen@hpe.com>; Bi, Dandan <dandan.bi@intel.com>; Gao, Liming
> <liming.gao@intel.com>; Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A
> <hao.a.wu@intel.com>
> Subject: [edk2-devel] [edk2/master PATCH RISC-V CI Code Changes v1 11/11]
> MdeModulePkg: Use LockBoxNullLib for RISC-V
>
> From: Daniel Schaefer <daniel.schaefer@hpe.com>
>
> RISC-V doesn't have SMM.
>
> BZ:2562:
> https://bugzilla.tianocore.org/show_bug.cgi?id=2562
>
> Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
>
> Cc: Abner Chang <abner.chang@hpe.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Gilbert Chen <gilbert.chen@hpe.com>
> Cc: Dandan Bi <dandan.bi@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> ---
> MdeModulePkg/MdeModulePkg.dsc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MdeModulePkg/MdeModulePkg.dsc
> b/MdeModulePkg/MdeModulePkg.dsc index a8ee0cc933..ad2bf959c6
> 100644
> --- a/MdeModulePkg/MdeModulePkg.dsc
> +++ b/MdeModulePkg/MdeModulePkg.dsc
> @@ -187,7 +187,7 @@
> RiscVOpensbiLib|RiscVPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
> RiscVPlatformDxeIplLib|RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/Ris
> cVDxeIplHandoffOpenSbiLib.inf -[LibraryClasses.EBC]+[LibraryClasses.EBC,
> LibraryClasses.RISCV64]
> LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
> [PcdsFeatureFlag]--
> 2.25.0
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
>
> View/Reply Online (#55582): https://edk2.groups.io/g/devel/message/55582
> Mute This Topic: https://groups.io/mt/71767320/1768733
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> =-=-=-=-=-=
^ permalink raw reply [flat|nested] 28+ messages in thread