From: "Leif Lindholm" <leif@nuviainc.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: devel@edk2.groups.io
Subject: Re: [PATCH v3 2/2] ArmPkg/ArmMmuLib AARCH64: invalidate page tables before populating them
Date: Fri, 6 Mar 2020 18:51:13 +0000 [thread overview]
Message-ID: <20200306185113.GK23627@bivouac.eciton.net> (raw)
In-Reply-To: <20200306161246.6392-3-ard.biesheuvel@linaro.org>
On Fri, Mar 06, 2020 at 17:12:46 +0100, Ard Biesheuvel wrote:
> As it turns out, ARMv8 also permits accesses made with the MMU and
> caches off to hit in the caches, so to ensure that any modifications
> we make before enabling the MMU are visible afterwards as well, we
> should invalidate page tables right after allocation like we do now on
> ARM, if the MMU is still disabled at that point.
>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Urgh.
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
> ---
> ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
> index e36594fea3ad..10ca8bac6a3f 100644
> --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
> +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
> @@ -217,6 +217,14 @@ UpdateRegionMappingRec (
> return EFI_OUT_OF_RESOURCES;
> }
>
> + if (!ArmMmuEnabled ()) {
> + //
> + // Make sure we are not inadvertently hitting in the caches
> + // when populating the page tables.
> + //
> + InvalidateDataCacheRange (TranslationTable, EFI_PAGE_SIZE);
> + }
> +
> if ((*Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) {
> //
> // We are splitting an existing block entry, so we have to populate
> @@ -581,6 +589,12 @@ ArmConfigureMmu (
> *TranslationTableSize = RootTableEntryCount * sizeof(UINT64);
> }
>
> + //
> + // Make sure we are not inadvertently hitting in the caches
> + // when populating the page tables.
> + //
> + InvalidateDataCacheRange (TranslationTable,
> + RootTableEntryCount * sizeof(UINT64));
> ZeroMem (TranslationTable, RootTableEntryCount * sizeof(UINT64));
>
> TranslationTableAttribute = TT_ATTR_INDX_INVALID;
> --
> 2.17.1
>
prev parent reply other threads:[~2020-03-06 18:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-06 16:12 [PATCH v3 0/2] ArmPkg/ArmMmuLib: rewrite and improve cache handling with MMU off Ard Biesheuvel
2020-03-06 16:12 ` [PATCH v3 1/2] ArmPkg/ArmMmuLib AARCH64: rewrite page table code Ard Biesheuvel
2020-03-06 18:50 ` Leif Lindholm
2020-03-07 7:15 ` Ard Biesheuvel
2020-03-06 16:12 ` [PATCH v3 2/2] ArmPkg/ArmMmuLib AARCH64: invalidate page tables before populating them Ard Biesheuvel
2020-03-06 18:51 ` Leif Lindholm [this message]
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