* [edk2-platforms][PATCH 1/8] Platform/ARM/SgiPkg: Create individual Platform Description File
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 2/8] Platform/ARM/SgiPkg: move the GIC related ACPI helper macros Aditya Angadi
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
In preparation for adding support for Reference Design (RD) platforms
that have different base addresses for GIC distributor or redistributor,
create individual platform description files for all SGI/RD platforms
and move GIC related base addresses from the common SGI/RD platform
description file to individual platform description files.
The existing platform description is then included by individual
platform description files.
Change-Id: Ic8b420b13dac574b940be6b526817066df60d45d
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 +---
.../Library/PlatformLib/PlatformLib.inf | 3 +-
.../Library/PlatformLib/PlatformLibMem.c | 8 ++--
Platform/ARM/SgiPkg/RdE1Edge.dsc | 37 +++++++++++++++++++
Platform/ARM/SgiPkg/RdN1Edge.dsc | 37 +++++++++++++++++++
Platform/ARM/SgiPkg/Sgi575.dsc | 37 +++++++++++++++++++
Platform/ARM/SgiPkg/SgiPlatform.dec | 5 ++-
Platform/ARM/SgiPkg/SgiPlatform.dsc | 25 +------------
8 files changed, 124 insertions(+), 35 deletions(-)
create mode 100644 Platform/ARM/SgiPkg/RdE1Edge.dsc
create mode 100644 Platform/ARM/SgiPkg/RdN1Edge.dsc
create mode 100644 Platform/ARM/SgiPkg/Sgi575.dsc
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index e36a412155..d87fb2b540 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -45,11 +45,6 @@
#define SGI_SUBSYS_GENERIC_WDOG_BASE 0x2A440000
#define SGI_SUBSYS_GENERIC_WDOG_SZ SIZE_128KB
-// Sub System Peripherals - GIC
-#define SGI_SUBSYS_GENERIC_GIC_BASE 0x30000000
-#define SGI_SUBSYS_GENERIC_GICR_BASE 0x300C0000
-#define SGI_SUBSYS_GENERIC_GIC_SZ SIZE_1MB
-
// Expansion AXI - Platform Peripherals - HDLCD1
#define SGI_EXP_PLAT_PERIPH_HDLCD1_BASE 0x7FF60000
#define SGI_EXP_PLAT_PERIPH_HDLCD1_SZ SIZE_64KB
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index 3db70e900d..a918afef5f 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,6 +42,7 @@
gArmSgiTokenSpaceGuid.PcdDramBlock2Base
gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+ gArmSgiTokenSpaceGuid.PcdGicSize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 845aeaf4dd..8d0ad4ec9c 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -93,9 +93,9 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Sub System Peripherals - GIC-600
- VirtualMemoryTable[++Index].PhysicalBase = SGI_SUBSYS_GENERIC_GIC_BASE;
- VirtualMemoryTable[Index].VirtualBase = SGI_SUBSYS_GENERIC_GIC_BASE;
- VirtualMemoryTable[Index].Length = SGI_SUBSYS_GENERIC_GIC_SZ;
+ VirtualMemoryTable[++Index].PhysicalBase = FixedPcdGet64(PcdGicDistributorBase);
+ VirtualMemoryTable[Index].VirtualBase = FixedPcdGet64(PcdGicDistributorBase);
+ VirtualMemoryTable[Index].Length = FixedPcdGet64(PcdGicSize);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Expansion AXI - Platform Peripherals - HDLCD1
diff --git a/Platform/ARM/SgiPkg/RdE1Edge.dsc b/Platform/ARM/SgiPkg/RdE1Edge.dsc
new file mode 100644
index 0000000000..082cbb0157
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdE1Edge.dsc
@@ -0,0 +1,37 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmSgi
+ PLATFORM_GUID = c834de39-c5b0-458b-8ea3-882427179b8a
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
diff --git a/Platform/ARM/SgiPkg/RdN1Edge.dsc b/Platform/ARM/SgiPkg/RdN1Edge.dsc
new file mode 100644
index 0000000000..6774990ad6
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdN1Edge.dsc
@@ -0,0 +1,37 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmSgi
+ PLATFORM_GUID = dbc75915-03df-4640-8f3d-3d3abf7c119b
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
diff --git a/Platform/ARM/SgiPkg/Sgi575.dsc b/Platform/ARM/SgiPkg/Sgi575.dsc
new file mode 100644
index 0000000000..3c1904c2da
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Sgi575.dsc
@@ -0,0 +1,37 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmSgi
+ PLATFORM_GUID = 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 9d70ec6777..4ac3dec91e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -49,5 +49,8 @@
gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008
gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009
+ # GIC
+ gArmSgiTokenSpaceGuid.PcdGicSize|0|UINT64|0x0000000A
+
[Ppis]
gNtFwConfigDtInfoPpiGuid = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 5226c5751e..4e1fcefb14 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -1,26 +1,9 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- PLATFORM_NAME = ArmSgi
- PLATFORM_GUID = 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae
- PLATFORM_VERSION = 0.1
- DSC_SPECIFICATION = 0x0001001B
- OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
- SUPPORTED_ARCHITECTURES = AARCH64|ARM
- BUILD_TARGETS = NOOPT|DEBUG|RELEASE
- SKUID_IDENTIFIER = DEFAULT
- FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
- BUILD_NUMBER = 1
-
!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
[BuildOptions]
@@ -93,7 +76,7 @@
################################################################################
#
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+# Pcd Section - list of all EDK II PCD Entries common to all SGI/RD platforms
#
################################################################################
@@ -126,10 +109,6 @@
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
- # GIC Base Addresses
- gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
- gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
-
#
# PCIe
#
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 2/8] Platform/ARM/SgiPkg: move the GIC related ACPI helper macros
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 1/8] Platform/ARM/SgiPkg: Create individual Platform Description File Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 3/8] Platform/ARM/SgiPkg: move common platform description to SSDT Aditya Angadi
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
Move the ACPI helper macros defines related to GIC structure,
distributor, redistributor and ITS to SgiAcpiHeader.h as these are
common across ARM SGI/RD platforms.
Change-Id: I9bed6753e30e344b0eff7bd3d0e2290c8b8a46f0
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
.../ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc | 68 +-----------------
.../ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc | 68 +-----------------
.../SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc | 57 +--------------
| 70 ++++++++++++++++++-
4 files changed, 72 insertions(+), 191 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
index 48e7a61478..9872549285 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -14,72 +14,6 @@
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
-// EFI_ACPI_6_2_GIC_STRUCTURE
-#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_2_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_2_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GICR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_2_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
-// EFI_ACPI_6_2_GIC_ITS_STRUCTURE
-#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \
- { \
- EFI_ACPI_6_2_GIC_ITS, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicItsId, /* GicItsId */ \
- GicItsBase, /* PhysicalBaseAddress */ \
- EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
- }
-
// Multiple APIC Description Table
#pragma pack (1)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
index 6312743a47..05eb78c561 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -17,72 +17,6 @@
#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
FixedPcdGet32 (PcdCoreCount))
-// EFI_ACPI_6_2_GIC_STRUCTURE
-#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_2_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_2_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GICR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_2_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
-// EFI_ACPI_6_2_GIC_ITS_STRUCTURE
-#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \
- { \
- EFI_ACPI_6_2_GIC_ITS, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicItsId, /* GicItsId */ \
- GicItsBase, /* PhysicalBaseAddress */ \
- EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
- }
-
// Multiple APIC Description Table
#pragma pack (1)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
index d4538233d7..47368931e3 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2019, ARM Limited. All rights reserved.
+* Copyright (c) 2019-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -19,61 +19,6 @@
#define CHIP_CNT 2
-// EFI_ACPI_6_2_GIC_STRUCTURE
-#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_2_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_2_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GICR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_2_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
// Multiple APIC Description Table
#pragma pack (1)
--git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index 5083dde15d..ecb0d4eccf 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -9,6 +9,8 @@
#ifndef __SGI_ACPI_HEADER__
#define __SGI_ACPI_HEADER__
+#include <IndustryStandard/Acpi.h>
+
//
// ACPI table information used to initialize tables.
//
@@ -32,4 +34,70 @@
EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \
}
+// EFI_ACPI_6_2_GIC_STRUCTURE
+#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
+ PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
+ { \
+ EFI_ACPI_6_2_GIC, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ GicId, /* CPUInterfaceNumber */ \
+ AcpiCpuUid, /* AcpiProcessorUid */ \
+ Flags, /* Flags */ \
+ 0, /* ParkingProtocolVersion */ \
+ PmuIrq, /* PerformanceInterruptGsiv */ \
+ 0, /* ParkedAddress */ \
+ GicBase, /* PhysicalBaseAddress */ \
+ GicVBase, /* GICV */ \
+ GicHBase, /* GICH */ \
+ GsivId, /* VGICMaintenanceInterrupt */ \
+ GicRBase, /* GICRBaseAddress */ \
+ Mpidr, /* MPIDR */ \
+ Efficiency, /* ProcessorPowerEfficiencyClass */ \
+ { \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
+ EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
+ } \
+ }
+
+// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
+#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
+ GicDistVector, GicVersion) \
+ { \
+ EFI_ACPI_6_2_GICD, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
+ GicDistHwId, /* GicId */ \
+ GicDistBase, /* PhysicalBaseAddress */ \
+ GicDistVector, /* SystemVectorBase */ \
+ GicVersion, /* GicVersion */ \
+ { \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
+ EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
+ } \
+ }
+
+// EFI_ACPI_6_2_GICR_STRUCTURE
+#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
+ { \
+ EFI_ACPI_6_2_GICR, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
+ RedisDiscLength /* DiscoveryRangeLength */ \
+ }
+
+// EFI_ACPI_6_2_GIC_ITS_STRUCTURE
+#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \
+ { \
+ EFI_ACPI_6_2_GIC_ITS, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ GicItsId, /* GicItsId */ \
+ GicItsBase, /* PhysicalBaseAddress */ \
+ EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
+ }
+
#endif /* __SGI_ACPI_HEADER__ */
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 3/8] Platform/ARM/SgiPkg: move common platform description to SSDT
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 1/8] Platform/ARM/SgiPkg: Create individual Platform Description File Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 2/8] Platform/ARM/SgiPkg: move the GIC related ACPI helper macros Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 4/8] Platform/ARM/SgiPkg: remove PcdCoreCount and PcdClusterCount Aditya Angadi
` (4 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
Move common platform description entries in platfrom specific DSDT to
a SSDT that can be reused on all SGI/RD platforms.
Change-Id: I958298ffc0f454db52728276a3ae6b92b144e544
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
.../ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl | 70 +--------------
.../SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf | 3 +-
.../ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl | 69 +-------------
.../SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 3 +-
.../AcpiTables/RdN1EdgeX2AcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl | 90 +++++++++++++++++++
6 files changed, 97 insertions(+), 139 deletions(-)
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
index 5583e61097..d66c7cbf41 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
@@ -1,7 +1,7 @@
/** @file
* Differentiated System Description Table Fields (DSDT)
*
-* Copyright (c) 2018, ARM Ltd. All rights reserved.
+* Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -208,73 +208,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
Name (_STA, 0xF)
}
- // UART PL011
- Device (COM0) {
- Name (_HID, "ARMH0011")
- Name (_CID, "ARMH0011")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet64 (PcdSerialDbgRegisterBase),
- 0x1000
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
- })
- }
-
- // SMSC 91C111
- Device (ETH0) {
- Name (_HID, "LNRO0003")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (ReadWrite, 0x18000000, 0x1000)
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
- })
- Name (_DSD, Package() {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package () {
- Package (2) {"reg-io-width", 4 },
- }
- })
- }
-
- // VIRTIO DISK
- Device (VR00) {
- Name (_HID, "LNRO0005")
- Name (_UID, 0)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet32 (PcdVirtioBlkBaseAddress),
- FixedPcdGet32 (PcdVirtioBlkSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioBlkInterrupt)
- }
- })
- }
-
- // VIRTIO NET
- Device (VR01) {
- Name (_HID, "LNRO0005")
- Name (_UID, 1)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet32 (PcdVirtioNetBaseAddress),
- FixedPcdGet32 (PcdVirtioNetSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioNetInterrupt)
- }
- })
- }
} // Scope(_SB)
}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
index 3a4d4e7b95..b08d7c2df5 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
@@ -1,7 +1,7 @@
## @file
# ACPI table data and ASL sources required to boot the platform.
#
-# Copyright (c) 2018, ARM Ltd. All rights reserved.
+# Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -16,6 +16,7 @@
[Sources]
Dbg2.aslc
+ SsdtRos.asl
Fadt.aslc
Gtdt.aslc
Iort.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
index 45316d5005..cb05eed358 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
@@ -1,7 +1,7 @@
/** @file
* Differentiated System Description Table Fields (DSDT)
*
-* Copyright (c) 2018, ARM Ltd. All rights reserved.
+* Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -62,72 +62,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
Name (_STA, 0xF)
}
- // UART PL011
- Device (COM0) {
- Name (_HID, "ARMH0011")
- Name (_CID, "ARMH0011")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate () {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet64 (PcdSerialDbgRegisterBase),
- 0x1000
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
- })
- }
-
- // SMSC 91C111
- Device (ETH0) {
- Name (_HID, "LNRO0003")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate () {
- Memory32Fixed (ReadWrite, 0x18000000, 0x1000)
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
- })
- Name (_DSD, Package() {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package() {
- Package(2) {"reg-io-width", 4 },
- }
- })
- }
-
- // VIRTIO DISK
- Device (VR00) {
- Name (_HID, "LNRO0005")
- Name (_UID, 0)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet32 (PcdVirtioBlkBaseAddress),
- FixedPcdGet32 (PcdVirtioBlkSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioBlkInterrupt)
- }
- })
- }
-
- // VIRTIO NET
- Device (VR01) {
- Name (_HID, "LNRO0005")
- Name (_UID, 1)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (ReadWrite,
- FixedPcdGet32 (PcdVirtioNetBaseAddress),
- FixedPcdGet32 (PcdVirtioNetSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioNetInterrupt)
- }
- })
- }
} // Scope(_SB)
}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 58c33ecb8e..61b07bffcc 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -1,7 +1,7 @@
## @file
# ACPI table data and ASL sources required to boot the platform.
#
-# Copyright (c) 2018, ARM Ltd. All rights reserved.
+# Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -16,6 +16,7 @@
[Sources]
Dbg2.aslc
+ SsdtRos.asl
Fadt.aslc
Gtdt.aslc
Iort.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 1b584b1524..a4d5904f67 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -16,6 +16,7 @@
[Sources]
Dbg2.aslc
+ SsdtRos.asl
Fadt.aslc
Gtdt.aslc
Iort.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl b/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
new file mode 100644
index 0000000000..95ae23c1f5
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
@@ -0,0 +1,90 @@
+/** @file
+* Secondary System Description Table Fields (SSDT)
+*
+* Copyright (c) 2020, ARM Ltd. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("SsdtRosTable.aml", "SSDT", 1, "ARMLTD", "ARMSGI",
+ EFI_ACPI_ARM_OEM_REVISION) {
+ Scope (_SB) {
+ // UART PL011
+ Device (COM0) {
+ Name (_HID, "ARMH0011")
+ Name (_CID, "ARMH0011")
+ Name (_UID, Zero)
+ Name (_STA, 0xF)
+ Name (_CRS, ResourceTemplate () {
+ Memory32Fixed (
+ ReadWrite,
+ FixedPcdGet64 (PcdSerialDbgRegisterBase),
+ 0x1000
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
+ })
+ }
+
+ // SMSC 91C111
+ Device (ETH0) {
+ Name (_HID, "LNRO0003")
+ Name (_UID, Zero)
+ Name (_STA, 0xF)
+ Name (_CRS, ResourceTemplate () {
+ Memory32Fixed (ReadWrite, 0x18000000, 0x1000)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
+ })
+ Name (_DSD, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package() {
+ Package(2) {"reg-io-width", 4 },
+ }
+ })
+ }
+
+ // VIRTIO DISK
+ Device (VR00) {
+ Name (_HID, "LNRO0005")
+ Name (_UID, 0)
+ Name (_CCA, 1) // mark the device coherent
+
+ Name (_CRS, ResourceTemplate() {
+ Memory32Fixed (
+ ReadWrite,
+ FixedPcdGet32 (PcdVirtioBlkBaseAddress),
+ FixedPcdGet32 (PcdVirtioBlkSize)
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
+ FixedPcdGet32 (PcdVirtioBlkInterrupt)
+ }
+ })
+ }
+
+ // VIRTIO NET
+ Device (VR01) {
+ Name (_HID, "LNRO0005")
+ Name (_UID, 1)
+ Name (_CCA, 1) // mark the device coherent
+
+ Name (_CRS, ResourceTemplate() {
+ Memory32Fixed (ReadWrite,
+ FixedPcdGet32 (PcdVirtioNetBaseAddress),
+ FixedPcdGet32 (PcdVirtioNetSize)
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
+ FixedPcdGet32 (PcdVirtioNetInterrupt)
+ }
+ })
+ }
+ }
+}
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 4/8] Platform/ARM/SgiPkg: remove PcdCoreCount and PcdClusterCount
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
` (2 preceding siblings ...)
2020-03-12 12:43 ` [edk2-platforms][PATCH 3/8] Platform/ARM/SgiPkg: move common platform description to SSDT Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 5/8] Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M Aditya Angadi
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
The number of CPUs depend on the SGI/RD platform. So instead of
defining a Fixed PCD to specify the value of core and cluster count,
let each platform define these values.
Change-Id: Ieb872616aa37a1a977f99d9ffd3fe4c761ae4e39
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc | 7 ++++++-
.../ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf | 2 --
Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc | 7 ++++---
.../ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 2 --
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc | 12 ++++++------
.../ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 2 --
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc | 9 +++++----
Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf | 4 +---
.../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 ---
Platform/ARM/SgiPkg/SgiPlatform.dsc | 4 ----
10 files changed, 22 insertions(+), 30 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
index 9872549285..a9540f2e03 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
@@ -14,12 +14,17 @@
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
+#define CLUSTER_COUNT 2
+#define CORES_PER_CLUSTER 8
+#define THREADS_PER_CORE 2
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER * THREADS_PER_CORE)
+
// Multiple APIC Description Table
#pragma pack (1)
typedef struct {
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[32];
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_COUNT];
EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor;
EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
index b08d7c2df5..742ca9e683 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
@@ -34,8 +34,6 @@
Platform/ARM/SgiPkg/SgiPlatform.dec
[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
- gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
index 05eb78c561..d8ec0ce421 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
@@ -14,15 +14,16 @@
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
-#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
- FixedPcdGet32 (PcdCoreCount))
+#define CLUSTER_COUNT 2
+#define CORES_PER_CLUSTER 4
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER)
// Multiple APIC Description Table
#pragma pack (1)
typedef struct {
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT];
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_COUNT];
EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor;
EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 61b07bffcc..206479f942 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -34,8 +34,6 @@
Platform/ARM/SgiPkg/SgiPlatform.dec
[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
- gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
index 47368931e3..add9724374 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
@@ -14,19 +14,19 @@
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
-#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
- FixedPcdGet32 (PcdCoreCount))
-
-#define CHIP_CNT 2
+#define CLUSTER_COUNT 2
+#define CORES_PER_CLUSTER 4
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER)
+#define CHIP_COUNT 2
// Multiple APIC Description Table
#pragma pack (1)
typedef struct {
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT * CHIP_CNT];
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_COUNT * CHIP_COUNT];
EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor[CHIP_CNT];
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor[CHIP_COUNT];
} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
#pragma pack ()
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index a4d5904f67..8aec5e094e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -34,8 +34,6 @@
Platform/ARM/SgiPkg/SgiPlatform.dec
[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
- gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
index dedabaaecd..ca25924778 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -14,8 +14,9 @@
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
-#define CORES (FixedPcdGet32 (PcdClusterCount) * \
- FixedPcdGet32 (PcdCoreCount))
+#define CLUSTER_COUNT 2
+#define CORES_PER_CLUSTER 4
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER)
// EFI_ACPI_6_1_GIC_STRUCTURE
#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
@@ -90,7 +91,7 @@
typedef struct {
EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[CORES];
+ EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[CORE_COUNT];
EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
EFI_ACPI_6_1_GICR_STRUCTURE GicRedistributor;
EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicIts;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
index 097ef854df..df390c1526 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
@@ -1,7 +1,7 @@
## @file
# ACPI table data and ASL sources required to boot the platform.
#
-# Copyright (c) 2018, ARM Ltd. All rights reserved.
+# Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -33,8 +33,6 @@
Platform/ARM/SgiPkg/SgiPlatform.dec
[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
- gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index a918afef5f..fe96f5385d 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -37,9 +37,6 @@
AArch64/Helper.S | GCC
[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdClusterCount
- gArmPlatformTokenSpaceGuid.PcdCoreCount
-
gArmSgiTokenSpaceGuid.PcdDramBlock2Base
gArmSgiTokenSpaceGuid.PcdDramBlock2Size
gArmSgiTokenSpaceGuid.PcdGicSize
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 4e1fcefb14..7b95acb9db 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -156,10 +156,6 @@
gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
gEmbeddedTokenSpaceGuid.PcdTimerPeriod|1000
- # ARM Cores and Clusters
- gArmPlatformTokenSpaceGuid.PcdCoreCount|4
- gArmPlatformTokenSpaceGuid.PcdClusterCount|2
-
# Virtio Disk
gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress|0x1c130000
gArmSgiTokenSpaceGuid.PcdVirtioBlkSize|0x10000
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 5/8] Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
` (3 preceding siblings ...)
2020-03-12 12:43 ` [edk2-platforms][PATCH 4/8] Platform/ARM/SgiPkg: remove PcdCoreCount and PcdClusterCount Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 6/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-M platform Aditya Angadi
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
Add Madt and Dsdt ACPI tables for RD-Daniel Config-M platform.
Change-Id: I82f0eaaae6bb4cd515e04ed0a6f8a039c63cf557
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
.../SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl | 118 +++++++++++++++
.../SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc | 134 ++++++++++++++++++
.../AcpiTables/RdDanielCfgMAcpiTables.inf | 63 ++++++++
Platform/ARM/SgiPkg/SgiPlatform.dec | 1 +
Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 +
6 files changed, 318 insertions(+)
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
new file mode 100644
index 0000000000..57873ef5cf
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
@@ -0,0 +1,118 @@
+/** @file
+* Differentiated System Description Table Fields (DSDT)
+*
+* Copyright (c) 2020, ARM Ltd. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+ EFI_ACPI_ARM_OEM_REVISION) {
+ Scope (_SB) {
+ Device (CP00) { // Zeus core 0
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP01) { // Zeus core 1
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP02) { // Zeus core 2
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP03) { // Zeus core 3
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP04) { // Zeus core 4
+ Name (_HID, "ACPI0007")
+ Name (_UID, 4)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP05) { // Zeus core 5
+ Name (_HID, "ACPI0007")
+ Name (_UID, 5)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP06) { // Zeus core 6
+ Name (_HID, "ACPI0007")
+ Name (_UID, 6)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP07) { // Zeus core 7
+ Name (_HID, "ACPI0007")
+ Name (_UID, 7)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP08) { // Zeus core 8
+ Name (_HID, "ACPI0007")
+ Name (_UID, 8)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP09) { // Zeus core 9
+ Name (_HID, "ACPI0007")
+ Name (_UID, 9)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP10) { // Zeus core 10
+ Name (_HID, "ACPI0007")
+ Name (_UID, 10)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP11) { // Zeus core 11
+ Name (_HID, "ACPI0007")
+ Name (_UID, 11)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP12) { // Zeus core 12
+ Name (_HID, "ACPI0007")
+ Name (_UID, 12)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP13) { // Zeus core 13
+ Name (_HID, "ACPI0007")
+ Name (_UID, 13)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP14) { // Zeus core 14
+ Name (_HID, "ACPI0007")
+ Name (_UID, 14)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP15) { // Zeus core 15
+ Name (_HID, "ACPI0007")
+ Name (_UID, 15)
+ Name (_STA, 0xF)
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
new file mode 100644
index 0000000000..3027b8d223
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
@@ -0,0 +1,134 @@
+/** @file
+* Multiple APIC Description Table (MADT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CLUSTER_COUNT 16
+#define CORES_PER_CLUSTER 1
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER)
+
+// Multiple APIC Description Table
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_COUNT];
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor;
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ // MADT specific fields
+ 0, // LocalApicAddress
+ 0 // Flags
+ },
+ {
+ // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // PmuIrq, GicBase, GicVBase,
+ // GicHBase, GsivId, GicRBase,
+ // Efficiency)
+ // Note: The GIC Structure of the primary CPU must be the first entry
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core4
+ 0, 4, GET_MPID(0x400, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core5
+ 0, 5, GET_MPID(0x500, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core6
+ 0, 6, GET_MPID(0x600, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core7
+ 0, 7, GET_MPID(0x700, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core8
+ 0, 8, GET_MPID(0x800, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core9
+ 0, 9, GET_MPID(0x900, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core10
+ 0, 10, GET_MPID(0xa00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core11
+ 0, 11, GET_MPID(0xb00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core12
+ 0, 12, GET_MPID(0xc00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core13
+ 0, 13, GET_MPID(0xd00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core14
+ 0, 14, GET_MPID(0xe00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core15
+ 0, 15, GET_MPID(0xf00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ },
+ // GIC Distributor Entry
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ 0, 3),
+ // GIC Redistributor
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
+ SIZE_16MB),
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
new file mode 100644
index 0000000000..73b6c7ffaf
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
@@ -0,0 +1,63 @@
+## @file
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2020, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = RdDanielCfgMAcpiTables
+ FILE_GUID = 163132b3-8ec1-48f7-b4d1-49306c3f4d51
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ SsdtRos.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Iort.aslc
+ Mcfg.aslc
+ RdDanielCfgM/Dsdt.asl
+ RdDanielCfgM/Madt.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkSize
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt
+ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioNetSize
+ gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt
+
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 4ac3dec91e..a89bf26365 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -30,6 +30,7 @@
gRdN1EdgeAcpiTablesFileGuid = { 0x4b0b91d0, 0x4a05, 0x45c4, { 0x88, 0xa7, 0x88, 0xe1, 0x70, 0xe7, 0x66, 0x94 } }
gRdN1EdgeX2AcpiTablesFileGuid = { 0x82a34150, 0x0fc6, 0x45f4, { 0x8e, 0xa0, 0xf0, 0xa4, 0x66, 0x0c, 0xf3, 0x5d } }
gRdE1EdgeAcpiTablesFileGuid = { 0x2af40815, 0xa84e, 0x4de9, { 0x8c, 0x38, 0x91, 0x40, 0xb3, 0x54, 0x40, 0x73 } }
+ gRdDanielCfgMAcpiTablesFileGuid = { 0x163132b3, 0x8ec1, 0x48f7, {0xb4, 0xd1, 0x49, 0x30, 0x6c, 0x3f, 0x4d, 0x51} }
[PcdsFeatureFlag.common]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 7b95acb9db..74fe1a4533 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -256,6 +256,7 @@
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+ Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 3d13998015..48192917e2 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -103,6 +103,7 @@ READ_LOCK_STATUS = TRUE
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
# Required by PCI
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 6/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-M platform
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
` (4 preceding siblings ...)
2020-03-12 12:43 ` [edk2-platforms][PATCH 5/8] Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 7/8] Platform/ARM/SgiPkg: add ACPI tables for RD-Daniel Config-XLR Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 8/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-XLR platform Aditya Angadi
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
Add information in the SGI platform descriptor HOB to pick the correct
ACPI table to install for RD-Daniel Config-M
Change-Id: I6f16b71527e1ec13511917b6cb3a46a9458e88cc
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
.../SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 5 +++
.../Drivers/PlatformDxe/PlatformDxe.inf | 1 +
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 4 ++
Platform/ARM/SgiPkg/RdDaniel.dsc | 38 +++++++++++++++++++
4 files changed, 48 insertions(+)
create mode 100644 Platform/ARM/SgiPkg/RdDaniel.dsc
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index 387397d745..7e0de765f7 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -46,6 +46,11 @@ STATIC SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP AcpiTableGuidLookup[] = {
RD_E1_EDGE_CONF_ID,
MULTI_CHIP_MODE_DISABLED,
&gRdE1EdgeAcpiTablesFileGuid),
+ ACPI_GUID_LOOKUP (
+ RD_DANIEL_PART_NUM,
+ RD_DANIEL_CFGM_CONF_ID,
+ MULTI_CHIP_MODE_DISABLED,
+ &gRdDanielCfgMAcpiTablesFileGuid),
};
VOID
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
index 741dcc75ed..82569820b7 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -34,6 +34,7 @@
gRdN1EdgeAcpiTablesFileGuid
gRdN1EdgeX2AcpiTablesFileGuid
gRdE1EdgeAcpiTablesFileGuid
+ gRdDanielCfgMAcpiTablesFileGuid
[FeaturePcd]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index d87fb2b540..b6a427b8b6 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -70,6 +70,10 @@
#define RD_N1_EDGE_CONF_ID 0x1
#define RD_E1_EDGE_CONF_ID 0x2
+//RDDANIEL Platform Identification values
+#define RD_DANIEL_PART_NUM 0x78A
+#define RD_DANIEL_CFGM_CONF_ID 0x1
+
#define SGI_CONFIG_MASK 0x0F
#define SGI_CONFIG_SHIFT 0x1C
#define SGI_PART_NUM_MASK 0xFFF
diff --git a/Platform/ARM/SgiPkg/RdDaniel.dsc b/Platform/ARM/SgiPkg/RdDaniel.dsc
new file mode 100644
index 0000000000..09607004ed
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdDaniel.dsc
@@ -0,0 +1,38 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmSgi
+ PLATFORM_GUID = d301ac4e-0828-4cef-b754-34ca9b6781b5
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x30140000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x200000
+
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 7/8] Platform/ARM/SgiPkg: add ACPI tables for RD-Daniel Config-XLR
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
` (5 preceding siblings ...)
2020-03-12 12:43 ` [edk2-platforms][PATCH 6/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-M platform Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
2020-03-12 12:43 ` [edk2-platforms][PATCH 8/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-XLR platform Aditya Angadi
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
RD-Daniel Config-XLR is a platform in which four identical chips are connected
via a high speed CCIX link. Add Madt and Dsdt tables for the same.
Change-Id: I5bcaa5863f38cd36a4ef1524ce460a9033303d34
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
.../SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl | 125 +++++++++++++++
.../AcpiTables/RdDanielCfgXlr/Madt.aslc | 150 ++++++++++++++++++
.../AcpiTables/RdDanielCfgXlrAcpiTables.inf | 63 ++++++++
Platform/ARM/SgiPkg/SgiPlatform.dec | 1 +
Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 +
6 files changed, 341 insertions(+)
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
new file mode 100644
index 0000000000..23ada55ec4
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
@@ -0,0 +1,125 @@
+/** @file
+* Differentiated System Description Table Fields (DSDT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+ EFI_ACPI_ARM_OEM_REVISION) {
+ Scope (_SB) {
+
+ Device (CP00) { // Zeus core 0
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP01) { // Zeus core 1
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP02) { // Zeus core 2
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP03) { // Zeus core 3
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP04) { // Zeus core 4
+ Name (_HID, "ACPI0007")
+ Name (_UID, 4)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP05) { // Zeus core 5
+ Name (_HID, "ACPI0007")
+ Name (_UID, 5)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP06) { // Zeus core 6
+ Name (_HID, "ACPI0007")
+ Name (_UID, 6)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP07) { // Zeus core 7
+ Name (_HID, "ACPI0007")
+ Name (_UID, 7)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP08) { // Zeus core 8
+ Name (_HID, "ACPI0007")
+ Name (_UID, 8)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP09) { // Zeus core 9
+ Name (_HID, "ACPI0007")
+ Name (_UID, 9)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP10) { // Zeus core 10
+ Name (_HID, "ACPI0007")
+ Name (_UID, 10)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP11) { // Zeus core 11
+ Name (_HID, "ACPI0007")
+ Name (_UID, 11)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP12) { // Zeus core 12
+ Name (_HID, "ACPI0007")
+ Name (_UID, 12)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP13) { // Zeus core 13
+ Name (_HID, "ACPI0007")
+ Name (_UID, 13)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP14) { // Zeus core 14
+ Name (_HID, "ACPI0007")
+ Name (_UID, 14)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP15) { // Zeus core 15
+ Name (_HID, "ACPI0007")
+ Name (_UID, 15)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP16) { // Zeus core 16
+ Name (_HID, "ACPI0007")
+ Name (_UID, 16)
+ Name (_STA, 0xF)
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
new file mode 100644
index 0000000000..e3784b55f2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
@@ -0,0 +1,150 @@
+/** @file
+* Multiple APIC Description Table (MADT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CLUSTER_COUNT 4
+#define CORES_PER_CLUSTER 1
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER)
+#define CHIP_COUNT 4
+
+// Multiple APIC Description Table
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_COUNT * CHIP_COUNT];
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor[CHIP_COUNT];
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ // MADT specific fields
+ 0, // LocalApicAddress
+ 0 // Flags
+ },
+ {
+ // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // PmuIrq, GicBase, GicVBase,
+ // GicHBase, GsivId, GicRBase,
+ // Efficiency)
+ // Note: The GIC Structure of the primary CPU must be the first entry
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+ //Chip 0
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 1
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x01000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x01000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x01000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x01000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 2
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x02000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x02000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x02000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x02000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 3
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x03000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x03000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x03000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x03000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ },
+ // GIC Distributor Entry
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ 0, 3),
+ {
+ // GIC Redistributor
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(0),
+ SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(1),
+ SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(2),
+ SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(3),
+ SIZE_16MB)
+ }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
new file mode 100644
index 0000000000..6a5f77b91f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
@@ -0,0 +1,63 @@
+## @file
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2020, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = RdDanielCfgXlrAcpiTables
+ FILE_GUID = 42d46c2e-b6ad-4a37-bb8d-c8acc350ac2b
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ SsdtRos.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Iort.aslc
+ Mcfg.aslc
+ RdDanielCfgXlr/Dsdt.asl
+ RdDanielCfgXlr/Madt.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkSize
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt
+ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioNetSize
+ gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt
+
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index a89bf26365..b2fc8d9b79 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -31,6 +31,7 @@
gRdN1EdgeX2AcpiTablesFileGuid = { 0x82a34150, 0x0fc6, 0x45f4, { 0x8e, 0xa0, 0xf0, 0xa4, 0x66, 0x0c, 0xf3, 0x5d } }
gRdE1EdgeAcpiTablesFileGuid = { 0x2af40815, 0xa84e, 0x4de9, { 0x8c, 0x38, 0x91, 0x40, 0xb3, 0x54, 0x40, 0x73 } }
gRdDanielCfgMAcpiTablesFileGuid = { 0x163132b3, 0x8ec1, 0x48f7, {0xb4, 0xd1, 0x49, 0x30, 0x6c, 0x3f, 0x4d, 0x51} }
+ gRdDanielCfgXlrAcpiTablesFileGuid = { 0x42d46c2e, 0xb6ad, 0x4a37, {0xbb, 0x8d, 0xc8, 0xac, 0xc3, 0x50, 0xac, 0x2b }}
[PcdsFeatureFlag.common]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 74fe1a4533..80d1bf773b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -257,6 +257,7 @@
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
+ Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 48192917e2..351c2dc9b4 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -104,6 +104,7 @@ READ_LOCK_STATUS = TRUE
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
# Required by PCI
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [edk2-platforms][PATCH 8/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-XLR platform
2020-03-12 12:43 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel aditya.angadi
` (6 preceding siblings ...)
2020-03-12 12:43 ` [edk2-platforms][PATCH 7/8] Platform/ARM/SgiPkg: add ACPI tables for RD-Daniel Config-XLR Aditya Angadi
@ 2020-03-12 12:43 ` Aditya Angadi
7 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 12:43 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
For RD-Daniel Config-XLR, use multichip mode information from the SGI
platform descriptor HOB to pick the correct ACPI table to be installed.
Change-Id: Ide397344a064a267333aed5e0b58499ee8f8439c
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 5 +++++
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 1 +
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 1 +
3 files changed, 7 insertions(+)
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index 7e0de765f7..b1f5714b93 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -51,6 +51,11 @@ STATIC SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP AcpiTableGuidLookup[] = {
RD_DANIEL_CFGM_CONF_ID,
MULTI_CHIP_MODE_DISABLED,
&gRdDanielCfgMAcpiTablesFileGuid),
+ ACPI_GUID_LOOKUP (
+ RD_DANIEL_PART_NUM,
+ RD_DANIEL_CFGXLR_CONF_ID,
+ MULTI_CHIP_MODE_ENABLED,
+ &gRdDanielCfgXlrAcpiTablesFileGuid),
};
VOID
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
index 82569820b7..00cbe608c2 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -35,6 +35,7 @@
gRdN1EdgeX2AcpiTablesFileGuid
gRdE1EdgeAcpiTablesFileGuid
gRdDanielCfgMAcpiTablesFileGuid
+ gRdDanielCfgXlrAcpiTablesFileGuid
[FeaturePcd]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index b6a427b8b6..9822858f6e 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -73,6 +73,7 @@
//RDDANIEL Platform Identification values
#define RD_DANIEL_PART_NUM 0x78A
#define RD_DANIEL_CFGM_CONF_ID 0x1
+#define RD_DANIEL_CFGXLR_CONF_ID 0x2
#define SGI_CONFIG_MASK 0x0F
#define SGI_CONFIG_SHIFT 0x1C
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [edk2-platforms][PATCH 7/8] Platform/ARM/SgiPkg: add ACPI tables for RD-Daniel Config-XLR
2020-03-12 14:35 [edk2-platforms][PATCH 0/8] Add platform support for RD-Daniel Aditya Angadi
@ 2020-03-12 14:35 ` Aditya Angadi
0 siblings, 0 replies; 10+ messages in thread
From: Aditya Angadi @ 2020-03-12 14:35 UTC (permalink / raw)
To: devel; +Cc: leif, michael.d.kinney, vijayenthiran.subramaniam, thomas.abraham
RD-Daniel Config-XLR is a platform in which four identical chips are connected
via a high speed CCIX link. Add Madt and Dsdt tables for the same.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
.../SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl | 125 +++++++++++++++
.../AcpiTables/RdDanielCfgXlr/Madt.aslc | 150 ++++++++++++++++++
.../AcpiTables/RdDanielCfgXlrAcpiTables.inf | 63 ++++++++
Platform/ARM/SgiPkg/SgiPlatform.dec | 1 +
Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 +
6 files changed, 341 insertions(+)
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
new file mode 100644
index 0000000000..23ada55ec4
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
@@ -0,0 +1,125 @@
+/** @file
+* Differentiated System Description Table Fields (DSDT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+ EFI_ACPI_ARM_OEM_REVISION) {
+ Scope (_SB) {
+
+ Device (CP00) { // Zeus core 0
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP01) { // Zeus core 1
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP02) { // Zeus core 2
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP03) { // Zeus core 3
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP04) { // Zeus core 4
+ Name (_HID, "ACPI0007")
+ Name (_UID, 4)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP05) { // Zeus core 5
+ Name (_HID, "ACPI0007")
+ Name (_UID, 5)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP06) { // Zeus core 6
+ Name (_HID, "ACPI0007")
+ Name (_UID, 6)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP07) { // Zeus core 7
+ Name (_HID, "ACPI0007")
+ Name (_UID, 7)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP08) { // Zeus core 8
+ Name (_HID, "ACPI0007")
+ Name (_UID, 8)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP09) { // Zeus core 9
+ Name (_HID, "ACPI0007")
+ Name (_UID, 9)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP10) { // Zeus core 10
+ Name (_HID, "ACPI0007")
+ Name (_UID, 10)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP11) { // Zeus core 11
+ Name (_HID, "ACPI0007")
+ Name (_UID, 11)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP12) { // Zeus core 12
+ Name (_HID, "ACPI0007")
+ Name (_UID, 12)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP13) { // Zeus core 13
+ Name (_HID, "ACPI0007")
+ Name (_UID, 13)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP14) { // Zeus core 14
+ Name (_HID, "ACPI0007")
+ Name (_UID, 14)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP15) { // Zeus core 15
+ Name (_HID, "ACPI0007")
+ Name (_UID, 15)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP16) { // Zeus core 16
+ Name (_HID, "ACPI0007")
+ Name (_UID, 16)
+ Name (_STA, 0xF)
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
new file mode 100644
index 0000000000..e3784b55f2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
@@ -0,0 +1,150 @@
+/** @file
+* Multiple APIC Description Table (MADT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CLUSTER_COUNT 4
+#define CORES_PER_CLUSTER 1
+#define CORE_COUNT (CLUSTER_COUNT * CORES_PER_CLUSTER)
+#define CHIP_COUNT 4
+
+// Multiple APIC Description Table
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_COUNT * CHIP_COUNT];
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor[CHIP_COUNT];
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ // MADT specific fields
+ 0, // LocalApicAddress
+ 0 // Flags
+ },
+ {
+ // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // PmuIrq, GicBase, GicVBase,
+ // GicHBase, GsivId, GicRBase,
+ // Efficiency)
+ // Note: The GIC Structure of the primary CPU must be the first entry
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+ //Chip 0
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 1
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x01000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x01000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x01000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x01000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 2
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x02000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x02000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x02000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x02000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 3
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x03000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x03000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x03000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x03000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ },
+ // GIC Distributor Entry
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ 0, 3),
+ {
+ // GIC Redistributor
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(0),
+ SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(1),
+ SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(2),
+ SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + SGI_REMOTE_CHIP_MEM_OFFSET(3),
+ SIZE_16MB)
+ }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
new file mode 100644
index 0000000000..6a5f77b91f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
@@ -0,0 +1,63 @@
+## @file
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2020, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = RdDanielCfgXlrAcpiTables
+ FILE_GUID = 42d46c2e-b6ad-4a37-bb8d-c8acc350ac2b
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ SsdtRos.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Iort.aslc
+ Mcfg.aslc
+ RdDanielCfgXlr/Dsdt.asl
+ RdDanielCfgXlr/Madt.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkSize
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt
+ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioNetSize
+ gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt
+
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index a89bf26365..b2fc8d9b79 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -31,6 +31,7 @@
gRdN1EdgeX2AcpiTablesFileGuid = { 0x82a34150, 0x0fc6, 0x45f4, { 0x8e, 0xa0, 0xf0, 0xa4, 0x66, 0x0c, 0xf3, 0x5d } }
gRdE1EdgeAcpiTablesFileGuid = { 0x2af40815, 0xa84e, 0x4de9, { 0x8c, 0x38, 0x91, 0x40, 0xb3, 0x54, 0x40, 0x73 } }
gRdDanielCfgMAcpiTablesFileGuid = { 0x163132b3, 0x8ec1, 0x48f7, {0xb4, 0xd1, 0x49, 0x30, 0x6c, 0x3f, 0x4d, 0x51} }
+ gRdDanielCfgXlrAcpiTablesFileGuid = { 0x42d46c2e, 0xb6ad, 0x4a37, {0xbb, 0x8d, 0xc8, 0xac, 0xc3, 0x50, 0xac, 0x2b }}
[PcdsFeatureFlag.common]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 74fe1a4533..80d1bf773b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -257,6 +257,7 @@
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
+ Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 48192917e2..351c2dc9b4 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -104,6 +104,7 @@ READ_LOCK_STATUS = TRUE
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
# Required by PCI
--
2.17.1
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