From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by mx.groups.io with SMTP id smtpd.web12.8241.1584457734637745958 for ; Tue, 17 Mar 2020 08:08:55 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=r+lQULCU; spf=pass (domain: nuviainc.com, ip: 209.85.128.65, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f65.google.com with SMTP id g62so22425216wme.1 for ; Tue, 17 Mar 2020 08:08:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=lcT6UDxiQBgFAQNRLFGfgKIQUaCqEo/87B3DYWlsrJo=; b=r+lQULCUeEfapqs/QgwYfVdeY5VfYQdJOtpPR70p3BcBZ16v0G+YlIldaHm787+zJA 7Z1lsU56Li2vVB2r+vgj1tw3OfTh7WvXdl5HyJ0wsk5Kk3zWK1sfPSrRA+XOgbzZ9yzz JqGrkId3bxQGps37hn40pUGm7nezqHLPQ1sahLtD++iuswfCpFZtbQvVAVJ5j+NSkLLy UOKFwuTTM5QCzIWsmD6igWzZmg97aQYb4RjrGLMXjKqPksa2BOqUCVu+H7kai/J++LAN /Y1Q23FqxmZxg7StjwfviVxdmV5v1dUlDps4d20D0/RpYqLSOPJL3m+3CrtYMWNRqueR mDhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=lcT6UDxiQBgFAQNRLFGfgKIQUaCqEo/87B3DYWlsrJo=; b=ny94MHXVLTlZXheiNCxNws6N7fR8xSQeXTSuvpoCSAiOJY5QDfj3hMnPmZrksoO/IM Qwh9YD5sIq2rnz3BBr9p4JU1cLXIHwKZAJYuz9cOGGRCRwprES11FUnED9Ms8fkLwdhC 63lKC5DLD1UKTGiRKu3bU5Iwv0XnDR1LcpIP1ubWFv8SIGuwcl4YFVqll7ysO+0fW1Xt YwDNYsWLtRfp7KwgWZKjKq8snupW6P7OfWavOkfDDTX2LHq7Q6TEQvaXr/fymaUiacyl d3gWAaceCPxThgGC0G9macKeUpAFmBrBiUA7JW3hG3GzEddx0Hny1ZcxVEghMMCSGc/P agzA== X-Gm-Message-State: ANhLgQ2z8f+aW7HMCCcGMASxG1JQnxUZWWlyYUfPD+qU0ZZeXJfd/dLD 4GCMKfeZd4Zfsy2RTdYTyMOs1g== X-Google-Smtp-Source: ADFU+vtFp8RbPY4VV/NzU1bkcB0chPCPHkQT4lnAAkf2D3A8mEUCgq0FnJ6KabSRcshJzYnUayaj2w== X-Received: by 2002:a1c:bc84:: with SMTP id m126mr5705258wmf.171.1584457733240; Tue, 17 Mar 2020 08:08:53 -0700 (PDT) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id d7sm5136165wrc.25.2020.03.17.08.08.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Mar 2020 08:08:52 -0700 (PDT) Date: Tue, 17 Mar 2020 15:08:51 +0000 From: "Leif Lindholm" To: Laszlo Ersek Cc: devel@edk2.groups.io, Ard Biesheuvel Subject: Re: [PATCH 1/1] ArmVirtPkg: fix ASSERT in ArmVirtGicArchLib with virtualization=on Message-ID: <20200317150851.GS23627@bivouac.eciton.net> References: <20200311153217.18253-1-leif@nuviainc.com> <5787d2ae-3e0a-2443-64bd-049743f8891b@redhat.com> MIME-Version: 1.0 In-Reply-To: <5787d2ae-3e0a-2443-64bd-049743f8891b@redhat.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Mar 11, 2020 at 16:39:41 +0100, Laszlo Ersek wrote: > On 03/11/20 16:32, Leif Lindholm wrote: > > ArmVirtGicArchLib was originally implemented before virtualization > > emulation was implemented in QEMU, and the GICv2 model implemented only > > the physical copy of control registers. > > > > Enabling virtualization emulation to QEMU adds also the virtual copy, > > doubling the RegSize returned by FindCompatibleNodeReg () in > > ArmVirtGicArchLibConstructor (). This triggered an ASSERT when running > > QEMU with -M virt,virtualization=on. Address this by testing for both > > possible valid values of RegSize. > > > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2588 > > > > Cc: Laszlo Ersek > > Cc: Ard Biesheuvel > > Signed-off-by: Leif Lindholm > > --- > > ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 7 ++++++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > > index af6b3af60edf..5448865ad8e8 100644 > > --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > > +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c > > @@ -110,7 +110,12 @@ ArmVirtGicArchLibConstructor ( > > break; > > > > case 2: > > - ASSERT (RegSize == 32); > > + // > > + // When the GICv2 is emulated with virtualization=on, it adds a virtual > > + // set of control registers. This means the register property can be > > + // either 32 or 64 bytes in size. > > + // > > + ASSERT ((RegSize == 32) || (RegSize == 64)); > > > > DistBase = SwapBytes64 (Reg[0]); > > CpuBase = SwapBytes64 (Reg[2]); > > > > Reviewed-by: Laszlo Ersek Thanks! Pushed as 01ce872739d2f. BZ closed. / Leif