From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by mx.groups.io with SMTP id smtpd.web12.733.1584639592796983114 for ; Thu, 19 Mar 2020 10:39:53 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=xfxr05PN; spf=pass (domain: nuviainc.com, ip: 209.85.128.68, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f68.google.com with SMTP id z13so3551863wml.0 for ; Thu, 19 Mar 2020 10:39:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=eBMOW3HeGqx8kWz9rh9tcH911ZpEsonOzhxV4g4Wzc8=; b=xfxr05PNrWfXUpCqMLVyK0+OmPH/Uzv6o3zfhOVs2LHjsfSM3tCyGlg2r7uzu9KoWj i8n5Mt7K+J0oBoOh2IwlHhTXb95hPoSSsn9buPbLIqA3JxWx4y8SrMLITdH2rbHo8GFa hHhZuKDp9e7jZRR8YV3SMlo0m8w+EJXyilEtAeWsuGWo7EsN2hWH8Db1Yll6LvTbBSKt 0c6tYjq6i5RXRz6pRaUbvdbG3Ik4VLqRStSo1A71E5WDFG6HbWOkOGO9HeoVUykflmjr A8I+eLD1r+XTcTUswPKQKbbxAL5tBPNvyiCf7BMeNPGOZp3AReC4grp/aS9pR4+5PJ1Z CSNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=eBMOW3HeGqx8kWz9rh9tcH911ZpEsonOzhxV4g4Wzc8=; b=ds2PXqtbvBlp79E7V685lKqJX7T1dmq1f6ypo0ZjkWp2yjDO2Qyz6yYs8XUf7SvgAj h6NDONYBxGC8Ozg025MPc0qMWOETiQlrs8+8+Nc+3DeCRjOgyqYZFvv3kkf/VKw1zUFN 4GIvhyQIpVjAkUpRqw0tJj2tA+yndA16/IR7rCC+DBErNy5XjKpEfpFYdM6HI7a6qUhS YPQvrqfRxfIpBL2wYnnmLSNyUqP4E9R6Xc6QdMrvmsFzhwKXYAW5aAWTrf+U+U5UTLP4 +Q3IIiRny3099Dt2R0jmGw9zBgMDfwpbuKKfaN0Cq/viZA47IxgdQtzEwGmQuq2fMukZ CPbw== X-Gm-Message-State: ANhLgQ0ZMk60u23QRzWduIsHhClUaDjC2s+Cg7nepBEodhK94PsN3xB2 wo6R+6dkZtDtVKrvlLv7zSsOzA== X-Google-Smtp-Source: ADFU+vs99Q5LD5dxImMY5cwrhhO+nN4LJYVWl/tyhpnPaGjkUjVWsoxjaKZodVtmNsn3uI8HUCg6tg== X-Received: by 2002:a1c:e109:: with SMTP id y9mr4852821wmg.62.1584639591366; Thu, 19 Mar 2020 10:39:51 -0700 (PDT) Return-Path: Received: from bivouac.eciton.net (bivouac.eciton.net. [2a00:1098:0:86:1000:23:0:2]) by smtp.gmail.com with ESMTPSA id f10sm4470886wrw.96.2020.03.19.10.39.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 10:39:50 -0700 (PDT) Date: Thu, 19 Mar 2020 17:39:49 +0000 From: "Leif Lindholm" To: Ashish Singhal Cc: devel@edk2.groups.io, ard.biesheuvel@linaro.org Subject: Re: [PATCH] ArmPkg/ArmLib: Fix cache-invalidate initial page tables Message-ID: <20200319173949.GA22097@bivouac.eciton.net> References: <388539fc2f778e417d632f24e20e54c82e0d80a4.1584635658.git.ashishsingha@nvidia.com> MIME-Version: 1.0 In-Reply-To: <388539fc2f778e417d632f24e20e54c82e0d80a4.1584635658.git.ashishsingha@nvidia.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Mar 19, 2020 at 10:37:05 -0600, Ashish Singhal wrote: > Because of a bug, current EL gets passed to DC IVAC instruction instead > of the VA entry that needs to be invalidated. Oh, yeah, that's obviously a bug. What idiot reviewed that patch? Oh, me... OK, so I should have added a reference to the bad commit before pushing, but by the time I remembered, the CI job had already merged the patch. So for the record, the offending commit was 3391e20ffa3f ("ArmPkg/ArmMmuLib AARCH64: cache-invalidate initial page table entries") Reviewed-by: Leif Lindholm Pushed as 0c8ea9fe1adb. Thanks! > Signed-off-by: Ashish Singhal > --- > ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S > index f744cd6..ba0ec56 100644 > --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S > +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S > @@ -122,7 +122,7 @@ ASM_FUNC(ArmSetMAIR) > ASM_FUNC(ArmUpdateTranslationTableEntry) > dsb nshst > lsr x1, x1, #12 > - EL1_OR_EL2_OR_EL3(x0) > + EL1_OR_EL2_OR_EL3(x2) > 1: tlbi vaae1, x1 // TLB Invalidate VA , EL1 > mrs x2, sctlr_el1 > b 4f > -- > 2.7.4 >