From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (EUR04-VI1-obe.outbound.protection.outlook.com [40.107.8.42]) by mx.groups.io with SMTP id smtpd.web11.13789.1584628584501944790 for ; Thu, 19 Mar 2020 07:36:25 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="body hash did not verify" header.i=@nxp1.onmicrosoft.com header.s=selector2-nxp1-onmicrosoft-com header.b=j1Lj23oi; spf=pass (domain: oss.nxp.com, ip: 40.107.8.42, mailfrom: pankaj.bansal@oss.nxp.com) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=UFYYwun5TmTDEAg/7lvtCESvmirNGWK6PWCmO2MzyQFfjMmiYZfeAccM1lqtzdOuBDF6Kxxc/Kyl+IDwmAoIe75eV8FOWe4T4ui6T33oSrV3SUkC6C0LESXuBxianZ2gJYJhtd0TfbBZMzPaADtpDsnGBKqlvXLlwIAUnXf6aiga1gSBcP47HAw20jwZdqM9yK1xITmTdHnzVBF8NWJLDAc/QwPr+ZT+kJ0HEGXS9OeMAb61M0tH0gkXjelRmFLR3PFCH8TfwRwbmG2zlwhsFVnCH/VrC6qZ6qdLQ6mpM3BE65hlumjHXF7uvpNn/0vJISbAysu66pn943+nH/siww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=MnKuDz+Lcm1cIdQvUlCq8G+VoR+EOv2R8IecVKDHgIo=; b=RBnWeL7g0sv+qUTLg09oPEL5ZcmX2B//DOt1emQ24d1WA8VtnGjs9KNCsSClptsatV4eLR4jAhfyuw9imfQBd+iBbJAuctzVAfqVpmS7CyCpyA09vJY8HSAEw/TgIYVJrGksVJFEwYTjRiAtmaYYp5Q0hUJLwoABJV4n1gCg0mIeWAIxTyzmW8rwwNdpZl5ffYU7GvmgGlzmRTqcUqXinOLhsqkue9fjbavQJ96zxs8ZIqEqYK7B/Q/5hSBsZrtfv8ViYjRi1l49RXxLsmNUe9WixzUzFDsequiS9eB7qH68cVE550UAaqtYJqTZ+09CAQLHzBFWGN9hhIRsGbh9Ug== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=MnKuDz+Lcm1cIdQvUlCq8G+VoR+EOv2R8IecVKDHgIo=; b=j1Lj23oi3SPsRk4/CAtBZad1b7Uhck28amGNTuPye19ykOrhqkAnn0iGAC6uq5wBT5vHvCVjRBAenXIDI9qhM7eY51vrvx82yRrBXkErFQht85xpx9IlkV9Vpw7qMj+TOws7hRx4N6fdtKksEIi8dYWs5SWv07renerKmyEirUk= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=pankaj.bansal@oss.nxp.com; Received: from VI1PR0401MB2496.eurprd04.prod.outlook.com (10.168.65.10) by VI1PR0401MB2382.eurprd04.prod.outlook.com (10.169.130.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2814.21; Thu, 19 Mar 2020 14:36:21 +0000 Received: from VI1PR0401MB2496.eurprd04.prod.outlook.com ([fe80::196a:28a9:bb9:2fae]) by VI1PR0401MB2496.eurprd04.prod.outlook.com ([fe80::196a:28a9:bb9:2fae%9]) with mapi id 15.20.2835.017; Thu, 19 Mar 2020 14:36:21 +0000 From: Pankaj Bansal To: Leif Lindholm , Meenakshi Aggarwal , Michael D Kinney , devel@edk2.groups.io, Varun Sethi , Samer El-Haj-Mahmoud , Jon Nettleton Subject: [PATCH v2 00/28] Add PEI phase to LS1043ARDB Platform Date: Fri, 20 Mar 2020 20:05:15 +0530 Message-ID: <20200320143543.18615-1-pankaj.bansal@oss.nxp.com> X-Mailer: git-send-email 2.17.1 X-ClientProxiedBy: SG2PR02CA0042.apcprd02.prod.outlook.com (2603:1096:3:18::30) To VI1PR0401MB2496.eurprd04.prod.outlook.com (2603:10a6:800:56::10) Return-Path: pankaj.bansal@oss.nxp.com MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from uefi-workstation.ap.freescale.net (92.120.0.69) by SG2PR02CA0042.apcprd02.prod.outlook.com (2603:1096:3:18::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2835.19 via Frontend Transport; Thu, 19 Mar 2020 14:36:19 +0000 X-Mailer: git-send-email 2.17.1 X-Originating-IP: [92.120.0.69] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 1a642be6-e118-472f-4d6d-08d7cc12e4ac X-MS-TrafficTypeDiagnostic: VI1PR0401MB2382:|VI1PR0401MB2382: X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-Forefront-PRVS: 0347410860 X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(4636009)(376002)(396003)(346002)(136003)(366004)(39860400002)(199004)(6666004)(316002)(186003)(16526019)(6506007)(8676002)(81166006)(81156014)(478600001)(86362001)(966005)(44832011)(19627235002)(26005)(8936002)(6486002)(5660300002)(52116002)(6512007)(956004)(66946007)(110136005)(66476007)(2616005)(2906002)(66556008)(1076003);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR0401MB2382;H:VI1PR0401MB2496.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:0; Received-SPF: None (protection.outlook.com: oss.nxp.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zwd2ohzG6sDDrSDz04b8O57f2d7oTWpkRTwdYw5xj6K0+kF/VUUfVE9lIrkX6BJFcttD8B4GtsANPTjx+0qZax1Fa9QC8QtoPuf0h+DjoQvCGBmj0NuPRNyDuyZ/8Dm4ZUJlIKnzAf+8X6M2hhr8+fHbws0v3a0hI1OkZ8XxtnOxp0J/iVd/luLi6P7pjYyJ+Aoi7hSMlKpXN9+l0UYbG56UpKH3ShFDKiiSf3g6+GoY3a7m/+yr7lUgcTawV0KQ2z/tYXXkcV99au0Kq9lgk0RqCKw2+kWk05+Ksc2fh1vKJk9Kw0+gDMoaxWCXRYH0kMDqgSRu8USyhhdIFk+DkEXPtQu/hIN5j/FmEqmdHJwF52j3Jh+hIL2C0psXeIDuCLcmxwUicKIoMSFgg3c36Ei2VPxGC4mTWh41FxyrDMv5gSbnN99EBWairnnOFX5vy3K05UjZcNlpCFimJr6G4F158kpoap4H+MhcuVNG+zWOLntT3nEiNJWo1oPg3G5/IzGVNjgdEj0o8Khybs7yYg== X-MS-Exchange-AntiSpam-MessageData: yrvJ3MIsPamSH/7vOToowbim9eRz1wVfpu3mXbSiO5XL1pb4st2qVuPYg5GTxPb8HcFMRsAfZnPcnEM/SplEXWosWEpNewoYxhtBQQK9t0hnpTsXmAwJ0Q3CE9oCZBzcLjjvqjy9S00M14husQJpqA== X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1a642be6-e118-472f-4d6d-08d7cc12e4ac X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Mar 2020 14:36:21.7058 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IYbuy+bDHgJTjLIS+aAzxg/AhTSKkl9h2ep44l1L3A6/9Rvz/I7hsSUB9huNTXXr6r5kZLToK+K40dStasn36A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2382 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Pankaj Bansal This patch series adds PEI phase to NXP LS1043ARDB Platform. The previous attempt at this feature can be referred here: https://edk2.groups.io/g/devel/message/54006 I have taken care of the review comments received on v1 and have broken down the patches further to make review easier. That is why the number of patches have increased from 19 in v1 to 28 in v2. As such the v1 and v2 patches have diverged, which is why i am not putting version specific changes in each indivisual patch. i have created v2 series in a way that the changes feel more organic and not abrupt. Only the patch "12/28 remove not needed components" would seem too invasive. But, as i have noted in patch description, i am not removing anything which is needed for booting LS1043ARDB as of now. i have done this to keep the code simple and introduce the components as and when needed for new features. This makes code review simpler too. Pankaj Bansal (28): Silicon/NXP: Add I2c lib Silicon/NXP: changes to use I2clib in i2cdxe Silicon/NXP/I2cDxe: Fix I2c Timeout with RTC Silicon/Maxim: Fix bug in RtcWrite in Ds1307RtcLib Silicon/Maxim: Add comments in Ds1307RtcLib NXP/LS1043aRdb: Move Soc specific components to soc files Silicon/NXP: Implement SerialUartClockLib Silicon/NXP/LS1043A: Use BaseSerialPortLib16550 as SerialPortLib Silicon/NXP: Drop DUartPortLib Silicon/NXP: remove print information from Soc lib Silicon/NXP: remove not needed components Silicon/NXP: Remove unnecessary PCDs Silicon/NXP: Move dsc file Platform/NXP: rename the ArmPlatformLib as per ArmPlatformPkg Silicon/NXP: Move RAM retrieval from SocLib Platform/NXP/LS1043aRdbPkg: Add Clock retrieval APIs Silicon/NXP: Use Clock retrieval PPI in modules Silicon/NXP: Add Chassis2 Package Silicon/NXP/LS1043A: Use ChassisLib from Chassis2 Pkg Silicon/NXP/LS1043A: Move SocLib to Soc Package Slicon/NXP: Add PlatformPei Lib NXP/LS1043aRdbPkg/ArmPlatformLib: Use default ArmPlatformHelper.S NXP/LS1043aRdbPkg/ArmPlatformLib: Use Allocate pool NXP/LS1043aRdbPkg/ArmPlatformLib: Remove extern SocInit Platform/NXP: Modify FV rules Platform/NXP/LS1043aRdbPkg: Add VarStore Silicon/NXP: move MemoryInitPeiLib as per PEIM structures Platform/NXP/LS1043aRdbPkg: Add PEI Phase Platform/NXP/FVRules.fdf.inc | 59 +- .../Drivers/PlatformDxe/PlatformDxe.c | 15 +- .../Drivers/PlatformDxe/PlatformDxe.inf | 11 +- Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 26 +- Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 21 +- .../AArch64/ArmPlatformHelper.S | 45 ++ .../ArmPlatformLib.c | 61 +- .../Library/ArmPlatformLib/ArmPlatformLib.inf | 42 ++ .../ArmPlatformLibMem.c} | 84 ++- .../Library/PlatformLib/ArmPlatformLib.inf | 55 -- .../Library/PlatformLib/NxpQoriqLsHelper.S | 31 - Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc | 91 +++ .../Maxim/Library/Ds1307RtcLib/Ds1307RtcLib.c | 23 +- Silicon/NXP/Chassis2/Chassis2.dec | 23 + Silicon/NXP/Chassis2/Chassis2.dsc.inc | 10 + Silicon/NXP/Chassis2/Include/Chassis.h | 34 ++ .../Chassis2/Library/ChassisLib/ChassisLib.c | 97 +++ .../Library/ChassisLib/ChassisLib.inf | 34 ++ Silicon/NXP/Drivers/I2cDxe/I2cDxe.c | 533 +--------------- Silicon/NXP/Drivers/I2cDxe/I2cDxe.h | 50 +- Silicon/NXP/Drivers/I2cDxe/I2cDxe.inf | 14 +- Silicon/NXP/Include/Chassis2/LsSerDes.h | 62 -- Silicon/NXP/Include/Chassis2/NxpSoc.h | 361 ----------- Silicon/NXP/Include/DramInfo.h | 38 -- Silicon/NXP/Include/Library/ChassisLib.h | 51 ++ Silicon/NXP/Include/Library/I2cLib.h | 120 ++++ Silicon/NXP/Include/Library/SocLib.h | 52 ++ Silicon/NXP/Include/Ppi/NxpPlatformGetClock.h | 53 ++ Silicon/NXP/LS1043A/Include/Soc.h | 55 ++ Silicon/NXP/LS1043A/Include/SocSerDes.h | 51 -- Silicon/NXP/LS1043A/LS1043A.dsc.inc | 51 +- Silicon/NXP/LS1043A/Library/SocLib/SocLib.c | 77 +++ Silicon/NXP/LS1043A/Library/SocLib/SocLib.inf | 27 + Silicon/NXP/Library/DUartPortLib/DUart.h | 122 ---- .../NXP/Library/DUartPortLib/DUartPortLib.c | 364 ----------- .../NXP/Library/DUartPortLib/DUartPortLib.inf | 34 -- Silicon/NXP/Library/I2cLib/I2cLib.c | 576 ++++++++++++++++++ Silicon/NXP/Library/I2cLib/I2cLib.inf | 31 + Silicon/NXP/Library/I2cLib/I2cLibInternal.h | 105 ++++ .../Library/MemoryInitPei/MemoryInitPeiLib.c | 140 ----- .../MemoryInitPeiLib/MemoryInitPeiLib.c | 224 +++++++ .../MemoryInitPeiLib/MemoryInitPeiLib.h | 25 + .../MemoryInitPeiLib.inf | 10 +- .../Library/PlatformPeiLib/PlatformPeiLib.c | 30 + .../Library/PlatformPeiLib/PlatformPeiLib.inf | 41 ++ .../SerialUartClockLib/SerialUartClockLib.c | 22 + .../SerialUartClockLib/SerialUartClockLib.inf | 26 + Silicon/NXP/Library/SocLib/Chassis.c | 495 --------------- Silicon/NXP/Library/SocLib/Chassis2/Soc.c | 162 ----- Silicon/NXP/Library/SocLib/LS1043aSocLib.inf | 45 -- Silicon/NXP/Library/SocLib/NxpChassis.h | 136 ----- Silicon/NXP/Library/SocLib/SerDes.c | 268 -------- Silicon/NXP/NxpQoriqLs.dec | 95 +-- {Platform =3D> Silicon}/NXP/NxpQoriqLs.dsc.inc | 74 ++- 54 files changed, 2181 insertions(+), 3201 deletions(-) create mode 100644 Platform/NXP/LS1043aRdbPkg/Library/ArmPlatformLib/AArch= 64/ArmPlatformHelper.S rename Platform/NXP/LS1043aRdbPkg/Library/{PlatformLib =3D> ArmPlatformLib= }/ArmPlatformLib.c (51%) create mode 100644 Platform/NXP/LS1043aRdbPkg/Library/ArmPlatformLib/ArmPl= atformLib.inf rename Platform/NXP/LS1043aRdbPkg/Library/{PlatformLib/NxpQoriqLsMem.c =3D= > ArmPlatformLib/ArmPlatformLibMem.c} (51%) delete mode 100644 Platform/NXP/LS1043aRdbPkg/Library/PlatformLib/ArmPlatf= ormLib.inf delete mode 100644 Platform/NXP/LS1043aRdbPkg/Library/PlatformLib/NxpQoriq= LsHelper.S create mode 100644 Platform/NXP/LS1043aRdbPkg/VarStore.fdf.inc create mode 100644 Silicon/NXP/Chassis2/Chassis2.dec create mode 100644 Silicon/NXP/Chassis2/Chassis2.dsc.inc create mode 100644 Silicon/NXP/Chassis2/Include/Chassis.h create mode 100644 Silicon/NXP/Chassis2/Library/ChassisLib/ChassisLib.c create mode 100644 Silicon/NXP/Chassis2/Library/ChassisLib/ChassisLib.inf delete mode 100644 Silicon/NXP/Include/Chassis2/LsSerDes.h delete mode 100644 Silicon/NXP/Include/Chassis2/NxpSoc.h delete mode 100644 Silicon/NXP/Include/DramInfo.h create mode 100644 Silicon/NXP/Include/Library/ChassisLib.h create mode 100644 Silicon/NXP/Include/Library/I2cLib.h create mode 100644 Silicon/NXP/Include/Library/SocLib.h create mode 100644 Silicon/NXP/Include/Ppi/NxpPlatformGetClock.h create mode 100644 Silicon/NXP/LS1043A/Include/Soc.h delete mode 100644 Silicon/NXP/LS1043A/Include/SocSerDes.h create mode 100644 Silicon/NXP/LS1043A/Library/SocLib/SocLib.c create mode 100644 Silicon/NXP/LS1043A/Library/SocLib/SocLib.inf delete mode 100644 Silicon/NXP/Library/DUartPortLib/DUart.h delete mode 100644 Silicon/NXP/Library/DUartPortLib/DUartPortLib.c delete mode 100644 Silicon/NXP/Library/DUartPortLib/DUartPortLib.inf create mode 100644 Silicon/NXP/Library/I2cLib/I2cLib.c create mode 100644 Silicon/NXP/Library/I2cLib/I2cLib.inf create mode 100644 Silicon/NXP/Library/I2cLib/I2cLibInternal.h delete mode 100644 Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c create mode 100644 Silicon/NXP/Library/MemoryInitPeiLib/MemoryInitPeiLib.c create mode 100644 Silicon/NXP/Library/MemoryInitPeiLib/MemoryInitPeiLib.h rename Silicon/NXP/Library/{MemoryInitPei =3D> MemoryInitPeiLib}/MemoryIni= tPeiLib.inf (74%) create mode 100644 Silicon/NXP/Library/PlatformPeiLib/PlatformPeiLib.c create mode 100644 Silicon/NXP/Library/PlatformPeiLib/PlatformPeiLib.inf create mode 100644 Silicon/NXP/Library/SerialUartClockLib/SerialUartClockL= ib.c create mode 100644 Silicon/NXP/Library/SerialUartClockLib/SerialUartClockL= ib.inf delete mode 100644 Silicon/NXP/Library/SocLib/Chassis.c delete mode 100644 Silicon/NXP/Library/SocLib/Chassis2/Soc.c delete mode 100644 Silicon/NXP/Library/SocLib/LS1043aSocLib.inf delete mode 100644 Silicon/NXP/Library/SocLib/NxpChassis.h delete mode 100644 Silicon/NXP/Library/SocLib/SerDes.c rename {Platform =3D> Silicon}/NXP/NxpQoriqLs.dsc.inc (84%) --=20 2.17.1