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[109.210.65.247]) by smtp.gmail.com with ESMTPSA id a13sm4756386wrt.64.2020.03.28.03.43.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Mar 2020 03:43:28 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif@nuviainc.com, Ard Biesheuvel Subject: [PATCH 3/5] ArmPkg/ArmMmuLib: drop pointless LookupAddresstoRootTable() routine Date: Sat, 28 Mar 2020 11:43:19 +0100 Message-Id: <20200328104321.8668-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200328104321.8668-1-ard.biesheuvel@linaro.org> References: <20200328104321.8668-1-ard.biesheuvel@linaro.org> LookupAddresstoRootTable() uses a loop to go over its MaxAddress argument, essentially to do a log2() and determine how many bits are needed to represent it. Since the argument is the result of a shift-left expression, there is some room for improvement here, and we can simply use the bit count directly to calculate the value of T0SZ. At the same time, we can omit calling GetRootTranslationTableInfo() to determine the number of root table entries, and add a new helper that applies the trivial calculation directly. Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 49 ++++++-------------- 1 file changed, 15 insertions(+), 34 deletions(-) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index d16e847218b7..b6f3ef54aa26 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -59,6 +59,16 @@ ArmMemoryAttributeToPageAttribute ( #define MIN_T0SZ 16 #define BITS_PER_LEVEL 9 +#define MAX_VA_BITS 48 + +STATIC +UINTN +GetRootTableEntryCount ( + IN UINTN T0SZ + ) +{ + return TT_ENTRY_COUNT >> (T0SZ - MIN_T0SZ) % BITS_PER_LEVEL; +} VOID GetRootTranslationTableInfo ( @@ -284,36 +294,6 @@ UpdateRegionMappingRecursive ( return EFI_SUCCESS; } -STATIC -VOID -LookupAddresstoRootTable ( - IN UINT64 MaxAddress, - OUT UINTN *T0SZ, - OUT UINTN *TableEntryCount - ) -{ - UINTN TopBit; - - // Check the parameters are not NULL - ASSERT ((T0SZ != NULL) && (TableEntryCount != NULL)); - - // Look for the highest bit set in MaxAddress - for (TopBit = 63; TopBit != 0; TopBit--) { - if ((1ULL << TopBit) & MaxAddress) { - // MaxAddress top bit is found - TopBit = TopBit + 1; - break; - } - } - ASSERT (TopBit != 0); - - // Calculate T0SZ from the top bit of the MaxAddress - *T0SZ = 64 - TopBit; - - // Get the Table info from T0SZ - GetRootTranslationTableInfo (*T0SZ, NULL, TableEntryCount); -} - STATIC EFI_STATUS UpdateRegionMapping ( @@ -508,6 +488,7 @@ ArmConfigureMmu ( ) { VOID* TranslationTable; + UINTN MaxAddressBits; UINT64 MaxAddress; UINTN T0SZ; UINTN RootTableEntryCount; @@ -526,11 +507,11 @@ ArmConfigureMmu ( // into account the architectural limitations that result from UEFI's // use of 4 KB pages. // - MaxAddress = MIN (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()) - 1, - MAX_ALLOC_ADDRESS); + MaxAddressBits = MIN (ArmGetPhysicalAddressBits (), MAX_VA_BITS); + MaxAddress = LShiftU64 (1ULL, MaxAddressBits) - 1; - // Lookup the Table Level to get the information - LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount); + T0SZ = 64 - MaxAddressBits; + RootTableEntryCount = GetRootTableEntryCount (T0SZ); // // Set TCR that allows us to retrieve T0SZ in the subsequent functions -- 2.17.1