Re: [PATCH v2 10/28] Silicon/NXP: remove print information from Soc lib

["Leif Lindholm" <leif@nuviainc.com>]

On Fri, Mar 20, 2020 at 20:05:25 +0530, Pankaj Bansal wrote:
> From: Pankaj Bansal <pankaj.bansal@nxp.com>
> 
> The Soc info being printed can be removed from SOC lib.
> We are in the process of implementing PEI Phase.
> After PEI phase impelmentation this info would be printed in
                  implementation
> common PEIM based on the information retrieved from PPIs.
> e.g. gArmMpCoreInfoPpiGuid can be used to print cluser and
                                                  cluster
> core info.
> 
> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>

With the commit message typos fixed:
Reviewed-by: Leif Lindholm <leif@nuviainc.com>

> ---
>  Silicon/NXP/Library/SocLib/Chassis.c      | 132 ----------------------
>  Silicon/NXP/Library/SocLib/Chassis2/Soc.c |  16 +--
>  Silicon/NXP/Library/SocLib/NxpChassis.h   |  26 +----
>  3 files changed, 2 insertions(+), 172 deletions(-)
> 
> diff --git a/Silicon/NXP/Library/SocLib/Chassis.c b/Silicon/NXP/Library/SocLib/Chassis.c
> index b8a8118c5e24..2f192e890bcf 100644
> --- a/Silicon/NXP/Library/SocLib/Chassis.c
> +++ b/Silicon/NXP/Library/SocLib/Chassis.c
> @@ -216,67 +216,6 @@ CpuMaskNext (
>    return Cpu;
>  }
>  
> -/*
> - * Print CPU information
> - */
> -VOID
> -PrintCpuInfo (
> -  VOID
> -  )
> -{
> -  SYS_INFO SysInfo;
> -  UINTN    CoreIndex;
> -  UINTN    Core;
> -  UINT32   Type;
> -  UINT32   NumCpus;
> -  UINT32   Mask;
> -  CHAR8    *CoreName;
> -
> -  GetSysInfo (&SysInfo);
> -  DEBUG ((DEBUG_INIT, "Clock Configuration:"));
> -
> -  NumCpus = CpuNumCores ();
> -  Mask = CpuMask ();
> -
> -  for (CoreIndex = 0, Core = CpuMaskNext(-1, Mask);
> -       CoreIndex < NumCpus;
> -       CoreIndex++, Core = CpuMaskNext(Core, Mask))
> -  {
> -    if (!(CoreIndex % 3)) {
> -      DEBUG ((DEBUG_INIT, "\n      "));
> -    }
> -
> -    Type = TP_ITYP_VERSION (QoriqCoreToType (Core));
> -    switch (Type) {
> -      case TY_ITYP_VERSION_A7:
> -        CoreName = "A7";
> -        break;
> -      case TY_ITYP_VERSION_A53:
> -        CoreName = "A53";
> -        break;
> -      case TY_ITYP_VERSION_A57:
> -        CoreName = "A57";
> -        break;
> -      case TY_ITYP_VERSION_A72:
> -        CoreName = "A72";
> -        break;
> -      default:
> -        CoreName = " Unknown Core ";
> -    }
> -    DEBUG ((DEBUG_INIT, "CPU%d(%a):%-4d MHz  ",
> -      Core, CoreName, SysInfo.FreqProcessor[Core] / MHZ));
> -  }
> -
> -  DEBUG ((DEBUG_INIT, "\n      Bus:      %-4d MHz  ", SysInfo.FreqSystemBus / MHZ));
> -  DEBUG ((DEBUG_INIT, "DDR:      %-4d MT/s", SysInfo.FreqDdrBus / MHZ));
> -
> -  if (SysInfo.FreqFman[0] != 0) {
> -    DEBUG ((DEBUG_INIT, "\n      FMAN:     %-4d MHz  ",  SysInfo.FreqFman[0] / MHZ));
> -  }
> -
> -  DEBUG ((DEBUG_INIT, "\n"));
> -}
> -
>  /*
>   * Return system bus frequency
>   */
> @@ -307,77 +246,6 @@ GetSdxcFrequency (
>    return SocSysInfo.FreqSdhc;
>  }
>  
> -/*
> - * Print Soc information
> - */
> -VOID
> -PrintSoc (
> -  VOID
> -  )
> -{
> -  CHAR8    Buf[20];
> -  CCSR_GUR *GurBase;
> -  UINTN    Count;
> -  //
> -  // Svr : System Version Register
> -  //
> -  UINTN    Svr;
> -  UINTN    Ver;
> -
> -  GurBase = (VOID *)PcdGet64 (PcdGutsBaseAddr);
> -
> -  Svr = GurRead ((UINTN)&GurBase->Svr);
> -  Ver = SVR_SOC_VER (Svr);
> -
> -  for (Count = 0; Count < ARRAY_SIZE (mCpuTypeList); Count++) {
> -    if ((mCpuTypeList[Count].SocVer & SVR_WO_E) == Ver) {
> -      AsciiStrCpyS (Buf, sizeof (Buf), mCpuTypeList[Count].Name);
> -
> -      if (IS_E_PROCESSOR (Svr)) {
> -        AsciiStrCatS (Buf, sizeof (Buf), "E");
> -      }
> -      break;
> -    }
> -  }
> -
> -  DEBUG ((DEBUG_INFO, "SoC: %a (0x%x); Rev %d.%d\n",
> -          Buf, Svr, SVR_MAJOR (Svr), SVR_MINOR (Svr)));
> -
> -  return;
> -}
> -
> -/*
> - * Dump RCW (Reset Control Word) on console
> - */
> -VOID
> -PrintRCW (
> -  VOID
> -  )
> -{
> -  CCSR_GUR *Base;
> -  UINTN    Count;
> -
> -  Base = (VOID *)PcdGet64 (PcdGutsBaseAddr);
> -
> -  /*
> -   * Display the RCW, so that no one gets confused as to what RCW
> -   * we're actually using for this boot.
> -   */
> -
> -  DEBUG ((DEBUG_INIT, "Reset Configuration Word (RCW):"));
> -  for (Count = 0; Count < ARRAY_SIZE (Base->RcwSr); Count++) {
> -    UINT32 Rcw = SwapMmioRead32 ((UINTN)&Base->RcwSr[Count]);
> -
> -    if ((Count % 4) == 0) {
> -      DEBUG ((DEBUG_INIT, "\n      %08x:", Count * 4));
> -    }
> -
> -    DEBUG ((DEBUG_INIT, " %08x", Rcw));
> -  }
> -
> -  DEBUG ((DEBUG_INIT, "\n"));
> -}
> -
>  /*
>   * Setup SMMU in bypass mode
>   * and also set its pagesize
> diff --git a/Silicon/NXP/Library/SocLib/Chassis2/Soc.c b/Silicon/NXP/Library/SocLib/Chassis2/Soc.c
> index bfb8b8cb339a..687a1d940066 100644
> --- a/Silicon/NXP/Library/SocLib/Chassis2/Soc.c
> +++ b/Silicon/NXP/Library/SocLib/Chassis2/Soc.c
> @@ -1,7 +1,7 @@
>  /** @Soc.c
>    SoC specific Library containg functions to initialize various SoC components
>  
> -  Copyright 2017-2019 NXP
> +  Copyright 2017-2020 NXP
>  
>    SPDX-License-Identifier: BSD-2-Clause-Patent
>  
> @@ -131,10 +131,6 @@ GetSysInfo (
>  
>  /**
>    Function to initialize SoC specific constructs
> -  CPU Info
> -  SoC Personality
> -  Board Personality
> -  RCW prints
>   **/
>  VOID
>  SocInit (
> @@ -147,16 +143,6 @@ SocInit (
>    // Early init serial Port to get board information.
>    //
>    SerialPortInitialize ();
> -  DEBUG ((DEBUG_INIT, "\nUEFI firmware (version %s built at %a on %a)\n",
> -          (CHAR16*)PcdGetPtr (PcdFirmwareVersionString), __TIME__, __DATE__));
> -
> -  PrintCpuInfo ();
> -
> -  //
> -  // Print Reset control Word
> -  //
> -  PrintRCW ();
> -  PrintSoc ();
>  
>    return;
>  }
> diff --git a/Silicon/NXP/Library/SocLib/NxpChassis.h b/Silicon/NXP/Library/SocLib/NxpChassis.h
> index 99f6439d8f35..a11acf71563e 100644
> --- a/Silicon/NXP/Library/SocLib/NxpChassis.h
> +++ b/Silicon/NXP/Library/SocLib/NxpChassis.h
> @@ -1,7 +1,7 @@
>  /** @file
>  *  Header defining the Base addresses, sizes, flags etc for chassis 1
>  *
> -*  Copyright 2017-2019 NXP
> +*  Copyright 2017-2020 NXP
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -54,14 +54,6 @@ typedef struct {
>    UINTN SdhcClk;
>  } SOC_CLOCK_INFO;
>  
> -/*
> - * Print Soc information
> - */
> -VOID
> -PrintSoc (
> -  VOID
> -  );
> -
>  /*
>   * Initialize Clock structure
>   */
> @@ -79,22 +71,6 @@ SmmuInit (
>    VOID
>    );
>  
> -/*
> - * Print CPU information
> - */
> -VOID
> -PrintCpuInfo (
> -  VOID
> -  );
> -
> -/*
> - * Dump RCW (Reset Control Word) on console
> - */
> -VOID
> -PrintRCW (
> -  VOID
> -  );
> -
>  UINT32
>  InitiatorType (
>    IN UINT32 Cluster,
> -- 
> 2.17.1
>