From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by mx.groups.io with SMTP id smtpd.web10.1396.1586379512877551129 for ; Wed, 08 Apr 2020 13:58:33 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=dME1FpXG; spf=pass (domain: nuviainc.com, ip: 209.85.128.65, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f65.google.com with SMTP id d77so1248492wmd.3 for ; Wed, 08 Apr 2020 13:58:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=jlMAxPpG4mBNtyMR0n7GtWB7pGoeiXzvrPNOF7bSltU=; b=dME1FpXGBPMKbwV+dlP9uyOMoABu0e4tQfJ7VJ0ycmgUDk351L90cnxZbsY4IZlz7n kJhSOA53+8zt08j3QZloUbadmudO2VJ8BEZZ39PjW2Qb3tVQGSpINAnOAfONUAKcmkBs x7BMgW+3MBgn9RxhZvy66KC4NxM+rgbYh40SUdewkn8/Ej7U4LRSfyf8EMNvXifSptJB 8CNyWIvz1ujEaYyl024D/F8xIFWXSTClCd0TpJ1+czcK0VplX3xDYfdfRojmc+9baGS/ 2vN7UKkf9A2+Nf0Y14rq69QSpc15OATlf8cQTUSZa4JDCn45TrfnqYCZ1fp2msfLbArm Vgqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=jlMAxPpG4mBNtyMR0n7GtWB7pGoeiXzvrPNOF7bSltU=; b=PhvdFhLrPzPqcPqrCVsI3ROY2MFNqo/EDOEtobr5ZvD64QeB3ped5D0nxPMlhZVNq6 QWH6OADmscWnjzpAim67HehQ3Qo+/bWxzg/kwB7INtcdlEN1mGxwddCGZaAbUhgUkxhz PVsU+yi5WW9Upsdk9cP6vPxQfk5mgUVVy1SX7jqOwXmSL7ANJCRjrH98SMqlO01w+sMr vOKWowF8ZmKqYkBMcGIXqKaiSV0YBv7G/hZ79YV7/oXGBjmQfQns5wJjn1y1/klAixNq yhkK/g86VzDHzV0wNexHCsgOi+A6gfJpuZeJPyUsFwauXtMUVzAY7gOKkhF7pnUi3B/o JgUg== X-Gm-Message-State: AGi0PuaBWYYwGReiO7s0ADDhOn+US8sjaMyV4S9P2bZHBBCByeltnSjk C+upfesThmyfqi/fI/MNljBGog== X-Google-Smtp-Source: APiQypKgZHVsFfYXJKkjgWHzndWdOagnhZGC9X5h4xw7vVaU2GK9Oe/pCRrTYaWn36zm+nYjcLKftA== X-Received: by 2002:a1c:a9d3:: with SMTP id s202mr6517920wme.160.1586379511481; Wed, 08 Apr 2020 13:58:31 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id x18sm866648wmi.29.2020.04.08.13.58.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Apr 2020 13:58:30 -0700 (PDT) Date: Wed, 8 Apr 2020 21:58:29 +0100 From: "Leif Lindholm" To: Ard Biesheuvel Cc: devel@edk2.groups.io Subject: Re: [PATCH edk2-platforms 1/1] Platform/DeveloperBox: omit TPM from DT when building without TPM support Message-ID: <20200408205829.GY14075@vanye> References: <20200408170031.898-1-ard.biesheuvel@arm.com> MIME-Version: 1.0 In-Reply-To: <20200408170031.898-1-ard.biesheuvel@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Apr 08, 2020 at 19:00:31 +0200, Ard Biesheuvel wrote: > The recently added support for TPM2 measured boot added a description of > the TPM to the device tree, but failed to take the build configuration > into account, and so it adds it unconditionally. > > Fix this, by #define'ing a TPM2_ENABLE CPP macro that can be referenced > in the device tree source file. > > Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm > --- > Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 7 ++++++- > Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 2 ++ > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc > index cddd34e65389..9307edefb11a 100644 > --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc > +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc > @@ -511,7 +511,12 @@ [Components.common] > # > # DT support > # > - Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.inf > + Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.inf { > + > +!if $(TPM2_ENABLE) == TRUE > + *_*_*_DTCPP_FLAGS = -D TPM2_ENABLE > +!endif > + } > > # > # Firmware update > diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts > index e77a372393fb..47ac27109929 100644 > --- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts > +++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts > @@ -27,9 +27,11 @@ > }; > }; > > +#ifdef TPM2_ENABLE > &tpm { > status = "okay"; > }; > +#endif > > &gpio { > gpio-line-names = "DSW3-PIN1", "DSW3-PIN2", "DSW3-PIN3", "DSW3-PIN4", > -- > 2.17.1 >