From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Leif Lindholm <leif@nuviainc.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>,
Leif Lindholm <leif.lindholm@linaro.org>,
Gilbert Chen <gilbert.chen@hpe.com>,
Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
Subject: [PATCH v1 9/9] MdePkg/BaseSafeIntLib: Add RISCV64 arch for BaseSafeIntLib.
Date: Fri, 10 Apr 2020 15:21:12 +0800 [thread overview]
Message-ID: <20200410072112.7310-10-abner.chang@hpe.com> (raw)
In-Reply-To: <20200410072112.7310-1-abner.chang@hpe.com>
Add RISCV64 arch for BaseSafeIntLib library.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
---
MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
index 68ade962d6..40017ec88b 100644
--- a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+++ b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
@@ -6,6 +6,8 @@
#
# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017, Microsoft Corporation
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
#
# All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -23,7 +25,7 @@
#
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64
+# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64
#
[Sources]
@@ -32,7 +34,7 @@
[Sources.Ia32, Sources.ARM]
SafeIntLib32.c
-[Sources.X64, Sources.AARCH64]
+[Sources.X64, Sources.AARCH64, Sources.RISCV64]
SafeIntLib64.c
[Sources.EBC]
--
2.25.0
next prev parent reply other threads:[~2020-04-10 7:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-10 7:21 [PATCH v1 0/9] MdePkg changes for RISC-V edk2 port Abner Chang
2020-04-10 7:21 ` [PATCH v1 1/9] MdePkg: RISC-V RV64 binding in MdePkg Abner Chang
2020-04-21 6:30 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` [PATCH v1 2/9] MdePkg/Include: RISC-V definitions Abner Chang
2020-04-21 6:32 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` [PATCH v1 3/9] MdePkg/BaseLib: BaseLib for RISC-V RV64 Processor Abner Chang
2020-04-21 6:32 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` [PATCH v1 4/9] MdePkg/BaseCacheMaintenanceLib: RISC-V cache maintenance implementation Abner Chang
2020-04-21 6:32 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` [PATCH v1 5/9] MdePkg/BaseIoLibIntrinsic: Rename IoLibArm.c=>IoLibNoIo.c Abner Chang
2020-04-21 6:36 ` [edk2-devel] " Zhiguang Liu
2020-04-21 8:21 ` Abner Chang
2020-04-10 7:21 ` [PATCH v1 6/9] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code Abner Chang
2020-04-21 6:36 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` [PATCH v1 7/9] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation Abner Chang
2020-04-21 6:36 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` [PATCH v1 8/9] MdePkg/BaseSynchronizationLib: RISC-V cache related code Abner Chang
2020-04-21 6:36 ` [edk2-devel] " Zhiguang Liu
2020-04-10 7:21 ` Abner Chang [this message]
2020-04-21 6:36 ` [edk2-devel] [PATCH v1 9/9] MdePkg/BaseSafeIntLib: Add RISCV64 arch for BaseSafeIntLib Zhiguang Liu
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