From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web12.5057.1586505548067268282 for ; Fri, 10 Apr 2020 00:59:08 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=036964ab29=abner.chang@hpe.com) Received: from pps.filterd (m0134421.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03A7tJdI012429; Fri, 10 Apr 2020 07:59:07 GMT Received: from g2t2352.austin.hpe.com (g2t2352.austin.hpe.com [15.233.44.25]) by mx0b-002e3701.pphosted.com with ESMTP id 3091nt4200-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Apr 2020 07:59:07 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2352.austin.hpe.com (Postfix) with ESMTP id C298691; Fri, 10 Apr 2020 07:59:06 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 630FD39; Fri, 10 Apr 2020 07:59:05 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Gilbert Chen , Leif Lindholm , Michael D Kinney , Liming Gao Subject: [PATCH v1 1/9] MdePkg: RISC-V RV64 binding in MdePkg Date: Fri, 10 Apr 2020 15:21:04 +0800 Message-Id: <20200410072112.7310-2-abner.chang@hpe.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200410072112.7310-1-abner.chang@hpe.com> References: <20200410072112.7310-1-abner.chang@hpe.com> MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-04-10_02:2020-04-07,2020-04-10 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1011 suspectscore=1 bulkscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 mlxscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004100066 Content-Transfer-Encoding: quoted-printable Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- MdePkg/MdePkg.dec | 5 +- MdePkg/MdePkg.dsc | 3 +- MdePkg/Include/RiscV64/ProcessorBind.h | 173 +++++++++++++++++++++++++ 3 files changed, 179 insertions(+), 2 deletions(-) create mode 100644 MdePkg/Include/RiscV64/ProcessorBind.h diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 6c37c2181c..0b9c4bc40a 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -6,7 +6,7 @@ #=0D # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.
=0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D -# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
=0D +# (C) Copyright 2016 - 2020 Hewlett Packard Enterprise Development LP
= =0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -39,6 +39,9 @@ [Includes.AARCH64]=0D Include/AArch64=0D =0D +[Includes.RISCV64]=0D + Include/RiscV64=0D +=0D [LibraryClasses]=0D ## @libraryclass Provides most usb APIs to support the Hid requests de= fined in Usb Hid 1.1 spec=0D # and the standard requests defined in Usb 1.1 spec.=0D diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc index 2b2d5981e8..6cd38e7ec3 100644 --- a/MdePkg/MdePkg.dsc +++ b/MdePkg/MdePkg.dsc @@ -3,6 +3,7 @@ #=0D # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
=0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D +# (C) Copyright 2020 Hewlett Packard Enterprise Development LP
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -14,7 +15,7 @@ PLATFORM_VERSION =3D 1.08=0D DSC_SPECIFICATION =3D 0x00010005=0D OUTPUT_DIRECTORY =3D Build/Mde=0D - SUPPORTED_ARCHITECTURES =3D IA32|X64|EBC|ARM|AARCH64=0D + SUPPORTED_ARCHITECTURES =3D IA32|X64|EBC|ARM|AARCH64|RISCV64=0D BUILD_TARGETS =3D DEBUG|RELEASE|NOOPT=0D SKUID_IDENTIFIER =3D DEFAULT=0D =0D diff --git a/MdePkg/Include/RiscV64/ProcessorBind.h b/MdePkg/Include/RiscV6= 4/ProcessorBind.h new file mode 100644 index 0000000000..2b11f041ea --- /dev/null +++ b/MdePkg/Include/RiscV64/ProcessorBind.h @@ -0,0 +1,173 @@ +/** @file=0D + Processor or Compiler specific defines and types for RISC-V=0D +=0D + Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef PROCESSOR_BIND_H__=0D +#define PROCESSOR_BIND_H__=0D +=0D +///=0D +/// Define the processor type so other code can make processor based choic= es=0D +///=0D +#define MDE_CPU_RISCV64=0D +=0D +//=0D +// Make sure we are using the correct packing rules per EFI specification= =0D +//=0D +#if !defined(__GNUC__)=0D +#pragma pack()=0D +#endif=0D +=0D +///=0D +/// 8-byte unsigned value=0D +///=0D +typedef unsigned long long UINT64 __attribute__ ((aligned (8)));=0D +///=0D +/// 8-byte signed value=0D +///=0D +typedef long long INT64 __attribute__ ((aligned (8)));=0D +///=0D +/// 4-byte unsigned value=0D +///=0D +typedef unsigned int UINT32 __attribute__ ((aligned (4)));=0D +///=0D +/// 4-byte signed value=0D +///=0D +typedef int INT32 __attribute__ ((aligned (4)));=0D +///=0D +/// 2-byte unsigned value=0D +///=0D +typedef unsigned short UINT16 __attribute__ ((aligned (2)));=0D +///=0D +/// 2-byte Character. Unless otherwise specified all strings are stored i= n the=0D +/// UTF-16 encoding format as defined by Unicode 2.1 and ISO/IEC 10646 sta= ndards.=0D +///=0D +typedef unsigned short CHAR16 __attribute__ ((aligned (2)));=0D +///=0D +/// 2-byte signed value=0D +///=0D +typedef short INT16 __attribute__ ((aligned (2)));=0D +///=0D +/// Logical Boolean. 1-byte value containing 0 for FALSE or a 1 for TRUE.= Other=0D +/// values are undefined.=0D +///=0D +typedef unsigned char BOOLEAN;=0D +///=0D +/// 1-byte unsigned value=0D +///=0D +typedef unsigned char UINT8;=0D +///=0D +/// 1-byte Character=0D +///=0D +typedef char CHAR8;=0D +///=0D +/// 1-byte signed value=0D +///=0D +typedef signed char INT8;=0D +///=0D +/// Unsigned value of native width. (4 bytes on supported 32-bit processo= r instructions,=0D +/// 8 bytes on supported 64-bit processor instructions)=0D +///=0D +typedef UINT64 UINTN __attribute__ ((aligned (8)));=0D +///=0D +/// Signed value of native width. (4 bytes on supported 32-bit processor = instructions,=0D +/// 8 bytes on supported 64-bit processor instructions)=0D +///=0D +typedef INT64 INTN __attribute__ ((aligned (8)));=0D +=0D +//=0D +// Processor specific defines=0D +//=0D +=0D +///=0D +/// A value of native width with the highest bit set.=0D +///=0D +#define MAX_BIT 0x8000000000000000ULL=0D +///=0D +/// A value of native width with the two highest bits set.=0D +///=0D +#define MAX_2_BITS 0xC000000000000000ULL=0D +=0D +///=0D +/// Maximum legal RV64 address=0D +///=0D +#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL=0D +=0D +///=0D +/// Maximum usable address at boot time (48 bits using 4 KB pages in Super= visor mode)=0D +///=0D +#define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL=0D +=0D +///=0D +/// Maximum legal RISC-V INTN and UINTN values.=0D +///=0D +#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)=0D +#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)=0D +=0D +///=0D +/// The stack alignment required for RISC-V=0D +///=0D +#define CPU_STACK_ALIGNMENT 16=0D +=0D +///=0D +/// Page allocation granularity for RISC-V=0D +///=0D +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)=0D +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000)=0D +=0D +//=0D +// Modifier to ensure that all protocol member functions and EFI intrinsic= s=0D +// use the correct C calling convention. All protocol member functions and= =0D +// EFI intrinsics are required to modify their member functions with EFIAP= I.=0D +//=0D +#ifdef EFIAPI=0D + ///=0D + /// If EFIAPI is already defined, then we use that definition.=0D + ///=0D +#elif defined(__GNUC__)=0D + ///=0D + /// Define the standard calling convention regardless of optimization le= vel=0D + /// The GCC support assumes a GCC compiler that supports the EFI ABI. Th= e EFI=0D + /// ABI is much closer to the x64 Microsoft* ABI than standard x64 (x86-= 64)=0D + /// GCC ABI. Thus a standard x64 (x86-64) GCC compiler can not be used f= or=0D + /// x64. Warning the assembly code in the MDE x64 does not follow the co= rrect=0D + /// ABI for the standard x64 (x86-64) GCC.=0D + ///=0D + #define EFIAPI=0D +#else=0D + ///=0D + /// The default for a non Microsoft* or GCC compiler is to assume the EF= I ABI=0D + /// is the standard.=0D + ///=0D + #define EFIAPI=0D +#endif=0D +=0D +#if defined(__GNUC__)=0D + ///=0D + /// For GNU assembly code, .global or .globl can declare global symbols.= =0D + /// Define this macro to unify the usage.=0D + ///=0D + #define ASM_GLOBAL .globl=0D +#endif=0D +=0D +/**=0D + Return the pointer to the first instruction of a function given a functi= on pointer.=0D + On x64 CPU architectures, these two pointer values are the same,=0D + so the implementation of this macro is very simple.=0D +=0D + @param FunctionPointer A pointer to a function.=0D +=0D + @return The pointer to the first instruction of a function given a funct= ion pointer.=0D +=0D +**/=0D +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPoin= ter)=0D +=0D +#ifndef __USER_LABEL_PREFIX__=0D +#define __USER_LABEL_PREFIX__=0D +#endif=0D +=0D +#endif=0D --=20 2.25.0