From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web11.4998.1586505549533420443 for ; Fri, 10 Apr 2020 00:59:09 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=036964ab29=abner.chang@hpe.com) Received: from pps.filterd (m0134421.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03A7tnti013263; Fri, 10 Apr 2020 07:59:09 GMT Received: from g2t2353.austin.hpe.com (g2t2353.austin.hpe.com [15.233.44.26]) by mx0b-002e3701.pphosted.com with ESMTP id 3091nt4206-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Apr 2020 07:59:09 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2353.austin.hpe.com (Postfix) with ESMTP id 787AB6D; Fri, 10 Apr 2020 07:59:08 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 1D17836; Fri, 10 Apr 2020 07:59:06 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Gilbert Chen , Leif Lindholm , Michael D Kinney , Liming Gao Subject: [PATCH v1 2/9] MdePkg/Include: RISC-V definitions. Date: Fri, 10 Apr 2020 15:21:05 +0800 Message-Id: <20200410072112.7310-3-abner.chang@hpe.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200410072112.7310-1-abner.chang@hpe.com> References: <20200410072112.7310-1-abner.chang@hpe.com> MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-04-10_02:2020-04-07,2020-04-10 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 suspectscore=1 bulkscore=0 mlxlogscore=623 spamscore=0 priorityscore=1501 mlxscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004100066 Content-Transfer-Encoding: quoted-printable Add RISC-V processor related definitions. Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- MdePkg/Include/IndustryStandard/PeImage.h | 12 +++++ MdePkg/Include/Protocol/DebugSupport.h | 55 +++++++++++++++++++++++ MdePkg/Include/Protocol/PxeBaseCode.h | 4 ++ MdePkg/Include/Uefi/UefiBaseType.h | 13 ++++++ MdePkg/Include/Uefi/UefiSpec.h | 5 +++ 5 files changed, 89 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/PeImage.h b/MdePkg/Include/Ind= ustryStandard/PeImage.h index a3d9bbed75..9b267002a1 100644 --- a/MdePkg/Include/IndustryStandard/PeImage.h +++ b/MdePkg/Include/IndustryStandard/PeImage.h @@ -9,6 +9,8 @@ =0D Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
=0D Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
=0D +Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development= LP. All rights reserved.
=0D +=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -34,6 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define IMAGE_FILE_MACHINE_X64 0x8664=0D #define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2=0D #define IMAGE_FILE_MACHINE_ARM64 0xAA64=0D +#define IMAGE_FILE_MACHINE_RISCV32 0x5032=0D +#define IMAGE_FILE_MACHINE_RISCV64 0x5064=0D +#define IMAGE_FILE_MACHINE_RISCV128 0x5128=0D =0D //=0D // EXE file formats=0D @@ -493,6 +498,13 @@ typedef struct { #define EFI_IMAGE_REL_BASED_MIPS_JMPADDR16 9=0D #define EFI_IMAGE_REL_BASED_DIR64 10=0D =0D +///=0D +/// Relocation types of RISC-V processor.=0D +///=0D +#define EFI_IMAGE_REL_BASED_RISCV_HI20 5=0D +#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7=0D +#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8=0D +=0D ///=0D /// Line number format.=0D ///=0D diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Protoc= ol/DebugSupport.h index 800e7710e6..7fb1d3b3e4 100644 --- a/MdePkg/Include/Protocol/DebugSupport.h +++ b/MdePkg/Include/Protocol/DebugSupport.h @@ -7,6 +7,7 @@ =0D Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
=0D Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
=0D +Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights = reserved.
=0D =0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D @@ -603,6 +604,59 @@ typedef struct { UINT64 FAR; // Fault Address Register=0D } EFI_SYSTEM_CONTEXT_AARCH64;=0D =0D +///=0D +/// RISC-V processor exception types.=0D +///=0D +#define EXCEPT_RISCV_INST_MISALIGNED 0=0D +#define EXCEPT_RISCV_INST_ACCESS_FAULT 1=0D +#define EXCEPT_RISCV_ILLEGAL_INST 2=0D +#define EXCEPT_RISCV_BREAKPOINT 3=0D +#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4=0D +#define EXCEPT_RISCV_LOAD_ACCESS_FAULT 5=0D +#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6=0D +#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7=0D +#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8=0D +#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9=0D +#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10=0D +#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11=0D +=0D +#define EXCEPT_RISCV_SOFTWARE_INT 0x0=0D +#define EXCEPT_RISCV_TIMER_INT 0x1=0D +=0D +typedef struct {=0D + UINT64 X0;=0D + UINT64 X1;=0D + UINT64 X2;=0D + UINT64 X3;=0D + UINT64 X4;=0D + UINT64 X5;=0D + UINT64 X6;=0D + UINT64 X7;=0D + UINT64 X8;=0D + UINT64 X9;=0D + UINT64 X10;=0D + UINT64 X11;=0D + UINT64 X12;=0D + UINT64 X13;=0D + UINT64 X14;=0D + UINT64 X15;=0D + UINT64 X16;=0D + UINT64 X17;=0D + UINT64 X18;=0D + UINT64 X19;=0D + UINT64 X20;=0D + UINT64 X21;=0D + UINT64 X22;=0D + UINT64 X23;=0D + UINT64 X24;=0D + UINT64 X25;=0D + UINT64 X26;=0D + UINT64 X27;=0D + UINT64 X28;=0D + UINT64 X29;=0D + UINT64 X30;=0D + UINT64 X31;=0D +} EFI_SYSTEM_CONTEXT_RISCV64;=0D =0D ///=0D /// Universal EFI_SYSTEM_CONTEXT definition.=0D @@ -614,6 +668,7 @@ typedef union { EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;=0D EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;=0D EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;=0D + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;=0D } EFI_SYSTEM_CONTEXT;=0D =0D //=0D diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Protoco= l/PxeBaseCode.h index b02d270134..c666d312b5 100644 --- a/MdePkg/Include/Protocol/PxeBaseCode.h +++ b/MdePkg/Include/Protocol/PxeBaseCode.h @@ -3,6 +3,8 @@ devices for network access and network booting.=0D =0D Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
=0D +Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights = reserved.
=0D +=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D @par Revision Reference:=0D @@ -153,6 +155,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT; #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000A=0D #elif defined (MDE_CPU_AARCH64)=0D #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B=0D +#elif defined (MDE_CPU_RISCV64)=0D +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B=0D #endif=0D =0D =0D diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi/UefiB= aseType.h index a62f13dd06..934fc07285 100644 --- a/MdePkg/Include/Uefi/UefiBaseType.h +++ b/MdePkg/Include/Uefi/UefiBaseType.h @@ -3,6 +3,7 @@ =0D Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
=0D Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
=0D +Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights = reserved.
=0D =0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D @@ -240,6 +241,12 @@ typedef union { ///=0D #define EFI_IMAGE_MACHINE_AARCH64 0xAA64=0D =0D +///=0D +/// PE32+ Machine type for RISC-V 32/64/128=0D +///=0D +#define EFI_IMAGE_MACHINE_RISCV32 0x5032=0D +#define EFI_IMAGE_MACHINE_RISCV64 0x5064=0D +#define EFI_IMAGE_MACHINE_RISCV128 0x5128=0D =0D #if defined (MDE_CPU_IA32)=0D =0D @@ -268,6 +275,12 @@ typedef union { =0D #define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)=0D =0D +#elif defined (MDE_CPU_RISCV64)=0D +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \=0D + ((Machine) =3D=3D EFI_IMAGE_MACHINE_RISCV64)=0D +=0D +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)=0D +=0D #elif defined (MDE_CPU_EBC)=0D =0D ///=0D diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h index 444aa35eca..8ffaf97515 100644 --- a/MdePkg/Include/Uefi/UefiSpec.h +++ b/MdePkg/Include/Uefi/UefiSpec.h @@ -6,6 +6,8 @@ by this include file.=0D =0D Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
=0D +Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
=0D +=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -2198,6 +2200,7 @@ typedef struct { #define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"= =0D #define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"= =0D #define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"= =0D +#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.E= FI"=0D =0D #if defined (MDE_CPU_IA32)=0D #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA= 32=0D @@ -2208,6 +2211,8 @@ typedef struct { #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AR= M=0D #elif defined (MDE_CPU_AARCH64)=0D #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AA= RCH64=0D +#elif defined (MDE_CPU_RISCV64)=0D + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RI= SCV64=0D #else=0D #error Unknown Processor Type=0D #endif=0D --=20 2.25.0