From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web12.5062.1586505556025684764 for ; Fri, 10 Apr 2020 00:59:16 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=036964ab29=abner.chang@hpe.com) Received: from pps.filterd (m0134422.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03A7ur3c000569; Fri, 10 Apr 2020 07:59:15 GMT Received: from g2t2354.austin.hpe.com (g2t2354.austin.hpe.com [15.233.44.27]) by mx0b-002e3701.pphosted.com with ESMTP id 3091pkm0rr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Apr 2020 07:59:15 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2354.austin.hpe.com (Postfix) with ESMTP id 3A7DEAC; Fri, 10 Apr 2020 07:59:15 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id D4FFB39; Fri, 10 Apr 2020 07:59:13 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Gilbert Chen , Leif Lindholm , Michael D Kinney , Liming Gao Subject: [PATCH v1 6/9] MdePkg/BasePeCoff: Add RISC-V PE/Coff related code. Date: Fri, 10 Apr 2020 15:21:09 +0800 Message-Id: <20200410072112.7310-7-abner.chang@hpe.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200410072112.7310-1-abner.chang@hpe.com> References: <20200410072112.7310-1-abner.chang@hpe.com> MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-04-10_02:2020-04-07,2020-04-10 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=999 suspectscore=1 bulkscore=0 priorityscore=1501 spamscore=0 adultscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004100066 Content-Transfer-Encoding: quoted-printable Support RISC-V image relocation. Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- .../Library/BasePeCoffLib/BasePeCoffLib.inf | 5 + .../BasePeCoffLib/BasePeCoffLibInternals.h | 9 ++ MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 3 +- .../BasePeCoffLib/RiscV/PeCoffLoaderEx.c | 133 ++++++++++++++++++ .../Library/BasePeCoffLib/BasePeCoffLib.uni | 2 + 5 files changed, 151 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf b/MdePkg/Librar= y/BasePeCoffLib/BasePeCoffLib.inf index 395c1403c0..110b6d5a09 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf @@ -3,6 +3,7 @@ # The IPF version library supports loading IPF and EBC PE/COFF image.=0D # The IA32 version library support loading IA32, X64 and EBC PE/COFF imag= es.=0D # The X64 version library support loading IA32, X64 and EBC PE/COFF image= s.=0D +# The RISC-V version library support loading RISC-V images.=0D #=0D # Caution: This module requires additional review when modified.=0D # This library will have external input - PE/COFF image.=0D @@ -11,6 +12,7 @@ #=0D # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
= =0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D +# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.= All rights reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -41,6 +43,9 @@ [Sources.ARM]=0D Arm/PeCoffLoaderEx.c=0D =0D +[Sources.RISCV64]=0D + RiscV/PeCoffLoaderEx.c=0D +=0D [Packages]=0D MdePkg/MdePkg.dec=0D =0D diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h b/MdePkg= /Library/BasePeCoffLib/BasePeCoffLibInternals.h index b74277f3e8..3ee56e0e5f 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h @@ -2,6 +2,7 @@ Declaration of internal functions in PE/COFF Lib.=0D =0D Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
=0D + Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. = All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -16,6 +17,14 @@ #include =0D #include =0D =0D +//=0D +// Macro definitions for RISC-V architecture.=0D +//=0D +#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1))=0D +#define RISCV_IMM_BITS 12=0D +#define RISCV_IMM_REACH (1LL<=0D Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D + Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. = All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D diff --git a/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c b/MdePkg/L= ibrary/BasePeCoffLib/RiscV/PeCoffLoaderEx.c new file mode 100644 index 0000000000..23170a6603 --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c @@ -0,0 +1,133 @@ +/** @file=0D + PE/Coff loader for RISC-V PE image=0D +=0D + Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. = All rights reserved.
=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +#include "BasePeCoffLibInternals.h"=0D +#include =0D +=0D +/**=0D + Performs an RISC-V specific relocation fixup and is a no-op on=0D + other instruction sets.=0D + RISC-V splits 32-bit fixup into 20bit and 12-bit with two relocation=0D + types. We have to know the lower 12-bit fixup first then we can deal=0D + carry over on high 20-bit fixup. So we log the high 20-bit in=0D + FixupData.=0D +=0D + @param Reloc The pointer to the relocation record.=0D + @param Fixup The pointer to the address to fix up.=0D + @param FixupData The pointer to a buffer to log the fixups.=0D + @param Adjust The offset to adjust the fixup.=0D +=0D + @return Status code.=0D +=0D +**/=0D +RETURN_STATUS=0D +PeCoffLoaderRelocateImageEx (=0D + IN UINT16 *Reloc,=0D + IN OUT CHAR8 *Fixup,=0D + IN OUT CHAR8 **FixupData,=0D + IN UINT64 Adjust=0D + )=0D +{=0D + UINT32 Value;=0D + UINT32 Value2;=0D + UINT32 *RiscVHi20Fixup;=0D +=0D + switch ((*Reloc) >> 12) {=0D + case EFI_IMAGE_REL_BASED_RISCV_HI20:=0D + *(UINT64 *)(*FixupData) =3D (UINT64)(UINTN)Fixup;=0D + break;=0D +=0D + case EFI_IMAGE_REL_BASED_RISCV_LOW12I:=0D + RiscVHi20Fixup =3D (UINT32 *)(*(UINT64 *)(*FixupData));=0D + if (RiscVHi20Fixup !=3D NULL) {=0D +=0D + Value =3D (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);=0D + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Fixup, 20, 12));=0D + if (Value2 & (RISCV_IMM_REACH/2)) {=0D + Value2 |=3D ~(RISCV_IMM_REACH-1);=0D + }=0D + Value +=3D Value2;=0D + Value +=3D (UINT32)Adjust;=0D + Value2 =3D RISCV_CONST_HIGH_PART (Value);=0D + *(UINT32 *)RiscVHi20Fixup =3D (RV_X (Value2, 12, 20) << 12) |\=0D + (RV_X (*(UINT32 *)RiscVHi20Fixu= p, 0, 12));=0D + *(UINT32 *)Fixup =3D (RV_X (Value, 0, 12) << 20) |\=0D + (RV_X (*(UINT32 *)Fixup, 0, 20));=0D + }=0D + break;=0D +=0D + case EFI_IMAGE_REL_BASED_RISCV_LOW12S:=0D + RiscVHi20Fixup =3D (UINT32 *)(*(UINT64 *)(*FixupData));=0D + if (RiscVHi20Fixup !=3D NULL) {=0D + Value =3D (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);=0D + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Fixup, 7, 5) | (RV_X(*(UINT32 = *)Fixup, 25, 7) << 5));=0D + if (Value2 & (RISCV_IMM_REACH/2)) {=0D + Value2 |=3D ~(RISCV_IMM_REACH-1);=0D + }=0D + Value +=3D Value2;=0D + Value +=3D (UINT32)Adjust;=0D + Value2 =3D RISCV_CONST_HIGH_PART (Value);=0D + *(UINT32 *)RiscVHi20Fixup =3D (RV_X (Value2, 12, 20) << 12) | \=0D + (RV_X (*(UINT32 *)RiscVHi20Fixu= p, 0, 12));=0D + Value2 =3D *(UINT32 *)Fixup & 0x01fff07f;=0D + Value &=3D RISCV_IMM_REACH - 1;=0D + *(UINT32 *)Fixup =3D Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) |= (RV_X(Value, 5, 7) << 25)));=0D + }=0D + break;=0D +=0D + default:=0D + return RETURN_UNSUPPORTED;=0D +=0D + }=0D + return RETURN_SUCCESS;=0D +}=0D +=0D +/**=0D + Returns TRUE if the machine type of PE/COFF image is supported. Supporte= d=0D + does not mean the image can be executed it means the PE/COFF loader supp= orts=0D + loading and relocating of the image type. It's up to the caller to suppo= rt=0D + the entry point.=0D +=0D + @param Machine Machine type from the PE Header.=0D +=0D + @return TRUE if this PE/COFF loader can load the image=0D +=0D +**/=0D +BOOLEAN=0D +PeCoffLoaderImageFormatSupported (=0D + IN UINT16 Machine=0D + )=0D +{=0D + if (Machine =3D=3D IMAGE_FILE_MACHINE_RISCV64) {=0D + return TRUE;=0D + }=0D +=0D + return FALSE;=0D +}=0D +=0D +/**=0D + Performs an Itanium-based specific re-relocation fixup and is a no-op on= other=0D + instruction sets. This is used to re-relocated the image into the EFI vi= rtual=0D + space for runtime calls.=0D +=0D + @param Reloc The pointer to the relocation record.=0D + @param Fixup The pointer to the address to fix up.=0D + @param FixupData The pointer to a buffer to log the fixups.=0D + @param Adjust The offset to adjust the fixup.=0D +=0D + @return Status code.=0D +=0D +**/=0D +RETURN_STATUS=0D +PeHotRelocateImageEx (=0D + IN UINT16 *Reloc,=0D + IN OUT CHAR8 *Fixup,=0D + IN OUT CHAR8 **FixupData,=0D + IN UINT64 Adjust=0D + )=0D +{=0D + return RETURN_UNSUPPORTED;=0D +}=0D diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni b/MdePkg/Librar= y/BasePeCoffLib/BasePeCoffLib.uni index b0ea702f76..55417029f2 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni @@ -4,6 +4,7 @@ // The IPF version library supports loading IPF and EBC PE/COFF image.=0D // The IA32 version library support loading IA32, X64 and EBC PE/COFF imag= es.=0D // The X64 version library support loading IA32, X64 and EBC PE/COFF image= s.=0D +// The RISC-V version library support loading RISC-V32 and RISC-V64 PE/COF= F images.=0D //=0D // Caution: This module requires additional review when modified.=0D // This library will have external input - PE/COFF image.=0D @@ -12,6 +13,7 @@ //=0D // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
= =0D // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D +// Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.= All rights reserved.
=0D //=0D // SPDX-License-Identifier: BSD-2-Clause-Patent=0D //=0D --=20 2.25.0