From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.10413.1586868775535786494 for ; Tue, 14 Apr 2020 05:52:55 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: aditya.angadi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 650BC30E; Tue, 14 Apr 2020 05:52:54 -0700 (PDT) Received: from usa.arm.com (a073440-lin.blr.arm.com [10.162.16.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 75BB33F73D; Tue, 14 Apr 2020 05:52:52 -0700 (PDT) From: "Aditya Angadi" To: devel@edk2.groups.io Cc: thomas.abraham@arm.com, ard.biesheuvel@arm.com, leif@nuviainc.com, Vijayenthiran Subramaniam , Aditya Angadi Subject: [edk2-platforms][PATCH v4 4/9] Platform/ARM/Sgi: Add support for remote numa memory nodes Date: Tue, 14 Apr 2020 18:22:03 +0530 Message-Id: <20200414125208.2878-5-aditya.angadi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200414125208.2878-1-aditya.angadi@arm.com> References: <20200414125208.2878-1-aditya.angadi@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Vijayenthiran Subramaniam Add new PCDs that define the base address and size of remote NUMA memory nodes on multi-chip platforms. Use these PCDs to setup system memory resource descriptor HOBs. Signed-off-by: Aditya Angadi --- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 18 ++++ Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 87 ++++++++++= +++++++++- Platform/ARM/SgiPkg/SgiPlatform.dec | 19 +++++ 3 files changed, 123 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Pl= atform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index a918afef5fba..c3125d7e4e0f 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -46,6 +46,24 @@ [FixedPcd] =20 gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize + + gArmSgiTokenSpaceGuid.PcdChipCount + + gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote1 + gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote1 + gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote1 + gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote1 + + gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote2 + gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote2 + gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote2 + gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote2 + + gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote3 + gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote3 + gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote3 + gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote3 + gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmTokenSpaceGuid.PcdFvBaseAddress diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/P= latform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index 8d0ad4ec9c84..d8d9a406cf91 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -16,7 +16,8 @@ #include =20 // Total number of descriptors, including the final "end-of-table" descr= iptor. -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 13 +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ + (11 + (FixedPcdGet32 (PcdChipCount) * 2)) =20 /** Returns the Virtual Memory Map of the platform. @@ -52,6 +53,48 @@ ArmPlatformGetVirtualMemoryMap ( FixedPcdGet64 (PcdDramBlock2Base), FixedPcdGet64 (PcdDramBlock2Size)); =20 +#if (FixedPcdGet32 (PcdChipCount) > 1) + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock1BaseRemote1), + FixedPcdGet64 (PcdDramBlock1SizeRemote1)); + + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock2BaseRemote1), + FixedPcdGet64 (PcdDramBlock2SizeRemote1)); + +#if (FixedPcdGet32 (PcdChipCount) > 2) + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock1BaseRemote2), + FixedPcdGet64 (PcdDramBlock1SizeRemote2)); + + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock2BaseRemote2), + FixedPcdGet64 (PcdDramBlock2SizeRemote2)); + +#if (FixedPcdGet32 (PcdChipCount) > 3) + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock1BaseRemote3), + FixedPcdGet64 (PcdDramBlock1SizeRemote3)); + + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdDramBlock2BaseRemote3), + FixedPcdGet64 (PcdDramBlock2SizeRemote3)); +#endif +#endif +#endif + ASSERT (VirtualMemoryMap !=3D NULL); Index =3D 0; =20 @@ -122,6 +165,48 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock2S= ize); VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; =20 +#if (FixedPcdGet32 (PcdChipCount) > 1) + // Chip 1 DDR Block 1 - (2GB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock1B= aseRemote1); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock1B= aseRemote1); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock1B= aseRemote1); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; + + // Chip 1 DDR Block 2 - (6GB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock2B= aseRemote1); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock2B= aseRemote1); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock2B= aseRemote1); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; + +#if (FixedPcdGet32 (PcdChipCount) > 2) + // Chip 2 DDR Block 1 - (2GB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock1B= aseRemote2); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock1B= aseRemote2); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock1B= aseRemote2); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; + + // Chip 2 DDR Block 2 - (6GB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock2B= aseRemote2); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock2B= aseRemote2); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock2B= aseRemote2); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; + +#if (FixedPcdGet32 (PcdChipCount) > 3) + // Chip 3 DDR Block 1 - (2GB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock1B= aseRemote3); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock1B= aseRemote3); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock1B= aseRemote3); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; + + // Chip 3 DDR Block 2 - (6GB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdDramBlock2B= aseRemote3); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdDramBlock2B= aseRemote3); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdDramBlock2B= aseRemote3); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_WRITE_BACK; +#endif +#endif +#endif + // PCI Configuration Space VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciExpressB= aseAddress); VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciExpressB= aseAddress); diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/Sg= iPlatform.dec index 97c1e40349ea..28d738f982dd 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -46,6 +46,25 @@ [PcdsFixedAtBuild] gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008 gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x000000= 09 =20 + # Chip count on the platform + gArmSgiTokenSpaceGuid.PcdChipCount|1|UINT32|0x0000000C + + # Remote NUMA memory node base and size + gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote1|0|UINT64|0x00000011 + gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote1|0|UINT64|0x00000012 + gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote1|0|UINT64|0x00000013 + gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote1|0|UINT64|0x00000014 + + gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote2|0|UINT64|0x00000015 + gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote2|0|UINT64|0x00000016 + gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote2|0|UINT64|0x00000017 + gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote2|0|UINT64|0x00000018 + + gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote3|0|UINT64|0x00000019 + gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote3|0|UINT64|0x0000001A + gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote3|0|UINT64|0x0000001B + gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote3|0|UINT64|0x0000001C + # GIC gArmSgiTokenSpaceGuid.PcdGicSize|0|UINT64|0x0000000A =20 --=20 2.17.1