From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from userp2120.oracle.com (userp2120.oracle.com [156.151.31.85]) by mx.groups.io with SMTP id smtpd.web11.684.1586885755593029050 for ; Tue, 14 Apr 2020 10:35:55 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@oracle.com header.s=corp-2020-01-29 header.b=UtXvyUpg; spf=pass (domain: oracle.com, ip: 156.151.31.85, mailfrom: nikita.leshchenko@oracle.com) Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.42/8.16.0.42) with SMTP id 03EH9alx154803; Tue, 14 Apr 2020 17:35:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=corp-2020-01-29; bh=uwx6VFzN0YzXOFrQPegPt6XUfVxTofSKmESWYOkYIN4=; b=UtXvyUpgoUUq2LPxAlYXg93t4sopVxi+qKrU6rt/elKHEgcHPYrWsQ4Cz73xAATTg9C4 3WioFbDNfj3u+/685ds9sw66S1iPNmBSFG0aMd164z1PMvhJtJ5t/0kCtCnqngNjIbd2 W+8bULSdPbiH5OPatdkbkiVuNw1U95u8CxWEOxtaRQL8gGjjny85BcjqpULpvAhFOBW4 KTy1qHk40pnsfawXeWJWZYF98XIQXzdlVEA1nPQgTWiZDI1v1l8xTQPYAYqdMnC2v8bS IWPfp/tti0mJLtoQHRza1D7aViGaHrZZz9PYyGnrcWvWPsOeqiTVwnoUs+GhMGKcv6hc cg== Received: from userp3030.oracle.com (userp3030.oracle.com [156.151.31.80]) by userp2120.oracle.com with ESMTP id 30b6hpp87y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 14 Apr 2020 17:35:52 +0000 Received: from pps.filterd (userp3030.oracle.com [127.0.0.1]) by userp3030.oracle.com (8.16.0.42/8.16.0.42) with SMTP id 03EH7sCG012066; Tue, 14 Apr 2020 17:35:52 GMT Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by userp3030.oracle.com with ESMTP id 30bqcjanef-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 14 Apr 2020 17:35:52 +0000 Received: from abhmp0018.oracle.com (abhmp0018.oracle.com [141.146.116.24]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id 03EHZoWw022227; Tue, 14 Apr 2020 17:35:50 GMT Received: from spark.ravello.local (/213.57.127.2) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 14 Apr 2020 10:35:50 -0700 From: "Nikita Leshenko" To: devel@edk2.groups.io Cc: Nikita Leshenko , liran.alon@oracle.com, aaron.young@oracle.com, Jordan Justen , Laszlo Ersek , Ard Biesheuvel Subject: [PATCH v4 10/13] OvmfPkg/MptScsiDxe: Initialize hardware Date: Tue, 14 Apr 2020 20:38:10 +0300 Message-Id: <20200414173813.7715-11-nikita.leshchenko@oracle.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200414173813.7715-1-nikita.leshchenko@oracle.com> References: <20200414173813.7715-1-nikita.leshchenko@oracle.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9591 signatures=668686 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 mlxlogscore=999 bulkscore=0 malwarescore=0 phishscore=0 mlxscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004140131 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9591 signatures=668686 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 adultscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004140131 Content-Transfer-Encoding: 8bit Reset and send the IO controller initialization request. The reply is read back to complete the doorbell function but it isn't useful to us because it doesn't contain relevant data or status codes. See "LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller" technical manual for more information. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2390 Signed-off-by: Nikita Leshenko --- .../Include/IndustryStandard/FusionMptScsi.h | 123 +++++++++++++ OvmfPkg/MptScsiDxe/MptScsi.c | 173 +++++++++++++++++- 2 files changed, 295 insertions(+), 1 deletion(-) diff --git a/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h b/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h index df9bdc2f0348..d00a9e6db0bf 100644 --- a/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h +++ b/OvmfPkg/Include/IndustryStandard/FusionMptScsi.h @@ -20,4 +20,127 @@ #define LSI_SAS1068_PCI_DEVICE_ID 0x0054 #define LSI_SAS1068E_PCI_DEVICE_ID 0x0058 +#define MPT_REG_DOORBELL 0x00 +#define MPT_REG_WRITE_SEQ 0x04 +#define MPT_REG_HOST_DIAG 0x08 +#define MPT_REG_TEST 0x0c +#define MPT_REG_DIAG_DATA 0x10 +#define MPT_REG_DIAG_ADDR 0x14 +#define MPT_REG_ISTATUS 0x30 +#define MPT_REG_IMASK 0x34 +#define MPT_REG_REQ_Q 0x40 +#define MPT_REG_REP_Q 0x44 + +#define MPT_DOORBELL_RESET 0x40 +#define MPT_DOORBELL_HANDSHAKE 0x42 + +#define MPT_IMASK_DOORBELL 0x01 +#define MPT_IMASK_REPLY 0x08 + +#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST 0x00 +#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT 0x02 + +#define MPT_SG_ENTRY_TYPE_SIMPLE 0x01 + +#define MPT_IOC_WHOINIT_ROM_BIOS 0x02 + +// +// Device structures +// + +typedef union { +#pragma pack (1) + struct { + UINT8 WhoInit; + UINT8 Reserved1; + UINT8 ChainOffset; + UINT8 Function; + UINT8 Flags; + UINT8 MaxDevices; + UINT8 MaxBuses; + UINT8 MessageFlags; + UINT32 MessageContext; + UINT16 ReplyFrameSize; + UINT16 Reserved2; + UINT32 HostMfaHighAddr; + UINT32 SenseBufferHighAddr; + } Data; +#pragma pack () + UINT64 Uint64; // 8 byte alignment required by HW +} MPT_IO_CONTROLLER_INIT_REQUEST; + +#pragma pack (1) +typedef struct { + UINT8 WhoInit; + UINT8 Reserved1; + UINT8 MessageLength; + UINT8 Function; + UINT8 Flags; + UINT8 MaxDevices; + UINT8 MaxBuses; + UINT8 MessageFlags; + UINT32 MessageContext; + UINT16 Reserved2; + UINT16 IOCStatus; + UINT32 IOCLogInfo; +} MPT_IO_CONTROLLER_INIT_REPLY; + +typedef struct { + UINT8 TargetID; + UINT8 Bus; + UINT8 ChainOffset; + UINT8 Function; + UINT8 CDBLength; + UINT8 SenseBufferLength; + UINT8 Reserved; + UINT8 MessageFlags; + UINT32 MessageContext; + UINT8 LUN[8]; + UINT32 Control; + UINT8 CDB[16]; + UINT32 DataLength; + UINT32 SenseBufferLowAddress; +} MPT_SCSI_IO_REQUEST; + +typedef struct { + UINT32 Length: 24; + UINT32 EndOfList: 1; + UINT32 Is64BitAddress: 1; + // + // True when the buffer contains data to be transfered. Otherwise it's the + // destination buffer + // + UINT32 BufferContainsData: 1; + UINT32 LocalAddress: 1; + UINT32 ElementType: 2; + UINT32 EndOfBuffer: 1; + UINT32 LastElement: 1; + UINT64 DataBufferAddress; +} MPT_SG_ENTRY_SIMPLE; +#pragma pack () + +typedef union { +#pragma pack (1) + struct { + UINT8 TargetID; + UINT8 Bus; + UINT8 MessageLength; + UINT8 Function; + UINT8 CDBLength; + UINT8 SenseBufferLength; + UINT8 Reserved; + UINT8 MessageFlags; + UINT32 MessageContext; + UINT8 SCSIStatus; + UINT8 SCSIState; + UINT16 IOCStatus; + UINT32 IOCLogInfo; + UINT32 TransferCount; + UINT32 SenseCount; + UINT32 ResponseInfo; + } Data; +#pragma pack () + UINT64 Uint64; // 8 byte alignment required by HW +} MPT_SCSI_IO_ERROR_REPLY; + #endif // __FUSION_MPT_SCSI_H__ diff --git a/OvmfPkg/MptScsiDxe/MptScsi.c b/OvmfPkg/MptScsiDxe/MptScsi.c index 4bfd03d2acb0..9c3bdc430e1a 100644 --- a/OvmfPkg/MptScsiDxe/MptScsi.c +++ b/OvmfPkg/MptScsiDxe/MptScsi.c @@ -42,6 +42,167 @@ typedef struct { #define MPT_SCSI_FROM_PASS_THRU(PassThruPtr) \ CR (PassThruPtr, MPT_SCSI_DEV, PassThru, MPT_SCSI_DEV_SIGNATURE) +// +// Hardware functions +// + +STATIC +EFI_STATUS +Out32 ( + IN MPT_SCSI_DEV *Dev, + IN UINT32 Addr, + IN UINT32 Data + ) +{ + return Dev->PciIo->Io.Write ( + Dev->PciIo, + EfiPciIoWidthUint32, + PCI_BAR_IDX0, + Addr, + 1, + &Data + ); +} + +STATIC +EFI_STATUS +In32 ( + IN MPT_SCSI_DEV *Dev, + IN UINT32 Addr, + OUT UINT32 *Data + ) +{ + return Dev->PciIo->Io.Read ( + Dev->PciIo, + EfiPciIoWidthUint32, + PCI_BAR_IDX0, + Addr, + 1, + Data + ); +} + +STATIC +EFI_STATUS +MptDoorbell ( + IN MPT_SCSI_DEV *Dev, + IN UINT8 DoorbellFunc, + IN UINT8 DoorbellArg + ) +{ + return Out32 ( + Dev, + MPT_REG_DOORBELL, + (((UINT32)DoorbellFunc) << 24) | (DoorbellArg << 16) + ); +} + +STATIC +EFI_STATUS +MptScsiReset ( + IN MPT_SCSI_DEV *Dev + ) +{ + EFI_STATUS Status; + + // + // Reset hardware + // + Status = MptDoorbell (Dev, MPT_DOORBELL_RESET, 0); + if (EFI_ERROR (Status)) { + return Status; + } + // + // Mask interrupts + // + Status = Out32 (Dev, MPT_REG_IMASK, MPT_IMASK_DOORBELL | MPT_IMASK_REPLY); + if (EFI_ERROR (Status)) { + return Status; + } + // + // Clear interrupt status + // + Status = Out32 (Dev, MPT_REG_ISTATUS, 0); + if (EFI_ERROR (Status)) { + return Status; + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +MptScsiInit ( + IN MPT_SCSI_DEV *Dev + ) +{ + EFI_STATUS Status; + MPT_IO_CONTROLLER_INIT_REQUEST Req; + MPT_IO_CONTROLLER_INIT_REPLY Reply; + UINT8 *ReplyBytes; + UINT32 ReplyWord; + + Status = MptScsiReset (Dev); + if (EFI_ERROR (Status)) { + return Status; + } + + ZeroMem (&Req, sizeof (Req)); + ZeroMem (&Reply, sizeof (Reply)); + Req.Data.WhoInit = MPT_IOC_WHOINIT_ROM_BIOS; + Req.Data.Function = MPT_MESSAGE_HDR_FUNCTION_IOC_INIT; + Req.Data.MaxDevices = 1; + Req.Data.MaxBuses = 1; + Req.Data.ReplyFrameSize = sizeof (MPT_SCSI_IO_ERROR_REPLY); + + // + // Send controller init through doorbell + // + Status = MptDoorbell ( + Dev, + MPT_DOORBELL_HANDSHAKE, + sizeof (Req) / sizeof (UINT32) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Status = Dev->PciIo->Io.Write ( + Dev->PciIo, + EfiPciIoWidthFifoUint32, + 0, + MPT_REG_DOORBELL, + sizeof (Req) / sizeof (UINT32), + &Req + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Read reply through doorbell + // Each 32bit (Dword) read produces 16bit (Word) of data + // + ReplyBytes = (UINT8 *)&Reply; + while (ReplyBytes != (UINT8 *)(&Reply + 1)) { + Status = In32 (Dev, MPT_REG_DOORBELL, &ReplyWord); + if (EFI_ERROR (Status)) { + return Status; + } + CopyMem (ReplyBytes, &ReplyWord, sizeof (UINT16)); + ReplyBytes += sizeof (UINT16); + } + + // + // Clear interrupts generated by doorbell reply + // + Status = Out32 (Dev, MPT_REG_ISTATUS, 0); + if (EFI_ERROR (Status)) { + return Status; + } + + return EFI_SUCCESS; +} + // // Ext SCSI Pass Thru // @@ -333,6 +494,11 @@ MptScsiControllerStart ( goto CloseProtocol; } + Status = MptScsiInit (Dev); + if (EFI_ERROR (Status)) { + goto RestorePciAttributes; + } + // // Host adapter channel, doesn't exist // @@ -357,11 +523,14 @@ MptScsiControllerStart ( &Dev->PassThru ); if (EFI_ERROR (Status)) { - goto RestoreAttributes; + goto UninitDev; } return EFI_SUCCESS; +UninitDev: + MptScsiReset (Dev); + RestoreAttributes: Dev->PciIo->Attributes ( Dev->PciIo, @@ -421,6 +590,8 @@ MptScsiControllerStop ( return Status; } + MptScsiReset (Dev); + Dev->PciIo->Attributes ( Dev->PciIo, EfiPciIoAttributeOperationEnable, -- 2.20.1