From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web11.12821.1587914339002893055 for ; Sun, 26 Apr 2020 08:18:59 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=03859c2cac=abner.chang@hpe.com) Received: from pps.filterd (m0134422.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03QFHcTM006067; Sun, 26 Apr 2020 15:18:58 GMT Received: from g2t2353.austin.hpe.com (g2t2353.austin.hpe.com [15.233.44.26]) by mx0b-002e3701.pphosted.com with ESMTP id 30my2nauda-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sun, 26 Apr 2020 15:18:58 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2353.austin.hpe.com (Postfix) with ESMTP id 05CFC65; Sun, 26 Apr 2020 15:18:58 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 9FA0339; Sun, 26 Apr 2020 15:18:56 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Gilbert Chen , Leif Lindholm , Dandan Bi , Liming Gao Subject: [PATCH v2 3/3] MdeModulePkg/DxeIplPeim : RISC-V platform level DxeIPL Date: Sun, 26 Apr 2020 22:40:24 +0800 Message-Id: <20200426144024.7265-4-abner.chang@hpe.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200426144024.7265-1-abner.chang@hpe.com> References: <20200426144024.7265-1-abner.chang@hpe.com> MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-04-26_06:2020-04-24,2020-04-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=976 impostorscore=0 malwarescore=0 spamscore=0 clxscore=1015 suspectscore=1 adultscore=0 phishscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004260142 Content-Transfer-Encoding: quoted-printable Implementation of RISC-V DxeIPL. Signed-off-by: Abner Chang Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Cc: Dandan Bi Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +- .../Core/DxeIplPeim/RiscV64/DxeLoadFunc.c | 74 +++++++++++++++++++ 2 files changed, 79 insertions(+), 1 deletion(-) create mode 100644 MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/Dx= eIplPeim/DxeIpl.inf index 98bc17fc9d..3f17028546 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf @@ -7,6 +7,7 @@ #=0D # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
= =0D # Copyright (c) 2017, AMD Incorporated. All rights reserved.
=0D +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -25,7 +26,7 @@ #=0D # The following information is for reference only and not required by the = build tools.=0D #=0D -# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) = AARCH64=0D +# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) = AARCH64 RISCV64=0D #=0D =0D [Sources]=0D @@ -49,6 +50,9 @@ [Sources.ARM, Sources.AARCH64]=0D Arm/DxeLoadFunc.c=0D =0D +[Sources.RISCV64]=0D + RiscV64/DxeLoadFunc.c=0D +=0D [Packages]=0D MdePkg/MdePkg.dec=0D MdeModulePkg/MdeModulePkg.dec=0D diff --git a/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c b/MdeModule= Pkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c new file mode 100644 index 0000000000..2ce52eb0ec --- /dev/null +++ b/MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c @@ -0,0 +1,74 @@ +/** @file=0D + RISC-V specific functionality for DxeLoad.=0D +=0D + Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include "DxeIpl.h"=0D +=0D +/**=0D + Transfers control to DxeCore.=0D +=0D + This function performs a CPU architecture specific operations to execut= e=0D + the entry point of DxeCore with the parameters of HobList.=0D + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.=0D +=0D + @param DxeCoreEntryPoint The entry point of DxeCore.=0D + @param HobList The start of HobList passed to DxeCore= .=0D +=0D +**/=0D +VOID=0D +HandOffToDxeCore (=0D + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,=0D + IN EFI_PEI_HOB_POINTERS HobList=0D + )=0D +{=0D + VOID *BaseOfStack;=0D + VOID *TopOfStack;=0D + EFI_STATUS Status;=0D + //=0D + //=0D + // Allocate 128KB for the Stack=0D + //=0D + BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));=0D + if (BaseOfStack =3D=3D NULL) {=0D + DEBUG((DEBUG_ERROR, "%a: Can't allocate memory for stack.", __FUNCTION= __));=0D + ASSERT(FALSE);=0D + }=0D +=0D + //=0D + // Compute the top of the stack we were allocated. Pre-allocate a UINTN= =0D + // for safety.=0D + //=0D + TopOfStack =3D (VOID *)((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_S= IZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);=0D + TopOfStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);=0D +=0D + //=0D + // End of PEI phase signal=0D + //=0D + Status =3D PeiServicesInstallPpi (&gEndOfPeiSignalPpi);=0D + if (EFI_ERROR (Status)) {=0D + DEBUG((DEBUG_ERROR, "%a: Fail to signal End of PEI event.", __FUNCTION= __));=0D + ASSERT(FALSE);=0D + }=0D + //=0D + // Update the contents of BSP stack HOB to reflect the real stack info p= assed to DxeCore.=0D + //=0D + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);= =0D +=0D + DEBUG ((DEBUG_INFO, "DXE Core new stack at %x, stack pointer at %x\n", B= aseOfStack, TopOfStack));=0D +=0D + //=0D + // Transfer the control to the entry point of DxeCore.=0D + //=0D + SwitchStack (=0D + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,=0D + HobList.Raw,=0D + NULL,=0D + TopOfStack=0D + );=0D +}=0D +=0D --=20 2.25.0