From: "Pankaj Bansal" <pankaj.bansal@nxp.com>
To: Leif Lindholm <leif@nuviainc.com>,
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
Michael D Kinney <michael.d.kinney@intel.com>,
devel@edk2.groups.io, Varun Sethi <V.Sethi@nxp.com>,
Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>,
Jon Nettleton <jon@solid-run.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH edk2-platforms v4 07/24] Silicon/NXP: remove print information from Soc lib
Date: Fri, 1 May 2020 11:19:38 +0530 [thread overview]
Message-ID: <20200501054955.13025-8-pankaj.bansal@oss.nxp.com> (raw)
In-Reply-To: <20200501054955.13025-1-pankaj.bansal@oss.nxp.com>
From: Pankaj Bansal <pankaj.bansal@nxp.com>
The Soc info being printed can be removed from SOC lib.
We are in the process of implementing PEI Phase.
After PEI phase implementation this info would be printed in
common PEIM based on the information retrieved from PPIs.
e.g. gArmMpCoreInfoPpiGuid can be used to print cluster and
core info.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---
Notes:
V4:
- cluser -> cluster
V3:
- remove CpuMaskNext from this patch and put in previous patch
Silicon/NXP/Library/SocLib/NxpChassis.h | 26 +---
Silicon/NXP/Library/SocLib/Chassis.c | 144 --------------------
Silicon/NXP/Library/SocLib/Chassis2/Soc.c | 16 +--
3 files changed, 2 insertions(+), 184 deletions(-)
diff --git a/Silicon/NXP/Library/SocLib/NxpChassis.h b/Silicon/NXP/Library/SocLib/NxpChassis.h
index 99f6439d8f35..a11acf71563e 100644
--- a/Silicon/NXP/Library/SocLib/NxpChassis.h
+++ b/Silicon/NXP/Library/SocLib/NxpChassis.h
@@ -1,7 +1,7 @@
/** @file
* Header defining the Base addresses, sizes, flags etc for chassis 1
*
-* Copyright 2017-2019 NXP
+* Copyright 2017-2020 NXP
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -54,14 +54,6 @@ typedef struct {
UINTN SdhcClk;
} SOC_CLOCK_INFO;
-/*
- * Print Soc information
- */
-VOID
-PrintSoc (
- VOID
- );
-
/*
* Initialize Clock structure
*/
@@ -79,22 +71,6 @@ SmmuInit (
VOID
);
-/*
- * Print CPU information
- */
-VOID
-PrintCpuInfo (
- VOID
- );
-
-/*
- * Dump RCW (Reset Control Word) on console
- */
-VOID
-PrintRCW (
- VOID
- );
-
UINT32
InitiatorType (
IN UINT32 Cluster,
diff --git a/Silicon/NXP/Library/SocLib/Chassis.c b/Silicon/NXP/Library/SocLib/Chassis.c
index b8a8118c5e24..adca7b8dd413 100644
--- a/Silicon/NXP/Library/SocLib/Chassis.c
+++ b/Silicon/NXP/Library/SocLib/Chassis.c
@@ -204,79 +204,6 @@ QoriqCoreToType (
return EFI_NOT_FOUND; /* cannot identify the cluster */
}
-STATIC
-UINTN
-CpuMaskNext (
- IN UINTN Cpu,
- IN UINTN Mask
- )
-{
- for (Cpu++; !((1 << Cpu) & Mask); Cpu++);
-
- return Cpu;
-}
-
-/*
- * Print CPU information
- */
-VOID
-PrintCpuInfo (
- VOID
- )
-{
- SYS_INFO SysInfo;
- UINTN CoreIndex;
- UINTN Core;
- UINT32 Type;
- UINT32 NumCpus;
- UINT32 Mask;
- CHAR8 *CoreName;
-
- GetSysInfo (&SysInfo);
- DEBUG ((DEBUG_INIT, "Clock Configuration:"));
-
- NumCpus = CpuNumCores ();
- Mask = CpuMask ();
-
- for (CoreIndex = 0, Core = CpuMaskNext(-1, Mask);
- CoreIndex < NumCpus;
- CoreIndex++, Core = CpuMaskNext(Core, Mask))
- {
- if (!(CoreIndex % 3)) {
- DEBUG ((DEBUG_INIT, "\n "));
- }
-
- Type = TP_ITYP_VERSION (QoriqCoreToType (Core));
- switch (Type) {
- case TY_ITYP_VERSION_A7:
- CoreName = "A7";
- break;
- case TY_ITYP_VERSION_A53:
- CoreName = "A53";
- break;
- case TY_ITYP_VERSION_A57:
- CoreName = "A57";
- break;
- case TY_ITYP_VERSION_A72:
- CoreName = "A72";
- break;
- default:
- CoreName = " Unknown Core ";
- }
- DEBUG ((DEBUG_INIT, "CPU%d(%a):%-4d MHz ",
- Core, CoreName, SysInfo.FreqProcessor[Core] / MHZ));
- }
-
- DEBUG ((DEBUG_INIT, "\n Bus: %-4d MHz ", SysInfo.FreqSystemBus / MHZ));
- DEBUG ((DEBUG_INIT, "DDR: %-4d MT/s", SysInfo.FreqDdrBus / MHZ));
-
- if (SysInfo.FreqFman[0] != 0) {
- DEBUG ((DEBUG_INIT, "\n FMAN: %-4d MHz ", SysInfo.FreqFman[0] / MHZ));
- }
-
- DEBUG ((DEBUG_INIT, "\n"));
-}
-
/*
* Return system bus frequency
*/
@@ -307,77 +234,6 @@ GetSdxcFrequency (
return SocSysInfo.FreqSdhc;
}
-/*
- * Print Soc information
- */
-VOID
-PrintSoc (
- VOID
- )
-{
- CHAR8 Buf[20];
- CCSR_GUR *GurBase;
- UINTN Count;
- //
- // Svr : System Version Register
- //
- UINTN Svr;
- UINTN Ver;
-
- GurBase = (VOID *)PcdGet64 (PcdGutsBaseAddr);
-
- Svr = GurRead ((UINTN)&GurBase->Svr);
- Ver = SVR_SOC_VER (Svr);
-
- for (Count = 0; Count < ARRAY_SIZE (mCpuTypeList); Count++) {
- if ((mCpuTypeList[Count].SocVer & SVR_WO_E) == Ver) {
- AsciiStrCpyS (Buf, sizeof (Buf), mCpuTypeList[Count].Name);
-
- if (IS_E_PROCESSOR (Svr)) {
- AsciiStrCatS (Buf, sizeof (Buf), "E");
- }
- break;
- }
- }
-
- DEBUG ((DEBUG_INFO, "SoC: %a (0x%x); Rev %d.%d\n",
- Buf, Svr, SVR_MAJOR (Svr), SVR_MINOR (Svr)));
-
- return;
-}
-
-/*
- * Dump RCW (Reset Control Word) on console
- */
-VOID
-PrintRCW (
- VOID
- )
-{
- CCSR_GUR *Base;
- UINTN Count;
-
- Base = (VOID *)PcdGet64 (PcdGutsBaseAddr);
-
- /*
- * Display the RCW, so that no one gets confused as to what RCW
- * we're actually using for this boot.
- */
-
- DEBUG ((DEBUG_INIT, "Reset Configuration Word (RCW):"));
- for (Count = 0; Count < ARRAY_SIZE (Base->RcwSr); Count++) {
- UINT32 Rcw = SwapMmioRead32 ((UINTN)&Base->RcwSr[Count]);
-
- if ((Count % 4) == 0) {
- DEBUG ((DEBUG_INIT, "\n %08x:", Count * 4));
- }
-
- DEBUG ((DEBUG_INIT, " %08x", Rcw));
- }
-
- DEBUG ((DEBUG_INIT, "\n"));
-}
-
/*
* Setup SMMU in bypass mode
* and also set its pagesize
diff --git a/Silicon/NXP/Library/SocLib/Chassis2/Soc.c b/Silicon/NXP/Library/SocLib/Chassis2/Soc.c
index bfb8b8cb339a..687a1d940066 100644
--- a/Silicon/NXP/Library/SocLib/Chassis2/Soc.c
+++ b/Silicon/NXP/Library/SocLib/Chassis2/Soc.c
@@ -1,7 +1,7 @@
/** @Soc.c
SoC specific Library containg functions to initialize various SoC components
- Copyright 2017-2019 NXP
+ Copyright 2017-2020 NXP
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -131,10 +131,6 @@ GetSysInfo (
/**
Function to initialize SoC specific constructs
- CPU Info
- SoC Personality
- Board Personality
- RCW prints
**/
VOID
SocInit (
@@ -147,16 +143,6 @@ SocInit (
// Early init serial Port to get board information.
//
SerialPortInitialize ();
- DEBUG ((DEBUG_INIT, "\nUEFI firmware (version %s built at %a on %a)\n",
- (CHAR16*)PcdGetPtr (PcdFirmwareVersionString), __TIME__, __DATE__));
-
- PrintCpuInfo ();
-
- //
- // Print Reset control Word
- //
- PrintRCW ();
- PrintSoc ();
return;
}
--
2.17.1
next prev parent reply other threads:[~2020-04-30 5:51 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-01 5:49 [PATCH edk2-platforms v4 00/24] Add PEI phase to LS1043ARDB Platform Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 01/24] Silicon/NXP: Add I2c lib Pankaj Bansal
2020-05-05 15:11 ` Leif Lindholm
2020-05-01 5:49 ` [PATCH edk2-platforms v4 02/24] Silicon/NXP: changes to use I2clib in i2cdxe Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 03/24] Silicon/NXP/I2cDxe: Fix I2c Timeout with RTC Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 04/24] Silicon/Maxim: Fix bug in RtcWrite in Ds1307RtcLib Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 05/24] Silicon/Maxim: Add comments " Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 06/24] NXP/LS1043aRdb: Move Soc specific components to soc files Pankaj Bansal
2020-05-01 5:49 ` Pankaj Bansal [this message]
2020-05-01 5:49 ` [PATCH edk2-platforms v4 08/24] Silicon/NXP: remove not needed components Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 09/24] Silicon/NXP: Remove unnecessary PCDs Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 10/24] Silicon/NXP: Move dsc file Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 11/24] Platform/NXP: rename the ArmPlatformLib as per ArmPlatformPkg Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 12/24] Silicon/NXP: Move RAM retrieval from SocLib Pankaj Bansal
2020-05-06 10:44 ` Leif Lindholm
2020-05-07 7:28 ` Pankaj Bansal
2020-05-07 10:15 ` Leif Lindholm
2020-05-08 5:31 ` Pankaj Bansal
2020-05-11 10:27 ` Leif Lindholm
2020-05-01 5:49 ` [PATCH edk2-platforms v4 13/24] Platform/NXP/LS1043aRdbPkg: Add Clock retrieval APIs Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 14/24] Silicon/NXP: Use Clock retrieval PPI in modules Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 15/24] Silicon: NXP: Remove direct calls to SwapMmio* APIs Pankaj Bansal
2020-05-06 10:48 ` Leif Lindholm
2020-05-01 5:49 ` [PATCH edk2-platforms v4 16/24] Silicon/NXP: Add Chassis2 Package Pankaj Bansal
2020-05-06 10:52 ` Leif Lindholm
2020-05-01 5:49 ` [PATCH edk2-platforms v4 17/24] Silicon/NXP/LS1043A: Use ChassisLib from Chassis2 Pkg Pankaj Bansal
2020-05-06 10:54 ` Leif Lindholm
2020-05-01 5:49 ` [PATCH edk2-platforms v4 18/24] Silicon/NXP/LS1043A: Move SocLib to Soc Package Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 19/24] NXP/LS1043aRdbPkg/ArmPlatformLib: Remove extern SocInit Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 20/24] NXP: LS1043aRdbPkg: Use ArmPlatformHelper.S from ArmPlatformPkg Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 21/24] Platform/NXP: Use FV rules from ArmVirtPkg Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 22/24] Platform/NXP/LS1043aRdbPkg: Add VarStore Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 23/24] Silicon/NXP: move MemoryInitPeiLib as per PEIM structures Pankaj Bansal
2020-05-01 5:49 ` [PATCH edk2-platforms v4 24/24] Platform/NXP/LS1043aRdbPkg: Add PEI Phase Pankaj Bansal
2020-05-06 10:57 ` Leif Lindholm
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200501054955.13025-8-pankaj.bansal@oss.nxp.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox