* [PATCH v5][edk2-platforms 01/17] Platform/ARM/SgiPkg: Create platform specific dsc files
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
@ 2020-05-05 13:01 ` Aditya Angadi
2020-05-05 13:01 ` [PATCH v5][edk2-platforms 02/17] Platform/ARM/SgiPkg: Let platforms define core and cluster count Aditya Angadi
` (16 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:01 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
There are currently four platforms that are supported under SgiPkg and
all these four platforms have a common platform dsc file to allow these
to be built into a single binary. But the newer platforms that are
intended to be added to the SgiPkg differ to some extent on the software
programming interface. So in order to accommodate the newer platforms
into SgiPkg, there is shift from building single binary for all
platforms to independent binary for each platform.
As a first step towards this, create .dsc file for each supported
platform. The exiting .dsc file is converted to be a include file
that the platform specific .dsc files can include.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 25 ++++++++++++++++++++
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 25 ++++++++++++++++++++
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 25 ++++++++++++++++++++
Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 25 ++++++++++++++++++++
Platform/ARM/SgiPkg/{SgiPlatform.dsc => SgiPlatform.dsc.inc} | 19 +--------------
5 files changed, 101 insertions(+), 18 deletions(-)
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
new file mode 100644
index 000000000000..2d292a8876cf
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = RdE1Edge
+ PLATFORM_GUID = 487a22e5-897a-40fe-8e1f-d472f7ebe94b
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
new file mode 100644
index 000000000000..98cf811420ae
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = RdN1Edge
+ PLATFORM_GUID = 1e5f616f-4462-4281-bf74-60c82492c6e1
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
new file mode 100644
index 000000000000..deb65c306f1d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = RdN1EdgeX2
+ PLATFORM_GUID = a8ec2997-83ff-4347-8a9d-796d8c0c8b4d
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
new file mode 100644
index 000000000000..914432609dc5
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = Sgi575
+ PLATFORM_GUID = 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
similarity index 91%
rename from Platform/ARM/SgiPkg/SgiPlatform.dsc
rename to Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 5226c5751e98..4901363ac154 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -1,26 +1,9 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- PLATFORM_NAME = ArmSgi
- PLATFORM_GUID = 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae
- PLATFORM_VERSION = 0.1
- DSC_SPECIFICATION = 0x0001001B
- OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
- SUPPORTED_ARCHITECTURES = AARCH64|ARM
- BUILD_TARGETS = NOOPT|DEBUG|RELEASE
- SKUID_IDENTIFIER = DEFAULT
- FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
- BUILD_NUMBER = 1
-
!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
[BuildOptions]
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 02/17] Platform/ARM/SgiPkg: Let platforms define core and cluster count
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
2020-05-05 13:01 ` [PATCH v5][edk2-platforms 01/17] Platform/ARM/SgiPkg: Create platform specific dsc files Aditya Angadi
@ 2020-05-05 13:01 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 03/17] Platform/ARM/SgiPkg: Let platforms define GIC related PCD values Aditya Angadi
` (15 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:01 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
The value of PcdCoreCount and PcdClusterCount are not same across all
ARM SGI/RD platforms. So move it form .dsc.inc file to platform specific
.dsc file and let platform define the value of these two PCDs.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 12 ++++++++++++
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 12 ++++++++++++
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 12 ++++++++++++
Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 11 +++++++++++
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 4 ----
5 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
index 2d292a8876cf..e2677ba784ed 100644
--- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
@@ -23,3 +23,15 @@ [Defines]
# include common definitions from SgiPlatform.dsc
!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # ARM Cores and Clusters
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|16
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
index 98cf811420ae..5af7a2225c05 100644
--- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
@@ -23,3 +23,15 @@ [Defines]
# include common definitions from SgiPlatform.dsc
!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # ARM Cores and Clusters
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|4
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index deb65c306f1d..33dd4001ad0b 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -23,3 +23,15 @@ [Defines]
# include common definitions from SgiPlatform.dsc
!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # ARM Cores and Clusters
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|4
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+
diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
index 914432609dc5..04c2d5172bc8 100644
--- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
+++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
@@ -23,3 +23,14 @@ [Defines]
# include common definitions from SgiPlatform.dsc
!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # ARM Cores and Clusters
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|4
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|2
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 4901363ac154..0418d6b6d50f 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -160,10 +160,6 @@ [PcdsFixedAtBuild.common]
gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
gEmbeddedTokenSpaceGuid.PcdTimerPeriod|1000
- # ARM Cores and Clusters
- gArmPlatformTokenSpaceGuid.PcdCoreCount|4
- gArmPlatformTokenSpaceGuid.PcdClusterCount|2
-
# Virtio Disk
gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress|0x1c130000
gArmSgiTokenSpaceGuid.PcdVirtioBlkSize|0x10000
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 03/17] Platform/ARM/SgiPkg: Let platforms define GIC related PCD values
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
2020-05-05 13:01 ` [PATCH v5][edk2-platforms 01/17] Platform/ARM/SgiPkg: Create platform specific dsc files Aditya Angadi
2020-05-05 13:01 ` [PATCH v5][edk2-platforms 02/17] Platform/ARM/SgiPkg: Let platforms define core and cluster count Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 04/17] Platform/ARM/SgiPkg: Create platform specific fd include file Aditya Angadi
` (14 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Newer RD platforms have different base address for GIC redistributors.
The size of the address space that GIC occupies is also different. So
let each platform define the values of GIC related PCDs by moving the
existing PCDs related to GIC distributor and redistributor addresses
from the .dsc.inc include file to platform specific .dsc file.
In addition to this, add a new PCD "PcdGicSize" in ArmSgiTokenSpace to
let each platform define the size of the address space that the GIC
controller occupies.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 +------
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 ++-
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 8 ++++----
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 5 +++++
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 5 +++++
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 5 +++++
Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 6 ++++++
Platform/ARM/SgiPkg/SgiPlatform.dec | 5 ++++-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 4 ----
9 files changed, 32 insertions(+), 16 deletions(-)
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index e36a412155ff..d87fb2b5409f 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -45,11 +45,6 @@
#define SGI_SUBSYS_GENERIC_WDOG_BASE 0x2A440000
#define SGI_SUBSYS_GENERIC_WDOG_SZ SIZE_128KB
-// Sub System Peripherals - GIC
-#define SGI_SUBSYS_GENERIC_GIC_BASE 0x30000000
-#define SGI_SUBSYS_GENERIC_GICR_BASE 0x300C0000
-#define SGI_SUBSYS_GENERIC_GIC_SZ SIZE_1MB
-
// Expansion AXI - Platform Peripherals - HDLCD1
#define SGI_EXP_PLAT_PERIPH_HDLCD1_BASE 0x7FF60000
#define SGI_EXP_PLAT_PERIPH_HDLCD1_SZ SIZE_64KB
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index 3db70e900d61..a918afef5fba 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,6 +42,7 @@ [FixedPcd]
gArmSgiTokenSpaceGuid.PcdDramBlock2Base
gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+ gArmSgiTokenSpaceGuid.PcdGicSize
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 845aeaf4dd49..8d0ad4ec9c84 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -93,9 +93,9 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Sub System Peripherals - GIC-600
- VirtualMemoryTable[++Index].PhysicalBase = SGI_SUBSYS_GENERIC_GIC_BASE;
- VirtualMemoryTable[Index].VirtualBase = SGI_SUBSYS_GENERIC_GIC_BASE;
- VirtualMemoryTable[Index].Length = SGI_SUBSYS_GENERIC_GIC_SZ;
+ VirtualMemoryTable[++Index].PhysicalBase = FixedPcdGet64(PcdGicDistributorBase);
+ VirtualMemoryTable[Index].VirtualBase = FixedPcdGet64(PcdGicDistributorBase);
+ VirtualMemoryTable[Index].Length = FixedPcdGet64(PcdGicSize);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Expansion AXI - Platform Peripherals - HDLCD1
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
index e2677ba784ed..acb6b98837e2 100644
--- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
@@ -35,3 +35,8 @@ [PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|16
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
index 5af7a2225c05..0737d910f666 100644
--- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
@@ -35,3 +35,8 @@ [PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|4
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index 33dd4001ad0b..27a7b3a231ba 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -35,3 +35,8 @@ [PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|4
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+
diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
index 04c2d5172bc8..90b3fe29b75f 100644
--- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
+++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
@@ -34,3 +34,9 @@ [PcdsFixedAtBuild.common]
# ARM Cores and Clusters
gArmPlatformTokenSpaceGuid.PcdCoreCount|4
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 9d70ec677776..4ac3dec91e3d 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2018, ARM Limited. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -49,5 +49,8 @@ [PcdsFixedAtBuild]
gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008
gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009
+ # GIC
+ gArmSgiTokenSpaceGuid.PcdGicSize|0|UINT64|0x0000000A
+
[Ppis]
gNtFwConfigDtInfoPpiGuid = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 0418d6b6d50f..ae5ef5a8d2ef 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -109,10 +109,6 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
- # GIC Base Addresses
- gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
- gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
-
#
# PCIe
#
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 04/17] Platform/ARM/SgiPkg: Create platform specific fd include file
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (2 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 03/17] Platform/ARM/SgiPkg: Let platforms define GIC related PCD values Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 05/17] Platform/ARM/SgiPkg: Let platform specify the ACPI tables to include Aditya Angadi
` (13 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Add a fdf include file for each supported platform. This include file
can be used to choose the ACPI table module to be included in the
flash image for the platform.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 1 +
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc | 10 ++++++++++
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 1 +
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc | 10 ++++++++++
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 1 +
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.fdf.inc | 10 ++++++++++
Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 1 +
Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf.inc | 10 ++++++++++
8 files changed, 44 insertions(+)
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
index acb6b98837e2..fefd0e35125f 100644
--- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
@@ -19,6 +19,7 @@ [Defines]
BUILD_TARGETS = NOOPT|DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BOARD_DXE_FV_COMPONENTS = Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc
BUILD_NUMBER = 1
# include common definitions from SgiPlatform.dsc
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc
new file mode 100644
index 000000000000..056fc55c098a
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+# Per-platform additional content of the DXE phase firmware volume
+
+ # ACPI support
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
index 0737d910f666..71407f701af8 100644
--- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
@@ -19,6 +19,7 @@ [Defines]
BUILD_TARGETS = NOOPT|DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BOARD_DXE_FV_COMPONENTS = Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc
BUILD_NUMBER = 1
# include common definitions from SgiPlatform.dsc
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc
new file mode 100644
index 000000000000..4b191ca55cb9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+# Per-platform additional content of the DXE phase firmware volume
+
+ # ACPI support
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index 27a7b3a231ba..5bc286626bb1 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -19,6 +19,7 @@ [Defines]
BUILD_TARGETS = NOOPT|DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BOARD_DXE_FV_COMPONENTS = Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.fdf.inc
BUILD_NUMBER = 1
# include common definitions from SgiPlatform.dsc
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.fdf.inc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.fdf.inc
new file mode 100644
index 000000000000..369264a916b4
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.fdf.inc
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+# Per-platform additional content of the DXE phase firmware volume
+
+ # ACPI support
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
index 90b3fe29b75f..b5f39c4db3bc 100644
--- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
+++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
@@ -19,6 +19,7 @@ [Defines]
BUILD_TARGETS = NOOPT|DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BOARD_DXE_FV_COMPONENTS = Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf.inc
BUILD_NUMBER = 1
# include common definitions from SgiPlatform.dsc
diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf.inc b/Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf.inc
new file mode 100644
index 000000000000..3748d86efdf4
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf.inc
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+# Per-platform additional content of the DXE phase firmware volume
+
+ # ACPI support
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 05/17] Platform/ARM/SgiPkg: Let platform specify the ACPI tables to include
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (3 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 04/17] Platform/ARM/SgiPkg: Create platform specific fd include file Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 06/17] Platform/ARM/SgiPkg: Obtain rd-e1-edge platform core count from PCD Aditya Angadi
` (12 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
The last change in moving away from single binary for all SGI/RD
platforms to independent binary for each platform is to let the platform
select only the ACPI table module that is required for the platform.
Each platform dsc file specifies the ACPI table module to use. All the
platform specific ACPI table modules are assigned a common file guid
which is looked up by the platform dxe driver, thereby, removing the
need to lookup for a ACPI table module file guid using the platform
id hob.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf | 2 +-
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 2 +-
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 2 +-
Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf | 2 +-
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 69 +-------------------
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 5 +-
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 8 +++
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 8 +++
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 8 +++
Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 10 +++
Platform/ARM/SgiPkg/SgiPlatform.dec | 5 +-
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 4 --
Platform/ARM/SgiPkg/SgiPlatform.fdf | 5 +-
13 files changed, 42 insertions(+), 88 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
index 3a4d4e7b9502..e780698cdf57 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
@@ -10,7 +10,7 @@
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = RdE1EdgeAcpiTables
- FILE_GUID = 2af40815-a84e-4de9-8c38-9140b3544073
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gArmSgiAcpiTablesGuid
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 58c33ecb8ec2..871697eab19e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -10,7 +10,7 @@
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = RdN1EdgeAcpiTables
- FILE_GUID = 4b0b91d0-4a05-45c4-88a7-88e170e76694
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gArmSgiAcpiTablesGuid
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 1b584b152455..61f17b3ee8ac 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -10,7 +10,7 @@
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = RdN1EdgeX2AcpiTables
- FILE_GUID = 82a34150-0fc6-45f4-8ea0-f0a4660cf35d
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gArmSgiAcpiTablesGuid
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
index 097ef854df42..466e0fb658eb 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
@@ -10,7 +10,7 @@
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = Sgi575AcpiTables
- FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gSgi575AcpiTablesFileGuid
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gArmSgiAcpiTablesGuid
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index 387397d74598..2f72e7152ff3 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -11,43 +11,6 @@
#include <Library/HobLib.h>
#include <SgiPlatform.h>
-typedef struct {
- SGI_PLATFORM_DESCRIPTOR SgiPlafromDescriptor;
- CONST EFI_GUID* AcpiTableGuid;
-} SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP;
-
-// Macro to construct the SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP structure
-#define ACPI_GUID_LOOKUP(PART_NUM, CONFIG_NUM, MULTI_CHIP_MODE, GUID) \
-{ \
- { \
- PART_NUM, CONFIG_NUM, MULTI_CHIP_MODE \
- }, \
- GUID \
-} \
-
-STATIC SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP AcpiTableGuidLookup[] = {
- ACPI_GUID_LOOKUP (
- SGI575_PART_NUM,
- SGI575_CONF_NUM,
- MULTI_CHIP_MODE_DISABLED,
- &gSgi575AcpiTablesFileGuid),
- ACPI_GUID_LOOKUP (
- RD_N1E1_EDGE_PART_NUM,
- RD_N1_EDGE_CONF_ID,
- MULTI_CHIP_MODE_DISABLED,
- &gRdN1EdgeAcpiTablesFileGuid),
- ACPI_GUID_LOOKUP (
- RD_N1E1_EDGE_PART_NUM,
- RD_N1_EDGE_CONF_ID,
- MULTI_CHIP_MODE_ENABLED,
- &gRdN1EdgeX2AcpiTablesFileGuid),
- ACPI_GUID_LOOKUP (
- RD_N1E1_EDGE_PART_NUM,
- RD_E1_EDGE_CONF_ID,
- MULTI_CHIP_MODE_DISABLED,
- &gRdE1EdgeAcpiTablesFileGuid),
-};
-
VOID
InitVirtioDevices (
VOID
@@ -61,38 +24,8 @@ ArmSgiPkgEntryPoint (
)
{
EFI_STATUS Status;
- VOID *SystemIdHob;
- SGI_PLATFORM_DESCRIPTOR *HobData;
- UINTN Idx;
- UINT32 ConfigId;
- UINT32 PartNum;
- UINT32 MultiChipMode;
-
- SystemIdHob = GetFirstGuidHob (&gArmSgiPlatformIdDescriptorGuid);
- if (SystemIdHob == NULL) {
- DEBUG ((DEBUG_ERROR, "System ID HOB is NULL\n"));
- return EFI_INVALID_PARAMETER;
- }
-
- HobData = (SGI_PLATFORM_DESCRIPTOR *)GET_GUID_HOB_DATA (SystemIdHob);
-
- PartNum = HobData->PlatformId;
- ConfigId = HobData->ConfigId;
- MultiChipMode = HobData->MultiChipMode;
-
- Status = EFI_UNSUPPORTED;
-
- // Walk through the AcpiTableGuidLookup lookup array
- for (Idx = 0; Idx < ARRAY_SIZE (AcpiTableGuidLookup); Idx++) {
- if ((PartNum == AcpiTableGuidLookup[Idx].SgiPlafromDescriptor.PlatformId) &&
- (ConfigId == AcpiTableGuidLookup[Idx].SgiPlafromDescriptor.ConfigId) &&
- (MultiChipMode ==
- AcpiTableGuidLookup[Idx].SgiPlafromDescriptor.MultiChipMode)) {
- Status = LocateAndInstallAcpiFromFv (AcpiTableGuidLookup[Idx].AcpiTableGuid);
- break;
- }
- }
+ Status = LocateAndInstallAcpiFromFv (&gArmSgiAcpiTablesGuid);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n", __FUNCTION__));
return Status;
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
index 741dcc75ed6a..9d89314a594e 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -30,10 +30,7 @@ [LibraryClasses]
[Guids]
gArmSgiPlatformIdDescriptorGuid
- gSgi575AcpiTablesFileGuid
- gRdN1EdgeAcpiTablesFileGuid
- gRdN1EdgeX2AcpiTablesFileGuid
- gRdE1EdgeAcpiTablesFileGuid
+ gArmSgiAcpiTablesGuid
[FeaturePcd]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
index fefd0e35125f..a108b4eab0d8 100644
--- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
@@ -41,3 +41,11 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+
+[Components.common]
+ Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
index 71407f701af8..a59a6c5b8f3a 100644
--- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
@@ -41,3 +41,11 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+
+[Components.common]
+ Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index 5bc286626bb1..6c9e30eadb95 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -41,3 +41,11 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+
+[Components.common]
+ Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
index b5f39c4db3bc..bdfd69d0477c 100644
--- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
+++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc
@@ -41,3 +41,13 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+
+[Components.common]
+ Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
+
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 4ac3dec91e3d..97c1e40349ea 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -26,10 +26,7 @@ [Guids.common]
# ARM Sgi Platform ID descriptor
gArmSgiPlatformIdDescriptorGuid = { 0xf56f152a, 0xad2a, 0x11e6, { 0xb1, 0xa7, 0x00, 0x50, 0x56, 0x3c, 0x44, 0xcc } }
gArmSgiTokenSpaceGuid = { 0x577d6941, 0xaea1, 0x40b4, { 0x90, 0x93, 0x2a, 0x86, 0x61, 0x72, 0x5a, 0x57 } }
- gSgi575AcpiTablesFileGuid = { 0xc712719a, 0x0aaf, 0x438c, { 0x9c, 0xdd, 0x35, 0xab, 0x4d, 0x60, 0x20, 0x7d } }
- gRdN1EdgeAcpiTablesFileGuid = { 0x4b0b91d0, 0x4a05, 0x45c4, { 0x88, 0xa7, 0x88, 0xe1, 0x70, 0xe7, 0x66, 0x94 } }
- gRdN1EdgeX2AcpiTablesFileGuid = { 0x82a34150, 0x0fc6, 0x45f4, { 0x8e, 0xa0, 0xf0, 0xa4, 0x66, 0x0c, 0xf3, 0x5d } }
- gRdE1EdgeAcpiTablesFileGuid = { 0x2af40815, 0xa84e, 0x4de9, { 0x8c, 0x38, 0x91, 0x40, 0xb3, 0x54, 0x40, 0x73 } }
+ gArmSgiAcpiTablesGuid = { 0xc712719a, 0x0aaf, 0x438c, { 0x9c, 0xdd, 0x35, 0xab, 0x4d, 0x60, 0x20, 0x7d } }
[PcdsFeatureFlag.common]
gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index ae5ef5a8d2ef..1f33557edf18 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -252,10 +252,6 @@ [Components.common]
# ACPI Support
#
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
- Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
#
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 3d13998015b9..9fc011a6d630 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -99,11 +99,8 @@ [FV.FvMain]
# ACPI Support
#
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
- INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
- INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
- INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+!include $(BOARD_DXE_FV_COMPONENTS)
# Required by PCI
INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 06/17] Platform/ARM/SgiPkg: Obtain rd-e1-edge platform core count from PCD
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (4 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 05/17] Platform/ARM/SgiPkg: Let platform specify the ACPI tables to include Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 07/17] Platform/ARM/SgiPkg: Refactor GIC related ACPI helper macros Aditya Angadi
` (11 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
The number of processing elements is hardcoded in the MADT ACPI table
of the RD-E1-Edge platform. Remove the hardcoded value and obtain the
core count on platform from PCDs instead.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
index 48e7a61478e8..58378b570b12 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
@@ -14,6 +14,9 @@
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
+#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
+ FixedPcdGet32 (PcdCoreCount))
+
// EFI_ACPI_6_2_GIC_STRUCTURE
#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
@@ -85,7 +88,7 @@
typedef struct {
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[32];
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT];
EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor;
EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts;
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 07/17] Platform/ARM/SgiPkg: Refactor GIC related ACPI helper macros
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (5 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 06/17] Platform/ARM/SgiPkg: Obtain rd-e1-edge platform core count from PCD Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 08/17] Platform/ARM/SgiPkg: Update SGI-575 MADT table to ACPI 6.2 Aditya Angadi
` (10 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Remove the duplication of the ACPI helper macros related to GIC
distributor, redistributor and ITS from each platform's MADT ACPI
table. Let these macros be defined in the common SgiAcpiHeader.h
file.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc | 68 +------------------
Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc | 68 +------------------
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc | 57 +---------------
| 70 +++++++++++++++++++-
4 files changed, 72 insertions(+), 191 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
index 58378b570b12..cb70394bfe91 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -17,72 +17,6 @@
#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
FixedPcdGet32 (PcdCoreCount))
-// EFI_ACPI_6_2_GIC_STRUCTURE
-#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_2_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_2_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GICR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_2_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
-// EFI_ACPI_6_2_GIC_ITS_STRUCTURE
-#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \
- { \
- EFI_ACPI_6_2_GIC_ITS, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicItsId, /* GicItsId */ \
- GicItsBase, /* PhysicalBaseAddress */ \
- EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
- }
-
// Multiple APIC Description Table
#pragma pack (1)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
index 6312743a479c..05eb78c5616a 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -17,72 +17,6 @@
#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
FixedPcdGet32 (PcdCoreCount))
-// EFI_ACPI_6_2_GIC_STRUCTURE
-#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_2_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_2_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GICR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_2_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
-// EFI_ACPI_6_2_GIC_ITS_STRUCTURE
-#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \
- { \
- EFI_ACPI_6_2_GIC_ITS, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicItsId, /* GicItsId */ \
- GicItsBase, /* PhysicalBaseAddress */ \
- EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
- }
-
// Multiple APIC Description Table
#pragma pack (1)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
index d4538233d760..47368931e367 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
@@ -1,7 +1,7 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2019, ARM Limited. All rights reserved.
+* Copyright (c) 2019-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -19,61 +19,6 @@
#define CHIP_CNT 2
-// EFI_ACPI_6_2_GIC_STRUCTURE
-#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_2_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_2_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_2_GICR_STRUCTURE
-#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_2_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
// Multiple APIC Description Table
#pragma pack (1)
--git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index 5083dde15dd5..ecb0d4eccf24 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -9,6 +9,8 @@
#ifndef __SGI_ACPI_HEADER__
#define __SGI_ACPI_HEADER__
+#include <IndustryStandard/Acpi.h>
+
//
// ACPI table information used to initialize tables.
//
@@ -32,4 +34,70 @@
EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \
}
+// EFI_ACPI_6_2_GIC_STRUCTURE
+#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
+ PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
+ { \
+ EFI_ACPI_6_2_GIC, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GIC_STRUCTURE), /* Length */ \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ GicId, /* CPUInterfaceNumber */ \
+ AcpiCpuUid, /* AcpiProcessorUid */ \
+ Flags, /* Flags */ \
+ 0, /* ParkingProtocolVersion */ \
+ PmuIrq, /* PerformanceInterruptGsiv */ \
+ 0, /* ParkedAddress */ \
+ GicBase, /* PhysicalBaseAddress */ \
+ GicVBase, /* GICV */ \
+ GicHBase, /* GICH */ \
+ GsivId, /* VGICMaintenanceInterrupt */ \
+ GicRBase, /* GICRBaseAddress */ \
+ Mpidr, /* MPIDR */ \
+ Efficiency, /* ProcessorPowerEfficiencyClass */ \
+ { \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
+ EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
+ } \
+ }
+
+// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
+#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
+ GicDistVector, GicVersion) \
+ { \
+ EFI_ACPI_6_2_GICD, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
+ GicDistHwId, /* GicId */ \
+ GicDistBase, /* PhysicalBaseAddress */ \
+ GicDistVector, /* SystemVectorBase */ \
+ GicVersion, /* GicVersion */ \
+ { \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
+ EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
+ } \
+ }
+
+// EFI_ACPI_6_2_GICR_STRUCTURE
+#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
+ { \
+ EFI_ACPI_6_2_GICR, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GICR_STRUCTURE), /* Length */ \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
+ RedisDiscLength /* DiscoveryRangeLength */ \
+ }
+
+// EFI_ACPI_6_2_GIC_ITS_STRUCTURE
+#define EFI_ACPI_6_2_GIC_ITS_INIT(GicItsId, GicItsBase) \
+ { \
+ EFI_ACPI_6_2_GIC_ITS, /* Type */ \
+ sizeof (EFI_ACPI_6_2_GIC_ITS_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ GicItsId, /* GicItsId */ \
+ GicItsBase, /* PhysicalBaseAddress */ \
+ EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
+ }
+
#endif /* __SGI_ACPI_HEADER__ */
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 08/17] Platform/ARM/SgiPkg: Update SGI-575 MADT table to ACPI 6.2
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (6 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 07/17] Platform/ARM/SgiPkg: Refactor GIC related ACPI helper macros Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 09/17] Platform/ARM/SgiPkg: Move common platform description to SSDT Aditya Angadi
` (9 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Let the SGI-575 platform's MADT table be aligned with the MADT
table of the other RD platforms supported in the SgiPkg.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc | 130 +++++---------------
1 file changed, 31 insertions(+), 99 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
index dedabaaecdf4..f04b77929d71 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
@@ -17,147 +17,79 @@
#define CORES (FixedPcdGet32 (PcdClusterCount) * \
FixedPcdGet32 (PcdCoreCount))
-// EFI_ACPI_6_1_GIC_STRUCTURE
-#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
- PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
- { \
- EFI_ACPI_6_1_GIC, /* Type */ \
- sizeof (EFI_ACPI_6_1_GIC_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicId, /* CPUInterfaceNumber */ \
- AcpiCpuUid, /* AcpiProcessorUid */ \
- Flags, /* Flags */ \
- 0, /* ParkingProtocolVersion */ \
- PmuIrq, /* PerformanceInterruptGsiv */ \
- 0, /* ParkedAddress */ \
- GicBase, /* PhysicalBaseAddress */ \
- GicVBase, /* GICV */ \
- GicHBase, /* GICH */ \
- GsivId, /* VGICMaintenanceInterrupt */ \
- GicRBase, /* GICRBaseAddress */ \
- Mpidr, /* MPIDR */ \
- Efficiency, /* ProcessorPowerEfficiencyClass */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
-#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
- GicDistVector, GicVersion) \
- { \
- EFI_ACPI_6_1_GICD, /* Type */ \
- sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
- GicDistHwId, /* GicId */ \
- GicDistBase, /* PhysicalBaseAddress */ \
- GicDistVector, /* SystemVectorBase */ \
- GicVersion, /* GicVersion */ \
- { \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
- EFI_ACPI_RESERVED_BYTE, /* Reserved2[2] */ \
- } \
- }
-
-// EFI_ACPI_6_1_GICR_STRUCTURE
-#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
- { \
- EFI_ACPI_6_1_GICR, /* Type */ \
- sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */ \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
- RedisDiscLength /* DiscoveryRangeLength */ \
- }
-
-// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
-#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase) \
- { \
- EFI_ACPI_6_1_GIC_ITS, /* Type */ \
- sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), \
- EFI_ACPI_RESERVED_WORD, /* Reserved */ \
- GicItsId, /* GicItsId */ \
- GicItsBase, /* PhysicalBaseAddress */ \
- EFI_ACPI_RESERVED_DWORD, /* DiscoveryRangeLength */ \
- }
-
-//
// Multiple APIC Description Table
-//
#pragma pack (1)
typedef struct {
- EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[CORES];
- EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- EFI_ACPI_6_1_GICR_STRUCTURE GicRedistributor;
- EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicIts;
-} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORES];
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor;
+ EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts;
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
#pragma pack ()
-STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
{
ARM_ACPI_HEADER (
- EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
- EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
),
// MADT specific fields
0, // LocalApicAddress
0, // Flags
},
{
- // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
// PmuIrq, GicBase, GicVBase,
// GicHBase, GsivId, GicRBase,
// Efficiency)
// Note: The GIC Structure of the primary CPU must be the first entry
- // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
- 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
- 0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-1
+ 0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
- 0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-2
+ 0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
- 0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-3
+ 0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
- 0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-4
+ 0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
- 0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-5
+ 0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
- 0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-6
+ 0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
- EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
- 0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // A75-7
+ 0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
},
// GIC Distributor Entry
- EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
0, 3),
// GIC Redistributor
- EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
SIZE_1MB),
// GIC ITS
- EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000),
};
//
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 09/17] Platform/ARM/SgiPkg: Move common platform description to SSDT
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (7 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 08/17] Platform/ARM/SgiPkg: Update SGI-575 MADT table to ACPI 6.2 Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 10/17] Platform/ARM/SgiPkg: Add helper macros for SRAT table Aditya Angadi
` (8 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Move common platform description entries in platform specific DSDT to
a SSDT that can be reused on all SGI/RD platforms.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl | 70 +-------------------
Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf | 3 +-
Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl | 69 +------------------
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 3 +-
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/{RdN1Edge/Dsdt.asl => SsdtRos.asl} | 63 +++---------------
6 files changed, 17 insertions(+), 192 deletions(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
index 5583e610973b..d66c7cbf4183 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
@@ -1,7 +1,7 @@
/** @file
* Differentiated System Description Table Fields (DSDT)
*
-* Copyright (c) 2018, ARM Ltd. All rights reserved.
+* Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -208,73 +208,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
Name (_STA, 0xF)
}
- // UART PL011
- Device (COM0) {
- Name (_HID, "ARMH0011")
- Name (_CID, "ARMH0011")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet64 (PcdSerialDbgRegisterBase),
- 0x1000
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
- })
- }
-
- // SMSC 91C111
- Device (ETH0) {
- Name (_HID, "LNRO0003")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (ReadWrite, 0x18000000, 0x1000)
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
- })
- Name (_DSD, Package() {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package () {
- Package (2) {"reg-io-width", 4 },
- }
- })
- }
-
- // VIRTIO DISK
- Device (VR00) {
- Name (_HID, "LNRO0005")
- Name (_UID, 0)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet32 (PcdVirtioBlkBaseAddress),
- FixedPcdGet32 (PcdVirtioBlkSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioBlkInterrupt)
- }
- })
- }
-
- // VIRTIO NET
- Device (VR01) {
- Name (_HID, "LNRO0005")
- Name (_UID, 1)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet32 (PcdVirtioNetBaseAddress),
- FixedPcdGet32 (PcdVirtioNetSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioNetInterrupt)
- }
- })
- }
} // Scope(_SB)
}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
index e780698cdf57..7ebd70b197a6 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
@@ -1,7 +1,7 @@
## @file
# ACPI table data and ASL sources required to boot the platform.
#
-# Copyright (c) 2018, ARM Ltd. All rights reserved.
+# Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -16,6 +16,7 @@ [Defines]
[Sources]
Dbg2.aslc
+ SsdtRos.asl
Fadt.aslc
Gtdt.aslc
Iort.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
index 45316d5005f4..cb05eed35878 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
@@ -1,7 +1,7 @@
/** @file
* Differentiated System Description Table Fields (DSDT)
*
-* Copyright (c) 2018, ARM Ltd. All rights reserved.
+* Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -62,72 +62,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
Name (_STA, 0xF)
}
- // UART PL011
- Device (COM0) {
- Name (_HID, "ARMH0011")
- Name (_CID, "ARMH0011")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate () {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet64 (PcdSerialDbgRegisterBase),
- 0x1000
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
- })
- }
-
- // SMSC 91C111
- Device (ETH0) {
- Name (_HID, "LNRO0003")
- Name (_UID, Zero)
- Name (_STA, 0xF)
- Name (_CRS, ResourceTemplate () {
- Memory32Fixed (ReadWrite, 0x18000000, 0x1000)
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
- })
- Name (_DSD, Package() {
- ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package() {
- Package(2) {"reg-io-width", 4 },
- }
- })
- }
-
- // VIRTIO DISK
- Device (VR00) {
- Name (_HID, "LNRO0005")
- Name (_UID, 0)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (
- ReadWrite,
- FixedPcdGet32 (PcdVirtioBlkBaseAddress),
- FixedPcdGet32 (PcdVirtioBlkSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioBlkInterrupt)
- }
- })
- }
-
- // VIRTIO NET
- Device (VR01) {
- Name (_HID, "LNRO0005")
- Name (_UID, 1)
- Name (_CCA, 1) // mark the device coherent
-
- Name (_CRS, ResourceTemplate() {
- Memory32Fixed (ReadWrite,
- FixedPcdGet32 (PcdVirtioNetBaseAddress),
- FixedPcdGet32 (PcdVirtioNetSize)
- )
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
- FixedPcdGet32 (PcdVirtioNetInterrupt)
- }
- })
- }
} // Scope(_SB)
}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 871697eab19e..2d4354f33018 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -1,7 +1,7 @@
## @file
# ACPI table data and ASL sources required to boot the platform.
#
-# Copyright (c) 2018, ARM Ltd. All rights reserved.
+# Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -16,6 +16,7 @@ [Defines]
[Sources]
Dbg2.aslc
+ SsdtRos.asl
Fadt.aslc
Gtdt.aslc
Iort.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 61f17b3ee8ac..75f8e6dd6685 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -16,6 +16,7 @@ [Defines]
[Sources]
Dbg2.aslc
+ SsdtRos.asl
Fadt.aslc
Gtdt.aslc
Iort.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
similarity index 58%
copy from Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
copy to Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
index 45316d5005f4..5b348da90b73 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
@@ -1,67 +1,24 @@
/** @file
-* Differentiated System Description Table Fields (DSDT)
+* Secondary System Description Table Fields (SSDT)
*
-* Copyright (c) 2018, ARM Ltd. All rights reserved.
+* Copyright (c) 2020, ARM Ltd. All rights reserved.
*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include "SgiPlatform.h"
#include "SgiAcpiHeader.h"
-DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+DefinitionBlock ("SsdtRosTable.aml", "SSDT", 1, "ARMLTD", "ARMSGI",
EFI_ACPI_ARM_OEM_REVISION) {
Scope (_SB) {
-
- Device (CP00) { // Neoverse-N1: Cluster 0, Cpu 0
- Name (_HID, "ACPI0007")
- Name (_UID, 0)
- Name (_STA, 0xF)
- }
-
- Device (CP01) { // Neoverse-N1: Cluster 0, Cpu 1
- Name (_HID, "ACPI0007")
- Name (_UID, 1)
- Name (_STA, 0xF)
- }
-
- Device (CP02) { // Neoverse-N1: Cluster 0, Cpu 2
- Name (_HID, "ACPI0007")
- Name (_UID, 2)
- Name (_STA, 0xF)
- }
-
- Device (CP03) { // Neoverse-N1: Cluster 0, Cpu 3
- Name (_HID, "ACPI0007")
- Name (_UID, 3)
- Name (_STA, 0xF)
- }
-
- Device (CP04) { // Neoverse-N1: Cluster 1, Cpu 0
- Name (_HID, "ACPI0007")
- Name (_UID, 4)
- Name (_STA, 0xF)
- }
-
- Device (CP05) { // Neoverse-N1: Cluster 1, Cpu 1
- Name (_HID, "ACPI0007")
- Name (_UID, 5)
- Name (_STA, 0xF)
- }
-
- Device (CP06) { // Neoverse-N1: Cluster 1, Cpu 2
- Name (_HID, "ACPI0007")
- Name (_UID, 6)
- Name (_STA, 0xF)
- }
-
- Device (CP07) { // Neoverse-N1: Cluster 1, Cpu 3
- Name (_HID, "ACPI0007")
- Name (_UID, 7)
- Name (_STA, 0xF)
- }
-
// UART PL011
Device (COM0) {
Name (_HID, "ARMH0011")
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 10/17] Platform/ARM/SgiPkg: Add helper macros for SRAT table
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (8 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 09/17] Platform/ARM/SgiPkg: Move common platform description to SSDT Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 11/17] Platform/ARM/SgiPkg: Add support for remote numa memory nodes Aditya Angadi
` (7 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Add helper macros to create the memory affinity and gicc affinity
structures in the SRAT table.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
| 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index ecb0d4eccf24..8d715de173c9 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -100,4 +100,23 @@
EFI_ACPI_RESERVED_DWORD /* DiscoveryRangeLength */ \
}
+// EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE
+#define EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT( \
+ ProximityDomain, Base, Length, Flags) \
+ { \
+ 1, sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE), ProximityDomain, \
+ EFI_ACPI_RESERVED_WORD, (Base) & 0xffffffff, \
+ (Base) >> 32, (Length) & 0xffffffff, \
+ (Length) >> 32, EFI_ACPI_RESERVED_DWORD, Flags, \
+ EFI_ACPI_RESERVED_QWORD \
+ }
+
+// EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE
+#define EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT( \
+ ProximityDomain, ACPIProcessorUID, Flags, ClockDomain) \
+ { \
+ 3, sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE), ProximityDomain, \
+ ACPIProcessorUID, Flags, ClockDomain \
+ }
+
#endif /* __SGI_ACPI_HEADER__ */
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 11/17] Platform/ARM/SgiPkg: Add support for remote numa memory nodes
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (9 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 10/17] Platform/ARM/SgiPkg: Add helper macros for SRAT table Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 12/17] Platform/ARM/SgiPkg: Add SRAT table for RdN1Edge dual-chip platform Aditya Angadi
` (6 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
On a multi-chip platform, there are memory nodes connected to the
remote chips that are usable. Setup memory descriptor HOBs for all
the remote memory nodes. Use the remote chip memory offset value to
determine the base address for these remote memory nodes.
A new PCD 'PcdChipCount' is added in the ArmSgiTokenSpace that a
platform can use to define the number of coherently connected chips
in a multi-chip package.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 8 ++
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 +
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 87 +++++++++++++++++++-
Platform/ARM/SgiPkg/SgiPlatform.dec | 3 +
4 files changed, 100 insertions(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index d87fb2b5409f..728abbea97e8 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -80,6 +80,14 @@
// Remote chip address offset (4TB per chip)
#define SGI_REMOTE_CHIP_MEM_OFFSET(n) ((1ULL << 42) * (n))
+// Base address of the DRAM1 block in a remote chip
+#define SYSTEM_MEMORY_BASE_REMOTE(ChipId) \
+ (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64 (PcdSystemMemoryBase))
+
+// Base address of the DRAM2 block in a remote chip
+#define DRAM_BLOCK2_BASE_REMOTE(ChipId) \
+ (SGI_REMOTE_CHIP_MEM_OFFSET (ChipId) + FixedPcdGet64 (PcdDramBlock2Base))
+
// ARM platform description data.
typedef struct {
UINTN PlatformId;
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index a918afef5fba..464a7cde4513 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -46,6 +46,9 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
+
+ gArmSgiTokenSpaceGuid.PcdChipCount
+
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 8d0ad4ec9c84..e30819c5cd55 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -16,7 +16,8 @@
#include <SgiPlatform.h>
// Total number of descriptors, including the final "end-of-table" descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 13
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \
+ (11 + (FixedPcdGet32 (PcdChipCount) * 2))
/**
Returns the Virtual Memory Map of the platform.
@@ -52,6 +53,48 @@ ArmPlatformGetVirtualMemoryMap (
FixedPcdGet64 (PcdDramBlock2Base),
FixedPcdGet64 (PcdDramBlock2Size));
+#if (FixedPcdGet32 (PcdChipCount) > 1)
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ SYSTEM_MEMORY_BASE_REMOTE (1),
+ PcdGet64 (PcdSystemMemorySize));
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ DRAM_BLOCK2_BASE_REMOTE (1),
+ FixedPcdGet64 (PcdDramBlock2Size));
+
+#if (FixedPcdGet32 (PcdChipCount) > 2)
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ SYSTEM_MEMORY_BASE_REMOTE (2),
+ FixedPcdGet64 (PcdSystemMemorySize));
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ DRAM_BLOCK2_BASE_REMOTE (2),
+ FixedPcdGet64 (PcdDramBlock2Size));
+
+#if (FixedPcdGet32 (PcdChipCount) > 3)
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ SYSTEM_MEMORY_BASE_REMOTE (3),
+ FixedPcdGet64 (PcdSystemMemorySize));
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+ ResourceAttributes,
+ DRAM_BLOCK2_BASE_REMOTE (3),
+ FixedPcdGet64 (PcdDramBlock2Size));
+#endif
+#endif
+#endif
+
ASSERT (VirtualMemoryMap != NULL);
Index = 0;
@@ -122,6 +165,48 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+#if (FixedPcdGet32 (PcdChipCount) > 1)
+ // Chip 1 DDR Block 1 - (2GB)
+ VirtualMemoryTable[++Index].PhysicalBase = SYSTEM_MEMORY_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].VirtualBase = SYSTEM_MEMORY_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // Chip 1 DDR Block 2 - (6GB)
+ VirtualMemoryTable[++Index].PhysicalBase = DRAM_BLOCK2_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].VirtualBase = DRAM_BLOCK2_BASE_REMOTE (1),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+#if (FixedPcdGet32 (PcdChipCount) > 2)
+ // Chip 2 DDR Block 1 - (2GB)
+ VirtualMemoryTable[++Index].PhysicalBase = SYSTEM_MEMORY_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].VirtualBase = SYSTEM_MEMORY_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // Chip 2 DDR Block 2 - (6GB)
+ VirtualMemoryTable[++Index].PhysicalBase = DRAM_BLOCK2_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].VirtualBase = DRAM_BLOCK2_BASE_REMOTE (2),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+#if (FixedPcdGet32 (PcdChipCount) > 3)
+ // Chip 3 DDR Block 1 - (2GB)
+ VirtualMemoryTable[++Index].PhysicalBase = SYSTEM_MEMORY_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].VirtualBase = SYSTEM_MEMORY_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdSystemMemorySize);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // Chip 3 DDR Block 2 - (6GB)
+ VirtualMemoryTable[++Index].PhysicalBase = DRAM_BLOCK2_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].VirtualBase = DRAM_BLOCK2_BASE_REMOTE (3),
+ VirtualMemoryTable[Index].Length = PcdGet64 (PcdDramBlock2Size);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+#endif
+#endif
+#endif
+
// PCI Configuration Space
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciExpressBaseAddress);
VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciExpressBaseAddress);
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 97c1e40349ea..dac7fdc308b1 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -46,6 +46,9 @@ [PcdsFixedAtBuild]
gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008
gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009
+ # Chip count on the platform
+ gArmSgiTokenSpaceGuid.PcdChipCount|1|UINT32|0x0000000B
+
# GIC
gArmSgiTokenSpaceGuid.PcdGicSize|0|UINT64|0x0000000A
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 12/17] Platform/ARM/SgiPkg: Add SRAT table for RdN1Edge dual-chip platform
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (10 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 11/17] Platform/ARM/SgiPkg: Add support for remote numa memory nodes Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 13/17] Platform/ARM/SgiPkg: Use chip count constant on rdn1edgex2 platform Aditya Angadi
` (5 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
The RD-N1-Edge dual chip platform has an additional 8GB of memory
connected to the second chip. Add the SRAT ACPI table to describe
the proximity domain, base address and size of this memory.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc | 95 ++++++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 6 ++
2 files changed, 101 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc
new file mode 100644
index 000000000000..361db7506845
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc
@@ -0,0 +1,95 @@
+/** @file
+* Static Resource Affinity Table (SRAT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+
+//
+// Static Resource Affinity Table
+//
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE Memory[4];
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE Gicc[16];
+} EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
+
+#pragma pack ()
+
+EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
+ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE,
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION
+ ),
+ 0x00000001,
+ EFI_ACPI_RESERVED_QWORD
+ },
+ // Memory Affinity
+ {
+ // Chip 0 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdSystemMemoryBase),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdDramBlock2Base),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+
+ // Chip 1 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x1, SYSTEM_MEMORY_BASE_REMOTE(1),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x1, DRAM_BLOCK2_BASE_REMOTE(1),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+ },
+ // Processor Affinity
+ {
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000000, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000001, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000002, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000003, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000004, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000005, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000006, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000007, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000008, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000009, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000A, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000B, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000C, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000D, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000E, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000F, 0x00000001, 0x00000000),
+ },
+};
+
+VOID* CONST ReferenceAcpiTable = &Srat;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 75f8e6dd6685..974d9db5438e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -23,6 +23,7 @@ [Sources]
Mcfg.aslc
RdN1Edge/Dsdt.asl
RdN1EdgeX2/Madt.aslc
+ RdN1EdgeX2/Srat.aslc
Spcr.aslc
Ssdt.asl
@@ -39,6 +40,11 @@ [FixedPcd]
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Base
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 13/17] Platform/ARM/SgiPkg: Use chip count constant on rdn1edgex2 platform
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (11 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 12/17] Platform/ARM/SgiPkg: Add SRAT table for RdN1Edge dual-chip platform Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 14/17] Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M Aditya Angadi
` (4 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Use the PcdChipCount constant to define the maximum number of chips
included in the multi-chip package. In addition to this, remove the
hardcoded value of the chip count in the MADT ACPI table of RD-N1-EdgeX2
platform and replace it with the number of chips specified by
'PcdChipCount'.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc | 2 +-
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
index 47368931e367..f9210cc6226a 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
@@ -17,7 +17,7 @@
#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
FixedPcdGet32 (PcdCoreCount))
-#define CHIP_CNT 2
+#define CHIP_CNT (FixedPcdGet32 (PcdChipCount))
// Multiple APIC Description Table
#pragma pack (1)
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index 6c9e30eadb95..1cb41d119e3e 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -41,6 +41,9 @@ [PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
gArmSgiTokenSpaceGuid.PcdGicSize|0x100000
+ # Number of chips in the multi-chip package
+ gArmSgiTokenSpaceGuid.PcdChipCount|2
+
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 14/17] Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (12 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 13/17] Platform/ARM/SgiPkg: Use chip count constant on rdn1edgex2 platform Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 15/17] Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-M platform Aditya Angadi
` (3 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Add Madt and Dsdt ACPI tables that are specific for RD-Daniel Config-M
platform. Reuse the rest of the shared ACPI tables in SgiPkg.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl | 118 ++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc | 141 ++++++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf | 65 +++++++++
3 files changed, 324 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
new file mode 100644
index 000000000000..57873ef5cfa2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
@@ -0,0 +1,118 @@
+/** @file
+* Differentiated System Description Table Fields (DSDT)
+*
+* Copyright (c) 2020, ARM Ltd. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+ EFI_ACPI_ARM_OEM_REVISION) {
+ Scope (_SB) {
+ Device (CP00) { // Zeus core 0
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP01) { // Zeus core 1
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP02) { // Zeus core 2
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP03) { // Zeus core 3
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP04) { // Zeus core 4
+ Name (_HID, "ACPI0007")
+ Name (_UID, 4)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP05) { // Zeus core 5
+ Name (_HID, "ACPI0007")
+ Name (_UID, 5)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP06) { // Zeus core 6
+ Name (_HID, "ACPI0007")
+ Name (_UID, 6)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP07) { // Zeus core 7
+ Name (_HID, "ACPI0007")
+ Name (_UID, 7)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP08) { // Zeus core 8
+ Name (_HID, "ACPI0007")
+ Name (_UID, 8)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP09) { // Zeus core 9
+ Name (_HID, "ACPI0007")
+ Name (_UID, 9)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP10) { // Zeus core 10
+ Name (_HID, "ACPI0007")
+ Name (_UID, 10)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP11) { // Zeus core 11
+ Name (_HID, "ACPI0007")
+ Name (_UID, 11)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP12) { // Zeus core 12
+ Name (_HID, "ACPI0007")
+ Name (_UID, 12)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP13) { // Zeus core 13
+ Name (_HID, "ACPI0007")
+ Name (_UID, 13)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP14) { // Zeus core 14
+ Name (_HID, "ACPI0007")
+ Name (_UID, 14)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP15) { // Zeus core 15
+ Name (_HID, "ACPI0007")
+ Name (_UID, 15)
+ Name (_STA, 0xF)
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
new file mode 100644
index 000000000000..e2b6f6b44f07
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
@@ -0,0 +1,141 @@
+/** @file
+* Multiple APIC Description Table (MADT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
+ FixedPcdGet32 (PcdCoreCount))
+
+// Multiple APIC Description Table
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT];
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor;
+ EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts[4];
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ // MADT specific fields
+ 0, // LocalApicAddress
+ 0 // Flags
+ },
+ {
+ // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // PmuIrq, GicBase, GicVBase,
+ // GicHBase, GsivId, GicRBase,
+ // Efficiency)
+ // Note: The GIC Structure of the primary CPU must be the first entry
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core4
+ 0, 4, GET_MPID(0x400, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core5
+ 0, 5, GET_MPID(0x500, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core6
+ 0, 6, GET_MPID(0x600, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core7
+ 0, 7, GET_MPID(0x700, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core8
+ 0, 8, GET_MPID(0x800, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core9
+ 0, 9, GET_MPID(0x900, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core10
+ 0, 10, GET_MPID(0xa00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core11
+ 0, 11, GET_MPID(0xb00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core12
+ 0, 12, GET_MPID(0xc00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core13
+ 0, 13, GET_MPID(0xd00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core14
+ 0, 14, GET_MPID(0xe00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core15
+ 0, 15, GET_MPID(0xf00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ },
+ // GIC Distributor Entry
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ 0, 3),
+ // GIC Redistributor
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
+ SIZE_16MB),
+ // GIC ITS
+ {
+ EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(1, 0x30080000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(2, 0x300C0000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(3, 0x30100000),
+ },
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
new file mode 100644
index 000000000000..4ae0a796fb0c
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
@@ -0,0 +1,65 @@
+## @file
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2020, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = RdDanielCfgMAcpiTables
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gArmSgiAcpiTablesGuid
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ SsdtRos.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Iort.aslc
+ Mcfg.aslc
+ RdDanielCfgM/Dsdt.asl
+ RdDanielCfgM/Madt.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkSize
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt
+ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioNetSize
+ gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt
+
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 15/17] Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-M platform
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (13 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 14/17] Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 16/17] Platform/ARM/SgiPkg: Add ACPI tables for RD-Daniel Config-XLR Aditya Angadi
` (2 subsequent siblings)
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Arm's RD-Daniel Config-M platform is built using 16 Neoverse cores and
connected to 8GB of RAM. Add initial platform support for this platform.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 4 ++
Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.dsc | 51 ++++++++++++++++++++
Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.fdf.inc | 10 ++++
3 files changed, 65 insertions(+)
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 728abbea97e8..7926b154e2bc 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -70,6 +70,10 @@
#define RD_N1_EDGE_CONF_ID 0x1
#define RD_E1_EDGE_CONF_ID 0x2
+// RD-Daniel Platform Identification values
+#define RD_DANIEL_PART_NUM 0x78A
+#define RD_DANIEL_CFGM_CONF_ID 0x1
+
#define SGI_CONFIG_MASK 0x0F
#define SGI_CONFIG_SHIFT 0x1C
#define SGI_PART_NUM_MASK 0xFFF
diff --git a/Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.dsc b/Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.dsc
new file mode 100644
index 000000000000..a76a9ad715ad
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.dsc
@@ -0,0 +1,51 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = RdDanielCfgM
+ PLATFORM_GUID = d301ac4e-0828-4cef-b754-34ca9b6781b5
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BOARD_DXE_FV_COMPONENTS = Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.fdf.inc
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x30140000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x200000
+
+ # ARM Cores and Clusters
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|1
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|16
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+
+[Components.common]
+ Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.fdf.inc b/Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.fdf.inc
new file mode 100644
index 000000000000..6a99bdbbbed1
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdDanielCfgM/RdDanielCfgM.fdf.inc
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+# Per-platform additional content of the DXE phase firmware volume
+
+ # ACPI support
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 16/17] Platform/ARM/SgiPkg: Add ACPI tables for RD-Daniel Config-XLR
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (14 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 15/17] Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-M platform Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 17/17] Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-XLR platform Aditya Angadi
2020-05-05 18:18 ` [edk2-devel] [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Ard Biesheuvel
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Add Madt, Dsdt and Srat ACPI tables that are specific for RD-Daniel
Config-XLR platform. Reuse the rest of the shared ACPI tables in SgiPkg.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl | 125 ++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc | 157 ++++++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Srat.aslc | 111 ++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf | 73 +++++++++
4 files changed, 466 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
new file mode 100644
index 000000000000..23ada55ec4a1
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
@@ -0,0 +1,125 @@
+/** @file
+* Differentiated System Description Table Fields (DSDT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
+ EFI_ACPI_ARM_OEM_REVISION) {
+ Scope (_SB) {
+
+ Device (CP00) { // Zeus core 0
+ Name (_HID, "ACPI0007")
+ Name (_UID, 0)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP01) { // Zeus core 1
+ Name (_HID, "ACPI0007")
+ Name (_UID, 1)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP02) { // Zeus core 2
+ Name (_HID, "ACPI0007")
+ Name (_UID, 2)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP03) { // Zeus core 3
+ Name (_HID, "ACPI0007")
+ Name (_UID, 3)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP04) { // Zeus core 4
+ Name (_HID, "ACPI0007")
+ Name (_UID, 4)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP05) { // Zeus core 5
+ Name (_HID, "ACPI0007")
+ Name (_UID, 5)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP06) { // Zeus core 6
+ Name (_HID, "ACPI0007")
+ Name (_UID, 6)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP07) { // Zeus core 7
+ Name (_HID, "ACPI0007")
+ Name (_UID, 7)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP08) { // Zeus core 8
+ Name (_HID, "ACPI0007")
+ Name (_UID, 8)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP09) { // Zeus core 9
+ Name (_HID, "ACPI0007")
+ Name (_UID, 9)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP10) { // Zeus core 10
+ Name (_HID, "ACPI0007")
+ Name (_UID, 10)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP11) { // Zeus core 11
+ Name (_HID, "ACPI0007")
+ Name (_UID, 11)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP12) { // Zeus core 12
+ Name (_HID, "ACPI0007")
+ Name (_UID, 12)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP13) { // Zeus core 13
+ Name (_HID, "ACPI0007")
+ Name (_UID, 13)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP14) { // Zeus core 14
+ Name (_HID, "ACPI0007")
+ Name (_UID, 14)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP15) { // Zeus core 15
+ Name (_HID, "ACPI0007")
+ Name (_UID, 15)
+ Name (_STA, 0xF)
+ }
+
+ Device (CP16) { // Zeus core 16
+ Name (_HID, "ACPI0007")
+ Name (_UID, 16)
+ Name (_STA, 0xF)
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
new file mode 100644
index 000000000000..7b42fcb99ba7
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
@@ -0,0 +1,157 @@
+/** @file
+* Multiple APIC Description Table (MADT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
+ FixedPcdGet32 (PcdCoreCount))
+#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
+
+// Multiple APIC Description Table
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT * CHIP_CNT];
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor[CHIP_CNT];
+ EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts[4];
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ // MADT specific fields
+ 0, // LocalApicAddress
+ 0 // Flags
+ },
+ {
+ // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // PmuIrq, GicBase, GicVBase,
+ // GicHBase, GsivId, GicRBase,
+ // Efficiency)
+ // Note: The GIC Structure of the primary CPU must be the first entry
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
+ //Chip 0
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 1
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x01000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x01000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x01000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x01000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 2
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x02000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x02000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x02000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x02000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ // Chip 3
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
+ 0, 0, GET_MPID(0x03000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
+ 0, 1, GET_MPID(0x03000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
+ 0, 2, GET_MPID(0x03000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
+ 0, 3, GET_MPID(0x03000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ },
+ // GIC Distributor Entry
+ EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ 0, 3),
+ {
+ // GIC Redistributor
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
+ SGI_REMOTE_CHIP_MEM_OFFSET(0), SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
+ SGI_REMOTE_CHIP_MEM_OFFSET(1), SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
+ SGI_REMOTE_CHIP_MEM_OFFSET(2), SIZE_16MB),
+ EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
+ SGI_REMOTE_CHIP_MEM_OFFSET(3), SIZE_16MB)
+ },
+ // GIC ITS
+ {
+ EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(1, 0x30080000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(2, 0x300C0000),
+ EFI_ACPI_6_2_GIC_ITS_INIT(3, 0x30100000),
+ },
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Srat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Srat.aslc
new file mode 100644
index 000000000000..2ad72e3878c2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Srat.aslc
@@ -0,0 +1,111 @@
+/** @file
+* Static Resource Affinity Table (SRAT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+
+//
+// Static Resource Affinity Table
+//
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE Memory[8];
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE Gicc[16];
+} EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
+
+#pragma pack ()
+
+EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
+ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE,
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION
+ ),
+ 0x00000001,
+ EFI_ACPI_RESERVED_QWORD
+ },
+ // Memory Affinity
+ {
+ // Chip 0 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdSystemMemoryBase),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, FixedPcdGet64 (PcdDramBlock2Base),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+
+ // Chip 1 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x1, SYSTEM_MEMORY_BASE_REMOTE(1),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x1, DRAM_BLOCK2_BASE_REMOTE(1),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+
+ // Chip 2 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x2, SYSTEM_MEMORY_BASE_REMOTE(2),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x2, DRAM_BLOCK2_BASE_REMOTE(2),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+
+ // Chip 3 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(
+ 0x3, SYSTEM_MEMORY_BASE_REMOTE(3),
+ FixedPcdGet64 (PcdSystemMemorySize), 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(
+ 0x3, DRAM_BLOCK2_BASE_REMOTE(3),
+ FixedPcdGet64 (PcdDramBlock2Size), 0x00000001),
+ },
+ // Processor Affinity
+ {
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000000, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000001, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000002, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000003, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000004, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000005, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000006, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000007, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x2, 0x00000008, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x2, 0x00000009, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x2, 0x0000000A, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x2, 0x0000000B, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x3, 0x0000000C, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x3, 0x0000000D, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x3, 0x0000000E, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x3, 0x0000000F, 0x00000001, 0x00000000),
+ },
+};
+
+VOID* CONST ReferenceAcpiTable = &Srat;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
new file mode 100644
index 000000000000..6cb62a7c866d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
@@ -0,0 +1,73 @@
+## @file
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2020, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = RdDanielCfgXlrAcpiTables
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gArmSgiAcpiTablesGuid
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ SsdtRos.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Iort.aslc
+ Mcfg.aslc
+ RdDanielCfgXlr/Dsdt.asl
+ RdDanielCfgXlr/Madt.aslc
+ RdDanielCfgXlr/Srat.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Base
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+
+ gArmSgiTokenSpaceGuid.PcdChipCount
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkSize
+ gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt
+ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress
+ gArmSgiTokenSpaceGuid.PcdVirtioNetSize
+ gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt
+
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5][edk2-platforms 17/17] Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-XLR platform
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (15 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 16/17] Platform/ARM/SgiPkg: Add ACPI tables for RD-Daniel Config-XLR Aditya Angadi
@ 2020-05-05 13:02 ` Aditya Angadi
2020-05-05 18:18 ` [edk2-devel] [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Ard Biesheuvel
17 siblings, 0 replies; 19+ messages in thread
From: Aditya Angadi @ 2020-05-05 13:02 UTC (permalink / raw)
To: devel
Cc: thomas.abraham, ard.biesheuvel, vijayenthiran.subramaniam, leif,
Aditya Angadi
Arm's RD-Daniel Config-XLR platform is a quad chip platform with each
chip having four Neoverse cores and 8GB of RAM attached to it. These
chips are coherently connected over CCIX interface and are put together
into a multi-chip package. Add initial support for this platform.
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 1 +
Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.dsc | 54 ++++++++++++++++++++
Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.fdf.inc | 10 ++++
3 files changed, 65 insertions(+)
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 7926b154e2bc..f4bba7c05d42 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -73,6 +73,7 @@
// RD-Daniel Platform Identification values
#define RD_DANIEL_PART_NUM 0x78A
#define RD_DANIEL_CFGM_CONF_ID 0x1
+#define RD_DANIEL_CFGXLR_CONF_ID 0x2
#define SGI_CONFIG_MASK 0x0F
#define SGI_CONFIG_SHIFT 0x1C
diff --git a/Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.dsc b/Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.dsc
new file mode 100644
index 000000000000..bc0a419a5274
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.dsc
@@ -0,0 +1,54 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = RdDanielCfgXlr
+ PLATFORM_GUID = 082f1695-b92a-4761-a7e3-f577938cc9eb
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x0001001B
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = AARCH64|ARM
+ BUILD_TARGETS = NOOPT|DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/ARM/SgiPkg/SgiPlatform.fdf
+ BOARD_DXE_FV_COMPONENTS = Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.fdf.inc
+ BUILD_NUMBER = 1
+
+# include common definitions from SgiPlatform.dsc
+!include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFixedAtBuild.common]
+ # GIC Base Addresses
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x30140000
+ gArmSgiTokenSpaceGuid.PcdGicSize|0x200000
+
+ # ARM Cores and Clusters
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|1
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|4
+
+ # Number of chips in the multi-chip package
+ gArmSgiTokenSpaceGuid.PcdChipCount|4
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+
+[Components.common]
+ Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
diff --git a/Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.fdf.inc b/Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.fdf.inc
new file mode 100644
index 000000000000..0c50caf63860
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdDanielCfgXlr/RdDanielCfgXlr.fdf.inc
@@ -0,0 +1,10 @@
+#
+# Copyright (c) 2020, ARM Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+# Per-platform additional content of the DXE phase firmware volume
+
+ # ACPI support
+ INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
--
2.17.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [edk2-devel] [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel
2020-05-05 13:01 [PATCH v5][edk2-platforms 00/17] Platform/Arm/Sgi: Add platform support for RD-Daniel Aditya Angadi
` (16 preceding siblings ...)
2020-05-05 13:02 ` [PATCH v5][edk2-platforms 17/17] Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-XLR platform Aditya Angadi
@ 2020-05-05 18:18 ` Ard Biesheuvel
17 siblings, 0 replies; 19+ messages in thread
From: Ard Biesheuvel @ 2020-05-05 18:18 UTC (permalink / raw)
To: devel, aditya.angadi; +Cc: thomas.abraham, vijayenthiran.subramaniam, leif
On 5/5/20 3:01 PM, Aditya Angadi via groups.io wrote:
> Changes since v4:
> - Addressed all the comments from Ard.
> - Split the patches into multiple smaller patches where applicable.
> - Reworded the commit messages to be more accurate about the change
> being introduced.
> - Picked up Ard's review tags
>
> Changes since v3:
> - Addressed all the comments from Ard.
> - Each platform with SgiPkg would be built independently of the other.
> - Removed all references to ACPI tables of platforms that are not part
> of the build of a platform.
> - Added support for multi-chip NUMA memory nodes.
> - Added SRAT table for RdN1EdgeX2 platform.
> - Did not pickup the review tags from Ard because the code change from
> last version.
>
> This patch series adds support for Arm's RD-Daniel platform. There are two
> configurations of this platform being added in this series - Config-M and
> Config-XLR. RD-Daniel is the next Arm's reference design subsystem.
> Config XLR is a multi chip platform.
>
> The first five patches rework the SgiPkg code to move away from being
> able to build a single binary for all the supported platforms to
> independent binary for each platform. This was requried as the first
> step to add newer RD platform support in SgiPkg as these newer platforms
> have differences in the programming interface.
>
> Patches 6 to 11 in the series refactor and consolidate the code in
> SgiPkg in preparation for adding support for numa memory nodes and the
> RD-Daniel platform.
>
> Patches 12 and 13 in the series add SRAT table for RD-N1-Edge platform
> and removes the hard-code chip count on the platform.
>
> The next four patches add support for the RD-Daniel platforms. There are
> two configuration of RD-Daniel platform.
> - RD-Daniel Config-M: This is single chip platform that includes
> 16 Neoverse cores.
> - RD-Daniel Config-XLR: This is multi-chip platform that includes
> four identical chip connected over a coherent link with all the
> four chips put together into a single package. Each chip includes
> four Neoverse cores and it attached to 8GB of RAM.
>
>
> Aditya Angadi (15):
> Platform/ARM/SgiPkg: Create platform specific dsc files
> Platform/ARM/SgiPkg: Let platforms define core and cluster count
> Platform/ARM/SgiPkg: Let platforms define GIC related PCD values
> Platform/ARM/SgiPkg: Create platform specific fd include file
> Platform/ARM/SgiPkg: Let platform specify the ACPI tables to include
> Platform/ARM/SgiPkg: Obtain rd-e1-edge platform core count from PCD
> Platform/ARM/SgiPkg: Refactor GIC related ACPI helper macros
> Platform/ARM/SgiPkg: Update SGI-575 MADT table to ACPI 6.2
> Platform/ARM/SgiPkg: Move common platform description to SSDT
> Platform/ARM/SgiPkg: Add helper macros for SRAT table
> Platform/ARM/SgiPkg: Use chip count constant on rdn1edgex2 platform
> Platform/ARM/SgiPkg: Add ACPI tables for Rd-Daniel Config-M
> Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-M
> platform
> Platform/ARM/SgiPkg: Add ACPI tables for RD-Daniel Config-XLR
> Platform/ARM/SgiPkg: Add initial support for RD-Daniel Config-XLR
> platform
>
> Vijayenthiran Subramaniam (2):
> Platform/ARM/SgiPkg: Add support for remote numa memory nodes
> Platform/ARM/SgiPkg: Add SRAT table for RdN1Edge dual-chip platform
>
For the series,
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Pushed as 03fb86be4146..ca1a7187861c
Thanks!
^ permalink raw reply [flat|nested] 19+ messages in thread