From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.12627.1589107403238038305 for ; Sun, 10 May 2020 03:43:23 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: ard.biesheuvel@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D2E2A101E; Sun, 10 May 2020 03:43:22 -0700 (PDT) Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0540F3F68F; Sun, 10 May 2020 03:43:20 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Date: Sun, 10 May 2020 12:42:56 +0200 Message-Id: <20200510104259.23739-2-ard.biesheuvel@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200510104259.23739-1-ard.biesheuvel@arm.com> References: <20200510104259.23739-1-ard.biesheuvel@arm.com> Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 672 ++++++++++---------- 1 file changed, 340 insertions(+), 332 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index d471b1cadadc..af7c06656433 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -31,13 +31,13 @@ STATIC UINT32 GenetMmioRead ( - IN GENET_PRIVATE_DATA *Genet, - IN UINT32 Offset - ) + IN GENET_PRIVATE_DATA *Genet, + IN UINT32 Offset + ) { - ASSERT((Offset & 3) == 0); + ASSERT ((Offset & 3) == 0); - return MmioRead32 (Genet->RegBase + Offset); + return MmioRead32 (Genet->RegBase + Offset); } /** @@ -53,15 +53,15 @@ GenetMmioRead ( STATIC VOID GenetMmioWrite ( - IN GENET_PRIVATE_DATA *Genet, - IN UINT32 Offset, - IN UINT32 Data - ) + IN GENET_PRIVATE_DATA *Genet, + IN UINT32 Offset, + IN UINT32 Data + ) { - ASSERT((Offset & 3) == 0); + ASSERT ((Offset & 3) == 0); - ArmDataSynchronizationBarrier (); - MmioWrite32 (Genet->RegBase + Offset, Data); + ArmDataSynchronizationBarrier (); + MmioWrite32 (Genet->RegBase + Offset, Data); } /** @@ -79,37 +79,38 @@ GenetMmioWrite ( EFI_STATUS EFIAPI GenetPhyRead ( - IN VOID *Priv, - IN UINT8 PhyAddr, - IN UINT8 Reg, - OUT UINT16 *Data - ) + IN VOID *Priv, + IN UINT8 PhyAddr, + IN UINT8 Reg, + OUT UINT16 *Data + ) { - GENET_PRIVATE_DATA *Genet = Priv; - UINTN Retry; - UINT32 Value; + GENET_PRIVATE_DATA *Genet = Priv; + UINTN Retry; + UINT32 Value; - Value = GENET_MDIO_READ | - GENET_MDIO_START_BUSY | - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | - __SHIFTIN(Reg, GENET_MDIO_REG); - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value); + Value = GENET_MDIO_READ | + GENET_MDIO_START_BUSY | + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | + __SHIFTIN(Reg, GENET_MDIO_REG); + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value); - for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) { - Value = GenetMmioRead (Genet, GENET_MDIO_CMD); - if ((Value & GENET_MDIO_START_BUSY) == 0) { - *Data = Value & 0xffff; - break; - } - gBS->Stall (10); + for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) { + Value = GenetMmioRead (Genet, GENET_MDIO_CMD); + if ((Value & GENET_MDIO_START_BUSY) == 0) { + *Data = Value & 0xffff; + break; } + gBS->Stall (10); + } - if (Retry == 0) { - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } + if (Retry == 0) { + DEBUG ((DEBUG_ERROR, + "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg)); + return EFI_DEVICE_ERROR; + } - return EFI_SUCCESS; + return EFI_SUCCESS; } /** @@ -127,36 +128,37 @@ GenetPhyRead ( EFI_STATUS EFIAPI GenetPhyWrite ( - IN VOID *Priv, - IN UINT8 PhyAddr, - IN UINT8 Reg, - IN UINT16 Data - ) + IN VOID *Priv, + IN UINT8 PhyAddr, + IN UINT8 Reg, + IN UINT16 Data + ) { - GENET_PRIVATE_DATA *Genet = Priv; - UINTN Retry; - UINT32 Value; + GENET_PRIVATE_DATA *Genet = Priv; + UINTN Retry; + UINT32 Value; - Value = GENET_MDIO_WRITE | - GENET_MDIO_START_BUSY | - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | - __SHIFTIN(Reg, GENET_MDIO_REG); - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data); + Value = GENET_MDIO_WRITE | + GENET_MDIO_START_BUSY | + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | + __SHIFTIN(Reg, GENET_MDIO_REG); + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data); - for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) { - Value = GenetMmioRead (Genet, GENET_MDIO_CMD); - if ((Value & GENET_MDIO_START_BUSY) == 0) { - break; - } - gBS->Stall (10); + for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) { + Value = GenetMmioRead (Genet, GENET_MDIO_CMD); + if ((Value & GENET_MDIO_START_BUSY) == 0) { + break; } + gBS->Stall (10); + } - if (Retry == 0) { - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } + if (Retry == 0) { + DEBUG ((DEBUG_ERROR, + "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg)); + return EFI_DEVICE_ERROR; + } - return EFI_SUCCESS; + return EFI_SUCCESS; } /** @@ -170,13 +172,13 @@ GenetPhyWrite ( VOID EFIAPI GenetPhyConfigure ( - IN VOID *Priv, - IN GENERIC_PHY_SPEED Speed, - IN GENERIC_PHY_DUPLEX Duplex - ) + IN VOID *Priv, + IN GENERIC_PHY_SPEED Speed, + IN GENERIC_PHY_DUPLEX Duplex + ) { - GENET_PRIVATE_DATA *Genet = Priv; - UINT32 Value; + GENET_PRIVATE_DATA *Genet = Priv; + UINT32 Value; Value = GenetMmioRead (Genet, GENET_EXT_RGMII_OOB_CTRL); Value &= ~GENET_EXT_RGMII_OOB_OOB_DISABLE; @@ -293,38 +295,40 @@ GenetPhyResetAction ( **/ VOID GenetReset ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; + UINT32 Value; - Value = GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL); - Value |= GENET_SYS_RBUF_FLUSH_RESET; - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); - gBS->Stall (10); + Value = GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL); + Value |= GENET_SYS_RBUF_FLUSH_RESET; + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); + gBS->Stall (10); - Value &= ~GENET_SYS_RBUF_FLUSH_RESET; - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); - gBS->Stall (10); + Value &= ~GENET_SYS_RBUF_FLUSH_RESET; + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); + gBS->Stall (10); - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0); - gBS->Stall (10); + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0); + gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); - GenetMmioWrite (Genet, GENET_UMAC_CMD, GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET); - gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); + GenetMmioWrite (Genet, GENET_UMAC_CMD, + GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET); + gBS->Stall (10); + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX); - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0); + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, + GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX); + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0); - GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536); + GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536); - Value = GenetMmioRead (Genet, GENET_RBUF_CTRL); - Value |= GENET_RBUF_ALIGN_2B; - GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value); + Value = GenetMmioRead (Genet, GENET_RBUF_CTRL); + Value |= GENET_RBUF_ALIGN_2B; + GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value); - GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1); + GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1); } /** @@ -337,20 +341,20 @@ GenetReset ( VOID EFIAPI GenetSetMacAddress ( - IN GENET_PRIVATE_DATA *Genet, - IN EFI_MAC_ADDRESS *MacAddr - ) + IN GENET_PRIVATE_DATA *Genet, + IN EFI_MAC_ADDRESS *MacAddr + ) { - UINT32 Value; + UINT32 Value; - Value = MacAddr->Addr[3] | - MacAddr->Addr[2] << 8 | - MacAddr->Addr[1] << 16 | - MacAddr->Addr[0] << 24; - GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value); - Value = MacAddr->Addr[5] | - MacAddr->Addr[4] << 8; - GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value); + Value = MacAddr->Addr[3] | + MacAddr->Addr[2] << 8 | + MacAddr->Addr[1] << 16 | + MacAddr->Addr[0] << 24; + GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value); + Value = MacAddr->Addr[5] | + MacAddr->Addr[4] << 8; + GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value); } /** @@ -362,24 +366,24 @@ GenetSetMacAddress ( **/ VOID GenetSetPhyMode ( - IN GENET_PRIVATE_DATA *Genet, - IN GENET_PHY_MODE PhyMode - ) + IN GENET_PRIVATE_DATA *Genet, + IN GENET_PHY_MODE PhyMode + ) { - UINT32 Value; + UINT32 Value; - switch (PhyMode) { - case GENET_PHY_MODE_RGMII: - case GENET_PHY_MODE_RGMII_RXID: - case GENET_PHY_MODE_RGMII_TXID: - case GENET_PHY_MODE_RGMII_ID: - Value = GENET_SYS_PORT_MODE_EXT_GPHY; - break; - default: - Value = 0; - break; - } - GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value); + switch (PhyMode) { + case GENET_PHY_MODE_RGMII: + case GENET_PHY_MODE_RGMII_RXID: + case GENET_PHY_MODE_RGMII_TXID: + case GENET_PHY_MODE_RGMII_ID: + Value = GENET_SYS_PORT_MODE_EXT_GPHY; + break; + default: + Value = 0; + break; + } + GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value); } /** @@ -390,31 +394,32 @@ GenetSetPhyMode ( **/ VOID GenetEnableTxRx ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; + UINT32 Value; + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; - // Start TX DMA on default queue - Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL); - Value |= GENET_TX_DMA_CTRL_EN; - Value |= GENET_TX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); + // Start TX DMA on default queue + Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL); + Value |= GENET_TX_DMA_CTRL_EN; + Value |= GENET_TX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); - // Start RX DMA on default queue - Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL); - Value |= GENET_RX_DMA_CTRL_EN; - Value |= GENET_RX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); + // Start RX DMA on default queue + Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL); + Value |= GENET_RX_DMA_CTRL_EN; + Value |= GENET_RX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); - // Enable transmitter and receiver - Value = GenetMmioRead (Genet, GENET_UMAC_CMD); - Value |= GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Enable transmitter and receiver + Value = GenetMmioRead (Genet, GENET_UMAC_CMD); + Value |= GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); - // Enable interrupts - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE); + // Enable interrupts + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, + GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE); } /** @@ -425,42 +430,42 @@ GenetEnableTxRx ( **/ VOID GenetDisableTxRx ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; + UINT32 Value; + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; - // Disable interrupts - GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF); + // Disable interrupts + GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF); - // Disable receiver - Value = GenetMmioRead (Genet, GENET_UMAC_CMD); - Value &= ~GENET_UMAC_CMD_RXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Disable receiver + Value = GenetMmioRead (Genet, GENET_UMAC_CMD); + Value &= ~GENET_UMAC_CMD_RXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); - // Stop RX DMA - Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL); - Value &= ~GENET_RX_DMA_CTRL_EN; - Value &= ~GENET_RX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); + // Stop RX DMA + Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL); + Value &= ~GENET_RX_DMA_CTRL_EN; + Value &= ~GENET_RX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); - // Stop TX DMA - Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL); - Value &= ~GENET_TX_DMA_CTRL_EN; - Value &= ~GENET_TX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); + // Stop TX DMA + Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL); + Value &= ~GENET_TX_DMA_CTRL_EN; + Value &= ~GENET_TX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); - // Flush data in the TX FIFO - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1); - gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0); + // Flush data in the TX FIFO + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1); + gBS->Stall (10); + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0); - // Disable transmitter - Value = GenetMmioRead (Genet, GENET_UMAC_CMD); - Value &= ~GENET_UMAC_CMD_TXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Disable transmitter + Value = GenetMmioRead (Genet, GENET_UMAC_CMD); + Value &= ~GENET_UMAC_CMD_TXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } /** @@ -472,19 +477,19 @@ GenetDisableTxRx ( **/ VOID GenetSetPromisc ( - IN GENET_PRIVATE_DATA *Genet, - IN BOOLEAN Enable - ) + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ) { - UINT32 Value; + UINT32 Value; - Value = GenetMmioRead (Genet, GENET_UMAC_CMD); - if (Enable) { - Value |= GENET_UMAC_CMD_PROMISC; - } else { - Value &= ~GENET_UMAC_CMD_PROMISC; - } - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + Value = GenetMmioRead (Genet, GENET_UMAC_CMD); + if (Enable) { + Value |= GENET_UMAC_CMD_PROMISC; + } else { + Value &= ~GENET_UMAC_CMD_PROMISC; + } + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } /** @@ -495,63 +500,63 @@ GenetSetPromisc ( **/ VOID GenetDmaInitRings ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; - Genet->TxQueued = 0; - Genet->TxNext = 0; - Genet->TxConsIndex = 0; - Genet->TxProdIndex = 0; + Genet->TxQueued = 0; + Genet->TxNext = 0; + Genet->TxConsIndex = 0; + Genet->TxProdIndex = 0; - Genet->RxConsIndex = 0; - Genet->RxProdIndex = 0; + Genet->RxConsIndex = 0; + Genet->RxProdIndex = 0; - // Configure TX queue - GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08); - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE(Qid), - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT) | - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH)); - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO(Qid), - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES(Qid), 1); - GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI(Qid), 0); + // Configure TX queue + GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08); + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE (Qid), + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT) | + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH)); + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO (Qid), + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES (Qid), 1); + GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI (Qid), 0); - // Enable TX queue - GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid)); + // Enable TX queue + GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid)); - // Configure RX queue - GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08); - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE(Qid), - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT) | - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH)); - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO(Qid), - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES(Qid), - __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) | - __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI)); - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI(Qid), 0); + // Configure RX queue + GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08); + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE (Qid), + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT) | + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH)); + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO (Qid), + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES (Qid), + __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) | + __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI)); + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI (Qid), 0); - // Enable RX queue - GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid)); + // Enable RX queue + GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid)); } /** @@ -564,22 +569,22 @@ GenetDmaInitRings ( **/ EFI_STATUS GenetDmaAlloc ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - EFI_STATUS Status; - UINTN n; + EFI_STATUS Status; + UINTN Idx; - for (n = 0; n < GENET_DMA_DESC_COUNT; n++) { - Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[n]); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %r\n", Status)); - GenetDmaFree (Genet); - return Status; - } + for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { + Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %r\n", Status)); + GenetDmaFree (Genet); + return Status; } + } - return EFI_SUCCESS; + return EFI_SUCCESS; } /** @@ -594,33 +599,34 @@ GenetDmaAlloc ( **/ EFI_STATUS GenetDmaMapRxDescriptor ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex + ) { - EFI_STATUS Status; - UINTN DmaNumberOfBytes; + EFI_STATUS Status; + UINTN DmaNumberOfBytes; - ASSERT (Genet->RxBufferMap[DescIndex].Mapping == NULL); - ASSERT (Genet->RxBuffer[DescIndex] != NULL); + ASSERT (Genet->RxBufferMap[DescIndex].Mapping == NULL); + ASSERT (Genet->RxBuffer[DescIndex] != NULL); - DmaNumberOfBytes = GENET_MAX_PACKET_SIZE; - Status = DmaMap (MapOperationBusMasterWrite, - (VOID *)Genet->RxBuffer[DescIndex], - &DmaNumberOfBytes, - &Genet->RxBufferMap[DescIndex].Pa, - &Genet->RxBufferMap[DescIndex].Mapping); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status)); - return Status; - } + DmaNumberOfBytes = GENET_MAX_PACKET_SIZE; + Status = DmaMap (MapOperationBusMasterWrite, + (VOID *)Genet->RxBuffer[DescIndex], + &DmaNumberOfBytes, + &Genet->RxBufferMap[DescIndex].Pa, + &Genet->RxBufferMap[DescIndex].Mapping); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status)); + return Status; + } - //DEBUG ((DEBUG_INFO, "GenetDmaMapRxDescriptor: Desc 0x%X mapped to 0x%X\n", DescIndex, Genet->RxBufferMap[DescIndex].Pa)); + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), + Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), + (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF); - - return EFI_SUCCESS; + return EFI_SUCCESS; } /** @@ -632,14 +638,14 @@ GenetDmaMapRxDescriptor ( **/ VOID GenetDmaUnmapRxDescriptor ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex + ) { - if (Genet->RxBufferMap[DescIndex].Mapping != NULL) { - DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping); - Genet->RxBufferMap[DescIndex].Mapping = NULL; - } + if (Genet->RxBufferMap[DescIndex].Mapping != NULL) { + DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping); + Genet->RxBufferMap[DescIndex].Mapping = NULL; + } } /** @@ -651,19 +657,20 @@ GenetDmaUnmapRxDescriptor ( **/ VOID GenetDmaFree ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINTN n; + UINTN Idx; - for (n = 0; n < GENET_DMA_DESC_COUNT; n++) { - GenetDmaUnmapRxDescriptor (Genet, n); + for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { + GenetDmaUnmapRxDescriptor (Genet, Idx); - if (Genet->RxBuffer[n] != NULL) { - DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), Genet->RxBuffer[n]); - Genet->RxBuffer[n] = NULL; - } + if (Genet->RxBuffer[Idx] != NULL) { + DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), + Genet->RxBuffer[Idx]); + Genet->RxBuffer[Idx] = NULL; } + } } /** @@ -677,26 +684,29 @@ GenetDmaFree ( **/ VOID GenetDmaTriggerTx ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex, - IN EFI_PHYSICAL_ADDRESS PhysAddr, - IN UINTN NumberOfBytes - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex, + IN EFI_PHYSICAL_ADDRESS PhysAddr, + IN UINTN NumberOfBytes + ) { - UINT32 DescStatus; - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; + UINT32 DescStatus; + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; - DescStatus = GENET_TX_DESC_STATUS_SOP | - GENET_TX_DESC_STATUS_EOP | - GENET_TX_DESC_STATUS_CRC | - GENET_TX_DESC_STATUS_QTAG | - __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN); + DescStatus = GENET_TX_DESC_STATUS_SOP | + GENET_TX_DESC_STATUS_EOP | + GENET_TX_DESC_STATUS_CRC | + GENET_TX_DESC_STATUS_QTAG | + __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN); - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), PhysAddr & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), (PhysAddr >> 32) & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus); + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), + PhysAddr & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), + (PhysAddr >> 32) & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus); - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), (DescIndex + 1) & 0xFFFF); + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), + (DescIndex + 1) & 0xFFFF); } /** @@ -708,24 +718,24 @@ GenetDmaTriggerTx ( **/ VOID GenetTxIntr ( - IN GENET_PRIVATE_DATA *Genet, - OUT VOID **TxBuf - ) + IN GENET_PRIVATE_DATA *Genet, + OUT VOID **TxBuf + ) { - UINT32 ConsIndex, Total; - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; + UINT32 ConsIndex, Total; + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; - ConsIndex = GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xFFFF; + ConsIndex = GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xFFFF; - Total = (ConsIndex - Genet->TxConsIndex) & 0xFFFF; - if (Genet->TxQueued > 0 && Total > 0) { - *TxBuf = Genet->TxBuffer[Genet->TxNext]; - Genet->TxQueued--; - Genet->TxNext = (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT; - Genet->TxConsIndex++; - } else { - *TxBuf = NULL; - } + Total = (ConsIndex - Genet->TxConsIndex) & 0xFFFF; + if (Genet->TxQueued > 0 && Total > 0) { + *TxBuf = Genet->TxBuffer[Genet->TxNext]; + Genet->TxQueued--; + Genet->TxNext = (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT; + Genet->TxConsIndex++; + } else { + *TxBuf = NULL; + } } /** @@ -742,32 +752,30 @@ GenetTxIntr ( **/ EFI_STATUS GenetRxIntr ( - IN GENET_PRIVATE_DATA *Genet, - OUT UINT8 *DescIndex, - OUT UINTN *FrameLength - ) + IN GENET_PRIVATE_DATA *Genet, + OUT UINT8 *DescIndex, + OUT UINTN *FrameLength + ) { - EFI_STATUS Status; - UINT32 ProdIndex, Total; - UINT32 DescStatus; - UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; + EFI_STATUS Status; + UINT32 ProdIndex, Total; + UINT32 DescStatus; + UINT8 Qid = GENET_DMA_DEFAULT_QUEUE; - ProdIndex = GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xFFFF; + ProdIndex = GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xFFFF; - Total = (ProdIndex - Genet->RxConsIndex) & 0xFFFF; - if (Total > 0) { - *DescIndex = Genet->RxConsIndex % GENET_DMA_DESC_COUNT; - DescStatus = GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex)); - *FrameLength = __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN); + Total = (ProdIndex - Genet->RxConsIndex) & 0xFFFF; + if (Total > 0) { + *DescIndex = Genet->RxConsIndex % GENET_DMA_DESC_COUNT; + DescStatus = GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex)); + *FrameLength = __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN); - //DEBUG ((DEBUG_INFO, "GenetRxIntr: DescIndex=0x%X FrameLength=0x%X\n", *DescIndex, *FrameLength)); + Genet->RxConsIndex = (Genet->RxConsIndex + 1) & 0xFFFF; + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsIndex); + Status = EFI_SUCCESS; + } else { + Status = EFI_NOT_READY; + } - Genet->RxConsIndex = (Genet->RxConsIndex + 1) & 0xFFFF; - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsIndex); - Status = EFI_SUCCESS; - } else { - Status = EFI_NOT_READY; - } - - return Status; + return Status; } -- 2.17.1