From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com []) by mx.groups.io with SMTP id smtpd.web12.17390.1589127269924431738 for ; Sun, 10 May 2020 09:14:33 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: ashraf.javeed@intel.com) IronPort-SDR: 5u8RcXXPmBLXte0bTtT36HveSst25Ia7BiYwZnkSysoaXGWUAMVxQQnnGQdvCJA4inYv3+DUea P/32LOz8CCSg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2020 09:14:32 -0700 IronPort-SDR: PPxIQe2hE5h2IUhDtdjwm5zAizNun/lnfWPq2xIYhEVAkgoyT+b9qr/WE0/aRa6WrCU15Zx5VD XGJyyYHU+hHg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,376,1583222400"; d="scan'208";a="463129624" Received: from pidsbabios005.gar.corp.intel.com ([10.66.128.37]) by fmsmga006.fm.intel.com with ESMTP; 10 May 2020 09:14:30 -0700 From: "Javeed, Ashraf" To: devel@edk2.groups.io Cc: Ray Ni , Jian J Wang , Hao A Wu Subject: [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 04/15] MdeModulePkg/PciBusDxe: Refactor the PCIe Bridge enable Date: Sun, 10 May 2020 21:44:01 +0530 Message-Id: <20200510161412.13832-5-ashraf.javeed@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20200510161412.13832-1-ashraf.javeed@intel.com> References: <20200510161412.13832-1-ashraf.javeed@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1954 https://bugzilla.tianocore.org/show_bug.cgi?id=2194 https://bugzilla.tianocore.org/show_bug.cgi?id=2313 https://bugzilla.tianocore.org/show_bug.cgi?id=2499 https://bugzilla.tianocore.org/show_bug.cgi?id=2500 Refactor the PCIe Bridge enabling code. Signed-off-by: Ashraf Javeed Signed-off-by: Ray Ni Cc: Jian J Wang Cc: Hao A Wu --- MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 70 ++++++++++++++++++++-------------------------------------------------- 1 file changed, 20 insertions(+), 50 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c index 5724fd6..62ef184 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c @@ -597,52 +597,36 @@ DeRegisterPciDevice ( } /** - Start the PCI root Ports or PCI-PCI Bridge only. + Enable all the PCI bridges under the specified root bridge or PCI-PCI Bridge. - @param Controller The root bridge handle. - @param RootBridge A pointer to the PCI_IO_DEVICE. - @param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL. - @param NumberOfChildren Children number. - @param ChildHandleBuffer A pointer to the child handle buffer. - - @retval EFI_NOT_READY Device is not allocated. - @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge. - @retval EFI_NOT_FOUND Can not find the specific device. - @retval EFI_SUCCESS Success to start Pci devices on bridge. + @param Bridge A pointer to the PCI_IO_DEVICE. **/ -EFI_STATUS +VOID EnablePciBridges ( - IN EFI_HANDLE Controller, - IN PCI_IO_DEVICE *RootBridge + IN PCI_IO_DEVICE *Bridge ) { PCI_IO_DEVICE *PciIoDevice; - EFI_STATUS Status; - LIST_ENTRY *CurrentLink; + LIST_ENTRY *Link; UINT64 Supports; - PciIoDevice = NULL; - CurrentLink = RootBridge->ChildList.ForwardLink; - - while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) { - - PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink); - + for ( Link = GetFirstNode (&Bridge->ChildList) + ; !IsNull (&Bridge->ChildList, Link) + ; Link = GetNextNode (&Bridge->ChildList, Link) + ) { + PciIoDevice = PCI_IO_DEVICE_FROM_LINK (Link); // - // check if the device has been assigned with required resource - // and registered + // Skip the device hasn't been assigned with required resource + // or registered. // - if (!PciIoDevice->Registered && !PciIoDevice->Allocated) { - return EFI_NOT_READY; + if (!PciIoDevice->Registered || !PciIoDevice->Allocated) { + continue; } if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { - Status = EnablePciBridges ( - Controller, - PciIoDevice - ); + EnablePciBridges (PciIoDevice); PciIoDevice->PciIo.Attributes ( &(PciIoDevice->PciIo), @@ -650,27 +634,17 @@ EnablePciBridges ( 0, &Supports ); - Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE; + Supports &= (UINT64) EFI_PCI_DEVICE_ENABLE; PciIoDevice->PciIo.Attributes ( &(PciIoDevice->PciIo), EfiPciIoAttributeOperationEnable, Supports, NULL ); - } - - CurrentLink = CurrentLink->ForwardLink; - } - - if (PciIoDevice == NULL) { - return EFI_NOT_FOUND; - } else { - return EFI_SUCCESS; } } - /** Register to manage the PCI device on the specified root bridge or PCI-PCI Bridge. @@ -851,9 +825,7 @@ StartPciDevicesOnBridge ( ChildHandleBuffer ); - if (EFI_ERROR (Status)) { - return Status; - } else { + if (!EFI_ERROR (Status)) { // // the late configuration of PCI Express features // the platform is required to indicate its requirement for the initialization @@ -861,13 +833,11 @@ StartPciDevicesOnBridge ( // // - // finally start those PCI bridge port devices only + // finally enable those PCI bridges // - return EnablePciBridges ( - Controller, - RootBridge - ); + EnablePciBridges (RootBridge); } + return Status; } /** -- 2.21.0.windows.1