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X-MS-Exchange-AntiSpam-MessageData: Tvd/23QflJnlxeL4U+dJNLRnU9EV/xO6TrfwKxN14MoXQMwJP2KgT0gYBII099fHb4Np8azU0iiggED9YJl78dJ5/wrx0yMLy5vqTjmAUkombcLZ3MUZQoPpEBDaJ6MDc50UEZEqdv2nv8o/wkQaz/fMxWcUusDuI1Ds99hskaWY6e+fpSAEw+FHDqV5Mqj12WioiTgxV2DR/OfSROR3vwvI2u5HkxDU1LuuvMP38CYLUjoBNzaDgScdgmjkxsoIg3qLe/uihnIOufK1H33rgBP4bo2P9y2UzJLzCLCM7iWq5wFm5tqTfFrxo2Ylen6T6G6JGEg/tbqxXL1naRku7iqBHXPUreOJu5/zU0NgtxE40j1mNiO+xXUUxw5Ye4aVzjsUKsODhMhXU0V+VmAek6Snz6V/WOFTgULvP+OXr4blJU85RSYjYcI6uWIOyQiDT5d9YGH0sjbdv4qHqqVXAFFiuB+JhYFDKIAwtYZB9Vg= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2168daaf-7d6e-4ba5-dbf7-08d7fc710eeb X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2020 03:51:20.9905 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: xx73RBW3rRMISSWLM1KqsG2Kwc99pfqs0z7NbZL/dc4KK0ifkHnauwCJIq5vYdQEaf7ZPiOSi+CrntXI1K0sWQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5421 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Pankaj Bansal In NXP SOCs the UART clock is derived from System clock after PLL multiplication. Therefore, add the PL011UartClockLib implementation for NXP platforms. Signed-off-by: Pankaj Bansal --- Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf | 24 +++++++++= +++++++++++ Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c | 22 +++++++++= +++++++++ 2 files changed, 46 insertions(+) diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf b/= Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf new file mode 100644 index 000000000000..b771dba7697f --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf @@ -0,0 +1,24 @@ +#/* @file +# Copyright 2018, 2020 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D PL011UartClockLib + FILE_GUID =3D af8fef24-afbb-472a-b8b7-13101a79703c + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PL011UartClockLib + +[Packages] + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[Sources.common] + PL011UartClockLib.c + +[LibraryClasses] + ArmPlatformLib diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c b/Si= licon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c new file mode 100644 index 000000000000..3814685585eb --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c @@ -0,0 +1,22 @@ +/** @file +* +* Copyright 2018, 2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include + +/** + Return clock in for PL011 Uart IP +**/ +UINT32 +EFIAPI +PL011UartClockGetFreq ( + VOID + ) +{ + return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0); +} --=20 2.17.1