* [PATCH edk2-platforms 1/8] Silicon/NXP: Use Metronome implementation from MdeModulePkg
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 2/8] Platform/NXP: Use Monotonic counter " Pankaj Bansal
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
There are two implementations of Metronome protocol.
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
MdeModulePkg/Universal/Metronome/Metronome.inf
Although nowhere it has been specified, which one to use, but we are
going by the general practice of preferring MdeModulePkg/MdePkg over
EmbeddedPkg.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Silicon/NXP/NxpQoriqLs.dsc.inc | 4 +---
Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 2 +-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc
index 03759c7cee7c..54236e19531c 100644
--- a/Silicon/NXP/NxpQoriqLs.dsc.inc
+++ b/Silicon/NXP/NxpQoriqLs.dsc.inc
@@ -218,8 +218,6 @@
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|10
[PcdsFixedAtBuild.common]
- gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
- gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
@@ -348,7 +346,7 @@
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ MdeModulePkg/Universal/Metronome/Metronome.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
index 931d0bb14f9b..fede51ced10e 100644
--- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
+++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
@@ -115,7 +115,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ INF MdeModulePkg/Universal/Metronome/Metronome.inf
INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
#
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH edk2-platforms 2/8] Platform/NXP: Use Monotonic counter from MdeModulePkg
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 1/8] Silicon/NXP: Use Metronome implementation from MdeModulePkg Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 3/8] Silicon/NXP: Use edk2 recommended compilation flags Pankaj Bansal
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
Monotonic counter module from EmbeddedPkg doesn't treat the
high 32 bit as non volatile, which is needed as per spec.
Therefore, use Monotonic counter module from MdeModulePkg
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Silicon/NXP/NxpQoriqLs.dsc.inc | 2 +-
Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc
index 54236e19531c..12e2b89fac58 100644
--- a/Silicon/NXP/NxpQoriqLs.dsc.inc
+++ b/Silicon/NXP/NxpQoriqLs.dsc.inc
@@ -337,7 +337,7 @@
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
# FDT installation
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
index fede51ced10e..49d8885477c7 100644
--- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
+++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
@@ -98,7 +98,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH edk2-platforms 3/8] Silicon/NXP: Use edk2 recommended compilation flags
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 1/8] Silicon/NXP: Use Metronome implementation from MdeModulePkg Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 2/8] Platform/NXP: Use Monotonic counter " Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 4/8] Silicon/NXP: Implement PL011UartClockLib for NXP platforms Pankaj Bansal
` (4 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
edk2 recommends to use MDEPKG_NDEBUG for release builds and to use
DISABLE_NEW_DEPRECATED_INTERFACES for all new platforms.
Therefore, enable these flags for NXP platforms as well
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Silicon/NXP/NxpQoriqLs.dsc.inc | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc
index 12e2b89fac58..ee639d552483 100644
--- a/Silicon/NXP/NxpQoriqLs.dsc.inc
+++ b/Silicon/NXP/NxpQoriqLs.dsc.inc
@@ -173,7 +173,12 @@
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
[BuildOptions]
- RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu cortex-a9
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+ #
+ # Disable deprecated APIs.
+ #
+ GCC:*_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
GCC:*_*_ARM_DLINK_FLAGS = -z common-page-size=0x1000
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH edk2-platforms 4/8] Silicon/NXP: Implement PL011UartClockLib for NXP platforms
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
` (2 preceding siblings ...)
2020-05-20 3:49 ` [PATCH edk2-platforms 3/8] Silicon/NXP: Use edk2 recommended compilation flags Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 5/8] Silicon/NXP: Add Chassis3V2 Package Pankaj Bansal
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
In NXP SOCs the UART clock is derived from System clock after PLL
multiplication. Therefore, add the PL011UartClockLib implementation
for NXP platforms.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf | 24 ++++++++++++++++++++
Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c | 22 ++++++++++++++++++
2 files changed, 46 insertions(+)
diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
new file mode 100644
index 000000000000..b771dba7697f
--- /dev/null
+++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
@@ -0,0 +1,24 @@
+#/* @file
+# Copyright 2018, 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = PL011UartClockLib
+ FILE_GUID = af8fef24-afbb-472a-b8b7-13101a79703c
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PL011UartClockLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[Sources.common]
+ PL011UartClockLib.c
+
+[LibraryClasses]
+ ArmPlatformLib
diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c
new file mode 100644
index 000000000000..3814685585eb
--- /dev/null
+++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c
@@ -0,0 +1,22 @@
+/** @file
+*
+* Copyright 2018, 2020 NXP
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Base.h>
+#include <Ppi/NxpPlatformGetClock.h>
+
+/**
+ Return clock in for PL011 Uart IP
+**/
+UINT32
+EFIAPI
+PL011UartClockGetFreq (
+ VOID
+ )
+{
+ return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0);
+}
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH edk2-platforms 5/8] Silicon/NXP: Add Chassis3V2 Package
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
` (3 preceding siblings ...)
2020-05-20 3:49 ` [PATCH edk2-platforms 4/8] Silicon/NXP: Implement PL011UartClockLib for NXP platforms Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 6/8] Silicon/NXP: Add LX2160A Soc package Pankaj Bansal
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
Chassis3V2 is the new chassis on which LS1028A and LX2160A SOCs
are based.
Add the Chassis3V2 package.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Silicon/NXP/Chassis3V2/Chassis3V2.dec | 22 ++++++
Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc | 10 +++
Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf | 33 +++++++++
Silicon/NXP/Chassis3V2/Include/Chassis.h | 26 +++++++
Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c | 71 ++++++++++++++++++++
5 files changed, 162 insertions(+)
diff --git a/Silicon/NXP/Chassis3V2/Chassis3V2.dec b/Silicon/NXP/Chassis3V2/Chassis3V2.dec
new file mode 100644
index 000000000000..d3674cd6dff9
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Chassis3V2.dec
@@ -0,0 +1,22 @@
+# @file
+# NXP Layerscape processor package.
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ DEC_SPECIFICATION = 1.27
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
diff --git a/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc b/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
new file mode 100644
index 000000000000..dabe2ae23054
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
@@ -0,0 +1,10 @@
+# @file
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[LibraryClasses.common]
+ ChassisLib|Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
diff --git a/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
new file mode 100644
index 000000000000..75b68cc4ca2d
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
@@ -0,0 +1,33 @@
+# @file
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ INF_VERSION = 1.27
+ BASE_NAME = Chassis3V2Lib
+ FILE_GUID = fae0d077-5fc2-494f-b8e1-c51a3023ee3e
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ChassisLib
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/NXP/Chassis3V2/Chassis3V2.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[LibraryClasses]
+ IoAccessLib
+ IoLib
+ PcdLib
+ SerialPortLib
+
+[Sources.common]
+ ChassisLib.c
+
+[FeaturePcd]
+ gNxpQoriqLsTokenSpaceGuid.PcdDcfgBigEndian
diff --git a/Silicon/NXP/Chassis3V2/Include/Chassis.h b/Silicon/NXP/Chassis3V2/Include/Chassis.h
new file mode 100644
index 000000000000..1f8a3fb129df
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Include/Chassis.h
@@ -0,0 +1,26 @@
+/** @file
+
+ Copyright 2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef CHASSIS_H__
+#define CHASSIS_H__
+
+#include <Uefi.h>
+
+#define NXP_LAYERSCAPE_CHASSIS3V2_DCFG_ADDRESS 0x1E00000
+
+/**
+ The Device Configuration Unit provides general purpose configuration and
+ status for the device. These registers only support 32-bit accesses.
+**/
+#pragma pack(1)
+typedef struct {
+ UINT8 Reserved0[0x100 - 0x0];
+ UINT32 RcwSr[32]; // Reset Control Word Status Register
+} NXP_LAYERSCAPE_CHASSIS3V2_DEVICE_CONFIG;
+#pragma pack()
+
+#endif // CHASSIS_H__
diff --git a/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c
new file mode 100644
index 000000000000..2d1157d05174
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c
@@ -0,0 +1,71 @@
+/** @file
+ Chassis specific functions common to all SOCs based on a specific Chessis
+
+ Copyright 2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Chassis.h>
+#include <Uefi.h>
+#include <Library/IoAccessLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+
+/**
+ Read Dcfg register
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+**/
+UINT32
+EFIAPI
+DcfgRead32 (
+ IN UINTN Address
+ )
+{
+ MMIO_OPERATIONS *DcfgOps;
+
+ DcfgOps = GetMmioOperations (FeaturePcdGet (PcdDcfgBigEndian));
+
+ return DcfgOps->Read32 (Address);
+}
+
+/**
+ Write Dcfg register
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+ @return Value.
+**/
+UINT32
+EFIAPI
+DcfgWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ MMIO_OPERATIONS *DcfgOps;
+
+ DcfgOps = GetMmioOperations (FeaturePcdGet (PcdDcfgBigEndian));
+
+ return DcfgOps->Write32 (Address, Value);
+}
+
+/**
+ Function to initialize Chassis Specific functions
+ **/
+VOID
+ChassisInit (
+ VOID
+ )
+{
+ //
+ // Early init serial Port to get board information.
+ //
+ SerialPortInitialize ();
+}
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH edk2-platforms 6/8] Silicon/NXP: Add LX2160A Soc package
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
` (4 preceding siblings ...)
2020-05-20 3:49 ` [PATCH edk2-platforms 5/8] Silicon/NXP: Add Chassis3V2 Package Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 7/8] Platform/NXP: Add LX2160ARDB Platform Pankaj Bansal
2020-05-20 3:49 ` [PATCH edk2-platforms 8/8] Platform/NXP/LX2160aRdbPkg: Add VarStore Pankaj Bansal
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
LX2160A is QorIq Layerscape multicore communications processor with
sixteen Arm Cortex-A72 cores.
This SOC is based on Layerscape Chassis v3.2.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Silicon/NXP/LX2160A/LX2160A.dec | 13 ++++
Silicon/NXP/LX2160A/LX2160A.dsc.inc | 50 ++++++++++++
Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf | 27 +++++++
Silicon/NXP/LX2160A/Include/Soc.h | 38 ++++++++++
Silicon/NXP/LX2160A/Library/SocLib/SocLib.c | 80 ++++++++++++++++++++
5 files changed, 208 insertions(+)
diff --git a/Silicon/NXP/LX2160A/LX2160A.dec b/Silicon/NXP/LX2160A/LX2160A.dec
new file mode 100644
index 000000000000..b39a44692361
--- /dev/null
+++ b/Silicon/NXP/LX2160A/LX2160A.dec
@@ -0,0 +1,13 @@
+# LX2160A.dec
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ DEC_SPECIFICATION = 0x0001001A
+
+[Includes]
+ Include
diff --git a/Silicon/NXP/LX2160A/LX2160A.dsc.inc b/Silicon/NXP/LX2160A/LX2160A.dsc.inc
new file mode 100644
index 000000000000..65c1b6e567b3
--- /dev/null
+++ b/Silicon/NXP/LX2160A/LX2160A.dsc.inc
@@ -0,0 +1,50 @@
+# LX2160A.dsc
+# LX2160A Soc package.
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+!include Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
+
+[LibraryClasses.common]
+ SocLib|Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
+
+ PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+ PL011UartClockLib|Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsDynamicDefault.common]
+ #
+ # ARM General Interrupt Controller
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x6000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x6200000
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xC0C0000
+
+[PcdsFixedAtBuild.common]
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x23A0000
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2390000
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|91
+
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x21C0000
+
+[PcdsFeatureFlag]
+ gNxpQoriqLsTokenSpaceGuid.PcdI2cErratumA009203|TRUE
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+
+##
diff --git a/Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
new file mode 100644
index 000000000000..70e14bbabe64
--- /dev/null
+++ b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
@@ -0,0 +1,27 @@
+# @file
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = SocLib
+ FILE_GUID = e868c5ca-9729-43ae-bff4-438c67de8c68
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SocLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/NXP/Chassis3V2/Chassis3V2.dec
+ Silicon/NXP/LX2160A/LX2160A.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[LibraryClasses]
+ ChassisLib
+ DebugLib
+
+[Sources.common]
+ SocLib.c
diff --git a/Silicon/NXP/LX2160A/Include/Soc.h b/Silicon/NXP/LX2160A/Include/Soc.h
new file mode 100644
index 000000000000..626e3a0cee07
--- /dev/null
+++ b/Silicon/NXP/LX2160A/Include/Soc.h
@@ -0,0 +1,38 @@
+/** @file
+
+ Copyright 2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef SOC_H__
+#define SOC_H__
+
+#include <Chassis.h>
+
+/**
+ Soc Memory Map
+**/
+#define LX2160A_DRAM0_PHYS_ADDRESS (BASE_2GB)
+#define LX2160A_DRAM0_SIZE (SIZE_2GB)
+#define LX2160A_DRAM1_PHYS_ADDRESS (BASE_128GB + BASE_2GB)
+#define LX2160A_DRAM1_SIZE (SIZE_128GB - SIZE_2GB) // 126 GB
+#define LX2160A_DRAM2_PHYS_ADDRESS (BASE_256GB + BASE_128GB)
+#define LX2160A_DRAM2_SIZE (SIZE_128GB)
+
+#define LX2160A_CCSR_PHYS_ADDRESS (BASE_16MB)
+#define LX2160A_CCSR_SIZE (SIZE_256MB - SIZE_16MB) // 240MB
+
+#define LX2160A_FSPI0_PHYS_ADDRESS (BASE_512MB)
+#define LX2160A_FSPI0_SIZE (SIZE_256MB)
+
+#define LX2160A_DCFG_ADDRESS NXP_LAYERSCAPE_CHASSIS3V2_DCFG_ADDRESS
+
+/**
+ Reset Control Word (RCW) Bits
+**/
+#define SYS_PLL_RAT(x) (((x) & 0x7c) >> 2) // Bits 2-6
+
+typedef NXP_LAYERSCAPE_CHASSIS3V2_DEVICE_CONFIG LX2160A_DEVICE_CONFIG;
+
+#endif // SOC_H__
diff --git a/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
new file mode 100644
index 000000000000..ed6b30ae8599
--- /dev/null
+++ b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
@@ -0,0 +1,80 @@
+/** @Soc.c
+ SoC specific Library containg functions to initialize various SoC components
+
+ Copyright 2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Library/ChassisLib.h>
+#include <Library/DebugLib.h>
+#include <Library/SocLib.h>
+#include <Soc.h>
+
+/**
+ Return the input clock frequency to an IP Module.
+ This function reads the RCW bits and calculates the PLL multiplier/divider
+ values to be applied to various IP modules.
+ If a module is disabled or doesn't exist on platform, then return zero.
+
+ @param[in] BaseClock Base clock to which PLL multiplier/divider values is
+ to be applied.
+ @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock
+ is to be retrieved.
+ @param[in] Args Variable argument list which is parsed based on
+ ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then
+ the second argument will be interpreted as controller
+ number. e.g. if there are four i2c controllers in SOC,
+ then this value can be 0, 1, 2, 3
+ e.g. if ClockType is NXP_CORE_CLOCK, then second
+ argument is interpreted as cluster number and third
+ argument is interpreted as core number (within the
+ cluster)
+
+ @return Actual Clock Frequency. Return value 0 should be
+ interpreted as clock not being provided to IP.
+**/
+UINT64
+SocGetClock (
+ IN UINT64 BaseClock,
+ IN NXP_IP_CLOCK ClockType,
+ IN VA_LIST Args
+ )
+{
+ LX2160A_DEVICE_CONFIG *Dcfg;
+ UINT32 RcwSr;
+ UINT64 ReturnValue;
+
+ ReturnValue = 0;
+ Dcfg = (LX2160A_DEVICE_CONFIG *)LX2160A_DCFG_ADDRESS;
+
+ switch (ClockType) {
+ case NXP_UART_CLOCK:
+ RcwSr = DcfgRead32 ((UINTN)&Dcfg->RcwSr[0]);
+ ReturnValue = (BaseClock * SYS_PLL_RAT (RcwSr)) >> 3;
+ break;
+ case NXP_I2C_CLOCK:
+ RcwSr = DcfgRead32 ((UINTN)&Dcfg->RcwSr[0]);
+ ReturnValue = (BaseClock * SYS_PLL_RAT (RcwSr)) >> 4;
+ break;
+ default:
+ break;
+ }
+
+ return ReturnValue;
+}
+
+/**
+ Function to initialize SoC specific constructs
+ **/
+VOID
+SocInit (
+ VOID
+ )
+{
+ ChassisInit ();
+
+ return;
+}
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH edk2-platforms 7/8] Platform/NXP: Add LX2160ARDB Platform
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
` (5 preceding siblings ...)
2020-05-20 3:49 ` [PATCH edk2-platforms 6/8] Silicon/NXP: Add LX2160A Soc package Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
2020-05-21 9:33 ` Leif Lindholm
2020-05-20 3:49 ` [PATCH edk2-platforms 8/8] Platform/NXP/LX2160aRdbPkg: Add VarStore Pankaj Bansal
7 siblings, 1 reply; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
LX2160A Reference Design Board (RDB) is a high-performance development
platform that supports the QorIQ LX2160A Layerscape Architecture SOCs.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 23 +++
Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 46 ++++++
Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 168 ++++++++++++++++++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf | 41 +++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 150 +++++++++++++++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c | 85 ++++++++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S | 45 ++++++
7 files changed, 558 insertions(+)
diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
new file mode 100644
index 000000000000..192eabc5b3f2
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
@@ -0,0 +1,23 @@
+# LX2160aRdbPkg.dec
+# LX2160a board package.
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ PACKAGE_NAME = LX2160aRdbPkg
+ PACKAGE_GUID = 6eba6648-d853-4eb3-9761-528b82d5ab04
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
new file mode 100644
index 000000000000..c292f3b8bff4
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
@@ -0,0 +1,46 @@
+# LX2160aRdbPkg.dsc
+#
+# LX2160ARDB Board package.
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ #
+ # Defines for default states. These can be changed on the command line.
+ # -D FLAG=VALUE
+ #
+ PLATFORM_NAME = LX2160aRdbPkg
+ PLATFORM_GUID = 60169ec4-d2b4-44f8-825e-f8684fd42e4f
+ OUTPUT_DIRECTORY = Build/LX2160aRdbPkg
+ FLASH_DEFINITION = Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
+
+!include Silicon/NXP/NxpQoriqLs.dsc.inc
+!include Silicon/NXP/LX2160A/LX2160A.dsc.inc
+
+[LibraryClasses.common]
+ ArmPlatformLib|Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
+ RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ #
+ # Architectural Protocols
+ #
+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <PcdsFixedAtBuild>
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
+ }
+
+ ##
diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
new file mode 100644
index 000000000000..6bd5d86ab2bd
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
@@ -0,0 +1,168 @@
+# LX2160aRdbPkg.fdf
+#
+# FLASH layout file for LX2160a board.
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.LX2160ARDB_EFI]
+BaseAddress = 0x82000000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the FLASH Device.
+Size = 0x00140000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the FLASH Device
+ErasePolarity = 1
+BlockSize = 0x10000
+NumBlocks = 0x14
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+0x00000000|0x00140000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+!include Platform/NXP/FVRules.fdf.inc
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file. This section also defines order the components and modules are positioned
+# within the image. The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FvMain]
+FvNameGuid = 1037c42b-8452-4c41-aac7-41e6c31468da
+BlockSize = 0x1
+NumBlocks = 0 # This FV gets compressed so make it just big enough
+FvAlignment = 8 # FV alignment and FV attributes setting.
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+
+ #
+ # PI DXE Drivers producing Architectural Protocols (EFI Services)
+ #
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ INF MdeModulePkg/Universal/Metronome/Metronome.inf
+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ #
+ # Multiple Console IO support
+ #
+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+ INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+ INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+
+ #
+ # FAT filesystem + GPT/MBR partitioning
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF FatPkg/EnhancedFatDxe/Fat.inf
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+ #
+ # UEFI application (Shell Embedded Boot Loader)
+ #
+ INF ShellPkg/Application/Shell/Shell.inf
+
+ #
+ # Bds
+ #
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+
+[FV.FVMAIN_COMPACT]
+FvAlignment = 8
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+ INF MdeModulePkg/Core/Pei/PeiMain.inf
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+ INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
+ INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+ INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+ INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ }
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
new file mode 100644
index 000000000000..94c88f2be4fb
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
@@ -0,0 +1,41 @@
+# @file
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = PlatformLib
+ FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ Silicon/NXP/NxpQoriqLs.dec
+ Silicon/NXP/Chassis3V2/Chassis3V2.dec
+ Silicon/NXP/LX2160A/LX2160A.dec
+
+[LibraryClasses]
+ ArmLib
+ SocLib
+
+[Sources.common]
+ ArmPlatformLibMem.c
+ ArmPlatformLib.c
+
+[Sources.AArch64]
+ AArch64/ArmPlatformHelper.S
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+
+[Ppis]
+ gArmMpCoreInfoPpiGuid
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
new file mode 100644
index 000000000000..c1bc5510cd6d
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
@@ -0,0 +1,150 @@
+/** ArmPlatformLib.c
+*
+* Contains board initialization functions.
+*
+* Copyright 2020 NXP
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/SocLib.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+#include <Ppi/NxpPlatformGetClock.h>
+
+ARM_CORE_INFO mLX2160aMpCoreInfoTable[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ },
+};
+
+/**
+ Return the current Boot Mode
+
+ This function returns the boot reason on the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+ Get the clocks supplied by Platform(Board) to NXP Layerscape SOC IPs
+
+ @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock
+ is to be retrieved.
+ @param[in] ... Variable argument list which is parsed based on
+ ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then
+ the second argument will be interpreted as controller
+ number.
+ if ClockType is NXP_CORE_CLOCK, then second argument
+ is interpreted as cluster number and third argument is
+ interpreted as core number (within the cluster)
+
+ @return Actual Clock Frequency. Return value 0 should be
+ interpreted as clock not being provided to IP.
+**/
+UINT64
+EFIAPI
+NxpPlatformGetClock(
+ IN UINT32 ClockType,
+ ...
+ )
+{
+ UINT64 Clock;
+ VA_LIST Args;
+
+ Clock = 0;
+
+ VA_START (Args, ClockType);
+
+ switch (ClockType) {
+ case NXP_SYSTEM_CLOCK:
+ Clock = 100 * 1000 * 1000; // 100 MHz
+ break;
+ case NXP_I2C_CLOCK:
+ case NXP_UART_CLOCK:
+ Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK);
+ Clock = SocGetClock (Clock, ClockType, Args);
+ break;
+ default:
+ break;
+ }
+
+ VA_END (Args);
+
+ return Clock;
+}
+
+/**
+ Initialize controllers that must setup in the normal world
+
+ This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+ in the PEI phase.
+
+**/
+EFI_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ SocInit ();
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ if (ArmIsMpCore()) {
+ *CoreCount = sizeof(mLX2160aMpCoreInfoTable) / sizeof(ARM_CORE_INFO);;
+ *ArmCoreTable = mLX2160aMpCoreInfoTable;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+
+ return EFI_SUCCESS;
+}
+
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+NXP_PLATFORM_GET_CLOCK_PPI gPlatformGetClockPpi = { NxpPlatformGetClock };
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ if (ArmIsMpCore()) {
+ *PpiListSize = sizeof (gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
+ } else {
+ *PpiListSize = 0;
+ *PpiList = NULL;
+ }
+}
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
new file mode 100644
index 000000000000..0855003632a3
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
@@ -0,0 +1,85 @@
+/** NxpQoriqLsMem.c
+*
+* Board memory specific Library.
+*
+* Copyright 2020 NXP
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Soc.h>
+
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
+
+/**
+ Return the Virtual Memory Map of your platform
+
+ This Virtual Memory Map is used by MemoryInitPei Module to initialize
+ the MMU on your platform.
+
+ @param VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing
+ a Physical-to-Virtual Memory mapping. This array
+ must be ended by a zero-filled entry
+
+**/
+
+VOID
+ArmPlatformGetVirtualMemoryMap (
+ IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap
+ )
+{
+ UINTN Index;
+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
+
+ Index = 0;
+
+ ASSERT (VirtualMemoryMap != NULL);
+
+ VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
+ MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+ if (VirtualMemoryTable == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__));
+ return;
+ }
+
+ VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM0_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM0_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].Length = LX2160A_DRAM0_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM1_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM1_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].Length = LX2160A_DRAM1_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM2_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM2_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].Length = LX2160A_DRAM2_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+ // CCSR Space
+ VirtualMemoryTable[Index].PhysicalBase = LX2160A_CCSR_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].VirtualBase = LX2160A_CCSR_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].Length = LX2160A_CCSR_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ // FlexSPI
+ VirtualMemoryTable[Index].PhysicalBase = LX2160A_FSPI0_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].VirtualBase = LX2160A_FSPI0_PHYS_ADDRESS;
+ VirtualMemoryTable[Index].Length = LX2160A_FSPI0_SIZE;
+ VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+ // End of Table
+ ZeroMem (&VirtualMemoryTable[Index], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
+
+ ASSERT (Index < MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+ *VirtualMemoryMap = VirtualMemoryTable;
+}
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
new file mode 100644
index 000000000000..b7c6dbdc2e61
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
@@ -0,0 +1,45 @@
+//
+// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <AsmMacroIoLibV8.h>
+#include <Library/ArmLib.h>
+
+ASM_FUNC(ArmPlatformPeiBootAction)
+ ret
+
+//UINTN
+//ArmPlatformGetCorePosition (
+// IN UINTN MpId
+// );
+// With this function: CorePos = (ClusterId * 4) + CoreId
+ASM_FUNC(ArmPlatformGetCorePosition)
+ and x1, x0, #ARM_CORE_MASK
+ and x0, x0, #ARM_CLUSTER_MASK
+ add x0, x1, x0, LSR #6
+ ret
+
+//UINTN
+//ArmPlatformGetPrimaryCoreMpId (
+// VOID
+// );
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
+ ret
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
+ and x0, x0, x1
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
+ cmp w0, w1
+ mov x0, #1
+ mov x1, #0
+ csel x0, x0, x1, eq
+ ret
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH edk2-platforms 7/8] Platform/NXP: Add LX2160ARDB Platform
2020-05-20 3:49 ` [PATCH edk2-platforms 7/8] Platform/NXP: Add LX2160ARDB Platform Pankaj Bansal
@ 2020-05-21 9:33 ` Leif Lindholm
0 siblings, 0 replies; 10+ messages in thread
From: Leif Lindholm @ 2020-05-21 9:33 UTC (permalink / raw)
To: Pankaj Bansal
Cc: Meenakshi Aggarwal, Michael D Kinney, devel, Varun Sethi,
Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
Hi Pankaj,
This set is looking really good - I only have one comment at this
stage: gPlatformGetClockPpi is used in a patch earlier in the series
before it's defined here. While there is no .dsc to permit building
before this patch, it is still counterintuitive (and complicates
review).
So can you please break the ArmPlatformLib out into a separate patch
and order it before the first patch requiring it?
No other comments on this version of the set.
Best Regards,
Leif
On Wed, May 20, 2020 at 09:19:53 +0530, Pankaj Bansal wrote:
> From: Pankaj Bansal <pankaj.bansal@nxp.com>
>
> LX2160A Reference Design Board (RDB) is a high-performance development
> platform that supports the QorIQ LX2160A Layerscape Architecture SOCs.
>
> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
> ---
> Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 23 +++
> Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 46 ++++++
> Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 168 ++++++++++++++++++++
> Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf | 41 +++++
> Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 150 +++++++++++++++++
> Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c | 85 ++++++++++
> Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S | 45 ++++++
> 7 files changed, 558 insertions(+)
>
> diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
> new file mode 100644
> index 000000000000..192eabc5b3f2
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
> @@ -0,0 +1,23 @@
> +# LX2160aRdbPkg.dec
> +# LX2160a board package.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +[Defines]
> + PACKAGE_NAME = LX2160aRdbPkg
> + PACKAGE_GUID = 6eba6648-d853-4eb3-9761-528b82d5ab04
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +# Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +################################################################################
> +[Includes.common]
> + Include # Root include for the package
> diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
> new file mode 100644
> index 000000000000..c292f3b8bff4
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
> @@ -0,0 +1,46 @@
> +# LX2160aRdbPkg.dsc
> +#
> +# LX2160ARDB Board package.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +################################################################################
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +################################################################################
> +[Defines]
> + #
> + # Defines for default states. These can be changed on the command line.
> + # -D FLAG=VALUE
> + #
> + PLATFORM_NAME = LX2160aRdbPkg
> + PLATFORM_GUID = 60169ec4-d2b4-44f8-825e-f8684fd42e4f
> + OUTPUT_DIRECTORY = Build/LX2160aRdbPkg
> + FLASH_DEFINITION = Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> +
> +!include Silicon/NXP/NxpQoriqLs.dsc.inc
> +!include Silicon/NXP/LX2160A/LX2160A.dsc.inc
> +
> +[LibraryClasses.common]
> + ArmPlatformLib|Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> + RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
> +
> +################################################################################
> +#
> +# Components Section - list of all EDK II Modules needed by this Platform
> +#
> +################################################################################
> +[Components.common]
> + #
> + # Architectural Protocols
> + #
> + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
> + <PcdsFixedAtBuild>
> + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE
> + }
> +
> + ##
> diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> new file mode 100644
> index 000000000000..6bd5d86ab2bd
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
> @@ -0,0 +1,168 @@
> +# LX2160aRdbPkg.fdf
> +#
> +# FLASH layout file for LX2160a board.
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +################################################################################
> +#
> +# FD Section
> +# The [FD] Section is made up of the definition statements and a
> +# description of what goes into the Flash Device Image. Each FD section
> +# defines one flash "device" image. A flash device image may be one of
> +# the following: Removable media bootable image (like a boot floppy
> +# image,) an Option ROM image (that would be "flashed" into an add-in
> +# card,) a System "Flash" image (that would be burned into a system's
> +# flash) or an Update ("Capsule") image that will be used to update and
> +# existing system flash.
> +#
> +################################################################################
> +
> +[FD.LX2160ARDB_EFI]
> +BaseAddress = 0x82000000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the FLASH Device.
> +Size = 0x00140000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the FLASH Device
> +ErasePolarity = 1
> +BlockSize = 0x10000
> +NumBlocks = 0x14
> +
> +################################################################################
> +#
> +# Following are lists of FD Region layout which correspond to the locations of different
> +# images within the flash device.
> +#
> +# Regions must be defined in ascending order and may not overlap.
> +#
> +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
> +# the pipe "|" character, followed by the size of the region, also in hex with the leading
> +# "0x" characters. Like:
> +# Offset|Size
> +# PcdOffsetCName|PcdSizeCName
> +# RegionType <FV, DATA, or FILE>
> +#
> +################################################################################
> +0x00000000|0x00140000
> +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
> +FV = FVMAIN_COMPACT
> +
> +!include Platform/NXP/FVRules.fdf.inc
> +################################################################################
> +#
> +# FV Section
> +#
> +# [FV] section is used to define what components or modules are placed within a flash
> +# device file. This section also defines order the components and modules are positioned
> +# within the image. The [FV] section consists of define statements, set statements and
> +# module statements.
> +#
> +################################################################################
> +
> +[FV.FvMain]
> +FvNameGuid = 1037c42b-8452-4c41-aac7-41e6c31468da
> +BlockSize = 0x1
> +NumBlocks = 0 # This FV gets compressed so make it just big enough
> +FvAlignment = 8 # FV alignment and FV attributes setting.
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + INF MdeModulePkg/Core/Dxe/DxeMain.inf
> + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> +
> + #
> + # PI DXE Drivers producing Architectural Protocols (EFI Services)
> + #
> + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +
> + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
> + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
> + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> + INF MdeModulePkg/Universal/Metronome/Metronome.inf
> + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> +
> + #
> + # Multiple Console IO support
> + #
> + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
> + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +
> + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
> +
> + #
> + # FAT filesystem + GPT/MBR partitioning
> + #
> + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> + INF FatPkg/EnhancedFatDxe/Fat.inf
> + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +
> + #
> + # UEFI application (Shell Embedded Boot Loader)
> + #
> + INF ShellPkg/Application/Shell/Shell.inf
> +
> + #
> + # Bds
> + #
> + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> + INF MdeModulePkg/Application/UiApp/UiApp.inf
> +
> +[FV.FVMAIN_COMPACT]
> +FvAlignment = 8
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
> + INF MdeModulePkg/Core/Pei/PeiMain.inf
> + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
> + INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
> + INF ArmPkg/Drivers/CpuPei/CpuPei.inf
> + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
> + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> +
> + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> + SECTION FV_IMAGE = FVMAIN
> + }
> + }
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> new file mode 100644
> index 000000000000..94c88f2be4fb
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
> @@ -0,0 +1,41 @@
> +# @file
> +#
> +# Copyright 2020 NXP
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = PlatformLib
> + FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = ArmPlatformLib
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + Silicon/NXP/NxpQoriqLs.dec
> + Silicon/NXP/Chassis3V2/Chassis3V2.dec
> + Silicon/NXP/LX2160A/LX2160A.dec
> +
> +[LibraryClasses]
> + ArmLib
> + SocLib
> +
> +[Sources.common]
> + ArmPlatformLibMem.c
> + ArmPlatformLib.c
> +
> +[Sources.AArch64]
> + AArch64/ArmPlatformHelper.S
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdArmPrimaryCore
> + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
> +
> +[Ppis]
> + gArmMpCoreInfoPpiGuid
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> new file mode 100644
> index 000000000000..c1bc5510cd6d
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> @@ -0,0 +1,150 @@
> +/** ArmPlatformLib.c
> +*
> +* Contains board initialization functions.
> +*
> +* Copyright 2020 NXP
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Library/ArmLib.h>
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/SocLib.h>
> +
> +#include <Ppi/ArmMpCoreInfo.h>
> +#include <Ppi/NxpPlatformGetClock.h>
> +
> +ARM_CORE_INFO mLX2160aMpCoreInfoTable[] = {
> + {
> + // Cluster 0, Core 0
> + 0x0, 0x0,
> +
> + // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> + (EFI_PHYSICAL_ADDRESS)0,
> + (EFI_PHYSICAL_ADDRESS)0,
> + (EFI_PHYSICAL_ADDRESS)0,
> + (UINT64)0xFFFFFFFF
> + },
> +};
> +
> +/**
> + Return the current Boot Mode
> +
> + This function returns the boot reason on the platform
> +
> +**/
> +EFI_BOOT_MODE
> +ArmPlatformGetBootMode (
> + VOID
> + )
> +{
> + return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +/**
> + Get the clocks supplied by Platform(Board) to NXP Layerscape SOC IPs
> +
> + @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock
> + is to be retrieved.
> + @param[in] ... Variable argument list which is parsed based on
> + ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then
> + the second argument will be interpreted as controller
> + number.
> + if ClockType is NXP_CORE_CLOCK, then second argument
> + is interpreted as cluster number and third argument is
> + interpreted as core number (within the cluster)
> +
> + @return Actual Clock Frequency. Return value 0 should be
> + interpreted as clock not being provided to IP.
> +**/
> +UINT64
> +EFIAPI
> +NxpPlatformGetClock(
> + IN UINT32 ClockType,
> + ...
> + )
> +{
> + UINT64 Clock;
> + VA_LIST Args;
> +
> + Clock = 0;
> +
> + VA_START (Args, ClockType);
> +
> + switch (ClockType) {
> + case NXP_SYSTEM_CLOCK:
> + Clock = 100 * 1000 * 1000; // 100 MHz
> + break;
> + case NXP_I2C_CLOCK:
> + case NXP_UART_CLOCK:
> + Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK);
> + Clock = SocGetClock (Clock, ClockType, Args);
> + break;
> + default:
> + break;
> + }
> +
> + VA_END (Args);
> +
> + return Clock;
> +}
> +
> +/**
> + Initialize controllers that must setup in the normal world
> +
> + This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
> + in the PEI phase.
> +
> +**/
> +EFI_STATUS
> +ArmPlatformInitialize (
> + IN UINTN MpId
> + )
> +{
> + SocInit ();
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +PrePeiCoreGetMpCoreInfo (
> + OUT UINTN *CoreCount,
> + OUT ARM_CORE_INFO **ArmCoreTable
> + )
> +{
> + if (ArmIsMpCore()) {
> + *CoreCount = sizeof(mLX2160aMpCoreInfoTable) / sizeof(ARM_CORE_INFO);;
> + *ArmCoreTable = mLX2160aMpCoreInfoTable;
> + } else {
> + return EFI_UNSUPPORTED;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
> +NXP_PLATFORM_GET_CLOCK_PPI gPlatformGetClockPpi = { NxpPlatformGetClock };
> +
> +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
> + {
> + EFI_PEI_PPI_DESCRIPTOR_PPI,
> + &gArmMpCoreInfoPpiGuid,
> + &mMpCoreInfoPpi
> + }
> +};
> +
> +VOID
> +ArmPlatformGetPlatformPpiList (
> + OUT UINTN *PpiListSize,
> + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
> + )
> +{
> + if (ArmIsMpCore()) {
> + *PpiListSize = sizeof (gPlatformPpiTable);
> + *PpiList = gPlatformPpiTable;
> + } else {
> + *PpiListSize = 0;
> + *PpiList = NULL;
> + }
> +}
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
> new file mode 100644
> index 000000000000..0855003632a3
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
> @@ -0,0 +1,85 @@
> +/** NxpQoriqLsMem.c
> +*
> +* Board memory specific Library.
> +*
> +* Copyright 2020 NXP
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Soc.h>
> +
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6
> +
> +/**
> + Return the Virtual Memory Map of your platform
> +
> + This Virtual Memory Map is used by MemoryInitPei Module to initialize
> + the MMU on your platform.
> +
> + @param VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing
> + a Physical-to-Virtual Memory mapping. This array
> + must be ended by a zero-filled entry
> +
> +**/
> +
> +VOID
> +ArmPlatformGetVirtualMemoryMap (
> + IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap
> + )
> +{
> + UINTN Index;
> + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
> +
> + Index = 0;
> +
> + ASSERT (VirtualMemoryMap != NULL);
> +
> + VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
> + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
> +
> + if (VirtualMemoryTable == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__));
> + return;
> + }
> +
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM0_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM0_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_DRAM0_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
> +
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM1_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM1_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_DRAM1_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
> +
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM2_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM2_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_DRAM2_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
> +
> + // CCSR Space
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_CCSR_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_CCSR_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_CCSR_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> + // FlexSPI
> + VirtualMemoryTable[Index].PhysicalBase = LX2160A_FSPI0_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].VirtualBase = LX2160A_FSPI0_PHYS_ADDRESS;
> + VirtualMemoryTable[Index].Length = LX2160A_FSPI0_SIZE;
> + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> + // End of Table
> + ZeroMem (&VirtualMemoryTable[Index], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
> +
> + ASSERT (Index < MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
> +
> + *VirtualMemoryMap = VirtualMemoryTable;
> +}
> diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
> new file mode 100644
> index 000000000000..b7c6dbdc2e61
> --- /dev/null
> +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
> @@ -0,0 +1,45 @@
> +//
> +// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
> +//
> +// SPDX-License-Identifier: BSD-2-Clause-Patent
> +//
> +//
> +
> +#include <AsmMacroIoLibV8.h>
> +#include <Library/ArmLib.h>
> +
> +ASM_FUNC(ArmPlatformPeiBootAction)
> + ret
> +
> +//UINTN
> +//ArmPlatformGetCorePosition (
> +// IN UINTN MpId
> +// );
> +// With this function: CorePos = (ClusterId * 4) + CoreId
> +ASM_FUNC(ArmPlatformGetCorePosition)
> + and x1, x0, #ARM_CORE_MASK
> + and x0, x0, #ARM_CLUSTER_MASK
> + add x0, x1, x0, LSR #6
> + ret
> +
> +//UINTN
> +//ArmPlatformGetPrimaryCoreMpId (
> +// VOID
> +// );
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
> + ret
> +
> +//UINTN
> +//ArmPlatformIsPrimaryCore (
> +// IN UINTN MpId
> +// );
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> + and x0, x0, x1
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
> + cmp w0, w1
> + mov x0, #1
> + mov x1, #0
> + csel x0, x0, x1, eq
> + ret
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH edk2-platforms 8/8] Platform/NXP/LX2160aRdbPkg: Add VarStore
2020-05-20 3:49 [PATCH edk2-platforms 0/8] Add LX2160ARDB Platform Pankaj Bansal
` (6 preceding siblings ...)
2020-05-20 3:49 ` [PATCH edk2-platforms 7/8] Platform/NXP: Add LX2160ARDB Platform Pankaj Bansal
@ 2020-05-20 3:49 ` Pankaj Bansal
7 siblings, 0 replies; 10+ messages in thread
From: Pankaj Bansal @ 2020-05-20 3:49 UTC (permalink / raw)
To: Leif Lindholm, Meenakshi Aggarwal, Michael D Kinney, devel,
Varun Sethi, Samer El-Haj-Mahmoud, Jon Nettleton, Ard Biesheuvel
From: Pankaj Bansal <pankaj.bansal@nxp.com>
Add VarStore Fd. This Fd is used to store non volatile variables in
flash.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---
Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 1 +
Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc | 91 ++++++++++++++++++++
2 files changed, 92 insertions(+)
diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
index 6bd5d86ab2bd..6f40fa9e566f 100644
--- a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
+++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf
@@ -48,6 +48,7 @@ gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
FV = FVMAIN_COMPACT
!include Platform/NXP/FVRules.fdf.inc
+!include VarStore.fdf.inc
################################################################################
#
# FV Section
diff --git a/Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc b/Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc
new file mode 100644
index 000000000000..76c30580d773
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc
@@ -0,0 +1,91 @@
+## @file
+# FDF include file with FD definition that defines an empty variable store.
+#
+# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
+# Copyright (C) 2014, Red Hat, Inc.
+# Copyright (c) 2016, Linaro, Ltd. All rights reserved.
+# Copyright (c) 2016, Freescale Semiconductor. All rights reserved.
+# Copyright 2017-2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[FD.LX2160aRdbNv_EFI]
+BaseAddress = 0x20500000 #The base address of the FLASH device
+Size = 0x000C0000 #The size in bytes of the FLASH device
+ErasePolarity = 1
+BlockSize = 0x10000
+NumBlocks = 0xC
+
+#
+# Place NV Storage just above Platform Data Base
+#
+DEFINE NVRAM_AREA_VARIABLE_BASE = 0x00000000
+DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x00040000
+DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
+DEFINE FTW_WORKING_SIZE = 0x00040000
+DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
+DEFINE FTW_SPARE_SIZE = 0x00040000
+
+#############################################################################
+# LX2160ARDB NVRAM Area
+# LX2160ARDB NVRAM Area contains: Variable + FTW Working + FTW Spare
+#############################################################################
+
+
+$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+#NV_VARIABLE_STORE
+DATA = {
+ ## This is the EFI_FIRMWARE_VOLUME_HEADER
+ # ZeroVector []
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ # FileSystemGuid: gEfiSystemNvDataFvGuid =
+ # { 0xFFF12B8D, 0x7696, 0x4C8B,
+ # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
+ 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
+ 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
+ # FvLength: Flash Size : 0x4000000
+ 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00,
+ # Signature "_FVH" # Attributes
+ 0x5f, 0x46, 0x56, 0x48, 0x36, 0x0E, 0x00, 0x00,
+ # HeaderLength # CheckSum # ExtHeaderOffset #Reserved #Revision
+ 0x48, 0x00, 0x08, 0xA6, 0x00, 0x00, 0x00, 0x02,
+ # Blockmap[0]: 0x4000 Blocks * 0x1000 Bytes / Block = SIZE_64MB
+ 0x00, 0x40, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
+ # Blockmap[1]: End
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ ## This is the VARIABLE_STORE_HEADER
+ # It is compatible with SECURE_BOOT_ENABLE == FALSE as well.
+ # Signature: gEfiVariableGuid =
+ # { 0xddcf3616, 0x3275, 0x4164,
+ # { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
+ 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
+ 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+ # Size: 0x40000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) -
+ # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x3ffb8
+ # This can speed up the Variable Dispatch a bit.
+ 0xB8, 0xFF, 0x03, 0x00,
+ # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
+ 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+}
+
+$(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+#NV_FTW_WORKING
+DATA = {
+ # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
+ # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
+ 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
+ 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,
+ # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
+ 0x5b, 0xe7, 0xc6, 0x86, 0xFE, 0xFF, 0xFF, 0xFF,
+ # WriteQueueSize: UINT64
+ 0xE0, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00
+}
+
+$(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+#NV_FTW_SPARE
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread