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X-MS-Exchange-AntiSpam-MessageData: M1ATzaXN58UshBqx+tINaYOjn7EgSt/i8NurB5X7+t/acLD3Aad9BnztkFscrGKLCGzy9pipEKTb6/BDcZDCpjID3/srWv0BJ4dr66kXkB/QHG8mt7zJN41kfLIyiHt4i/SM0Y5xgFzqfMkt8F3La4CVvBSssqK01fV5ajp5ahOLH9kXDcnUWxWt1UKlRVZT6N586exChkhsIvE1wLbrklQX7mVWxKitH3ADhDsOHVlollekWl0aQZQSn4YIe1FFGOkHa5vUrAM0CnCw1JicBm5tQ4hBazEClNzG13v4ZK+Yc1F5MDN5JJruW1z45Aq98pyzXNQYr9hwoiuE62ziROWAtB5wOb2/IaNUT9lVW5FPOR5UaS8OYor7jQeLtfJg6SbfzPptTwY6uz+joEuTD9qxu9OrM4C9hu59dDyar+kmVhwn6hDTaHDuVFPVIIVhM/hx557hwp130SgsrkxGyvleRYlq8lys7x9CeWtA7v4= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 64719994-dc1a-4334-5672-08d8021b5f56 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2020 08:53:06.2110 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: YFE/XLwEOQZnXLAkzuPmrwcaFpIMX26R87S+8FkOBgznK0Na+oKXsn7zaxUyqCz8nYw8Nzs2ze3YAOh8EeAQnw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB3181 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Pankaj Bansal In NXP SOCs the UART clock is derived from System clock after PLL multiplication. Therefore, add the PL011UartClockLib implementation for NXP platforms. Signed-off-by: Pankaj Bansal --- Notes: V2: - No change Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf | 24 +++++++++= +++++++++++ Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c | 22 +++++++++= +++++++++ 2 files changed, 46 insertions(+) diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf b/= Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf new file mode 100644 index 000000000000..b771dba7697f --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf @@ -0,0 +1,24 @@ +#/* @file +# Copyright 2018, 2020 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D PL011UartClockLib + FILE_GUID =3D af8fef24-afbb-472a-b8b7-13101a79703c + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PL011UartClockLib + +[Packages] + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[Sources.common] + PL011UartClockLib.c + +[LibraryClasses] + ArmPlatformLib diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c b/Si= licon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c new file mode 100644 index 000000000000..3814685585eb --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c @@ -0,0 +1,22 @@ +/** @file +* +* Copyright 2018, 2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include + +/** + Return clock in for PL011 Uart IP +**/ +UINT32 +EFIAPI +PL011UartClockGetFreq ( + VOID + ) +{ + return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0); +} --=20 2.17.1