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X-MS-Exchange-AntiSpam-MessageData: ex1athFmdFKPhDWnEIFQDMpI3zx/yIAzp1wlYAf+JT3829s7yZke8IhHpxVJ+nme4x25KBrIVdezIiGTYMCSs9Y4Xoz3Z9bt06WAfvg9gYSGgxUqqmB68v+b2VQmnh5yzTKDrDrzaZqmXGA1zZkLXNGatTh2SsrBy/uYeyU8qAyPkLF2EFE593TD3xOhhM43X3IDCEdsoclIQ+aqmwSa2Odl+NUKwhPsW7S9NEpRjLn7sieMskXtKMxKBuxQoUXxvp5DeXqv+GieYeWavrP53kpz/dF8PVVzU9LRZrK1+w5WPjqn7KTF9ZenE8LB3JNrm3IXY/UrqpLQxV7ejB/tO6wQ8G4kLcBJm1hCGZP6TTeV/LVKyh43/JEsW/bSN84ZqCDx6Qz/FkpRQqgKkBn4kW/QbwvfDP01R4U9wg0o5gBYbu1C2zy7SGyhO9CBpeXmSrh2Q6h1o7jgvd+/qwbuVGm5J/SPknPQiGH/wj/2Enc= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 73da74fb-0c51-4acf-3513-08d8039499d0 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 May 2020 05:53:24.5816 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NVv0yB4Io/i1uG/R2OvQ8qCLjxDzNdoKBK2YJOTwD2GiGNo5yQTZ3oBX48X6VfaCwyAWWhxRxhd63XRhJCunPw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5598 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Pankaj Bansal In NXP SOCs the UART clock is derived from System clock after PLL multiplication. Therefore, add the PL011UartClockLib implementation for NXP platforms. Signed-off-by: Pankaj Bansal Reviewed-by: Leif Lindholm --- Notes: V3: - No change =20 V2: - No change Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf | 24 +++++++++= +++++++++++ Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c | 22 +++++++++= +++++++++ 2 files changed, 46 insertions(+) diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf b/= Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf new file mode 100644 index 000000000000..b771dba7697f --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf @@ -0,0 +1,24 @@ +#/* @file +# Copyright 2018, 2020 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D PL011UartClockLib + FILE_GUID =3D af8fef24-afbb-472a-b8b7-13101a79703c + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PL011UartClockLib + +[Packages] + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[Sources.common] + PL011UartClockLib.c + +[LibraryClasses] + ArmPlatformLib diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c b/Si= licon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c new file mode 100644 index 000000000000..3814685585eb --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c @@ -0,0 +1,22 @@ +/** @file +* +* Copyright 2018, 2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include + +/** + Return clock in for PL011 Uart IP +**/ +UINT32 +EFIAPI +PL011UartClockGetFreq ( + VOID + ) +{ + return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0); +} --=20 2.17.1