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X-MS-Exchange-AntiSpam-MessageData: isDdA1TQLpw+4hRSJxe+36J8QPSx0N/7/Fu2Hz/ZVJ4qwSKFJ2/MGOy67Ti5M8pxNHwARVgLihYoPaUx6HyTc7jRHcLHfVTAK3OMDNnBniJtBzbbnkmfkAL3g1NdcKBRPuGqQtggmWbdKTJZrXnNJS5oR49sLrCDFBpddhKy0Vaa96izvnJdVCnHC9xKyWqd6IudPN7lknC9EiUbZQkfQN22KRDVVkCCLxiHIw4G6AUyP0/XE5de1KCQVM1M1mXMWBZZgSPC7TvPRoI1OBQjBT1sfIuLscttlOhAFBvyxyFVFs137VqcgzOhWZgREF0qSd4uGJyIjnWuPSkyMivlQFxjEvauYt2ZjssgyQIuq2tPpAEMP/hQeZuagJgdfk7g2k9LO6FfCsmGkF5jhSkIzjcScVOXkQGeVPT9k7aNSHstMH6NdnvVmCJydqENGW1r7Zsfv/NkqmncyaoWVNUKEyDBQM5ICkdMWImA8uuS1zo= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b25128c0-3164-4e08-2ae4-08d80630c150 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2020 13:36:14.7686 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Q6qjKzcle1V5St4G+x1i8ypct4rZGCL9/Pm3JdYJBI0CMisbYXeD0Dox/cVKliz2aPQuJt3Xx/AuFZBKs3vJng== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6096 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Pankaj Bansal Add ArmPlatformLib for LX2160ARDB platform that is based on ArmPlatformPkg/Library/ArmPlatformLibNull. Apart from the the interfaces exposed by ArmPlatformLibNull, this library also implements gPlatformGetClockPpi, which is specific to NXP SOCs' based platforms. Refer edk2-platforms/Silicon/NXP/Include/Ppi/NxpPlatformGetClock.h for the details. Signed-off-by: Pankaj Bansal Reviewed-by: Leif Lindholm --- Notes: V4: - Sorted [Packages] and [FixedPcd] alphabetically in Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf =20 V3: - split Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ in two parts part containing gPlatformGetClockPpi is put before PL011UartClockLib implementation. =20 V2: - No change Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf = | 39 ++++++ Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c = | 145 ++++++++++++++++++++ Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c = | 28 ++++ Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelpe= r.S | 45 ++++++ 4 files changed, 257 insertions(+) diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformL= ib.inf b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.i= nf new file mode 100644 index 000000000000..53d8af58925a --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf @@ -0,0 +1,39 @@ +#/* @file +# Copyright 2018, 2020 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D PlatformLib + FILE_GUID =3D d1361285-8a47-421c-9efd-6b262c9093fc + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D ArmPlatformLib + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[LibraryClasses] + ArmLib + DebugLib + +[Sources.common] + ArmPlatformLib.c + ArmPlatformLibMem.c + +[Sources.AArch64] + AArch64/ArmPlatformHelper.S + +[FixedPcd] + gArmTokenSpaceGuid.PcdArmPrimaryCore + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask + +[Ppis] + gArmMpCoreInfoPpiGuid diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformL= ib.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c new file mode 100644 index 000000000000..806cfd180bee --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c @@ -0,0 +1,145 @@ +/** @file +* +* Copyright 2018-2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include + +#include +#include + +ARM_CORE_INFO mLX2160aMpCoreInfoTable[] =3D { + { + // Cluster 0, Core 0 + 0x0, 0x0, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (UINT64)0xFFFFFFFF + } +}; + +/** + Return the current Boot Mode + + This function returns the boot reason on the platform + +**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +/** + Get the clocks supplied by Platform(Board) to NXP Layerscape SOC IPs + + @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP= clock + is to be retrieved. + @param[in] ... Variable argument list which is parsed based on + ClockType. e.g. if the ClockType is NXP_I2C_CLOCK= , then + the second argument will be interpreted as contro= ller + number. + if ClockType is NXP_CORE_CLOCK, then second argum= ent + is interpreted as cluster number and third argume= nt is + interpreted as core number (within the cluster) + + @return Actual Clock Frequency. Return value 0 should be + interpreted as clock not being provided to IP. +**/ +UINT64 +EFIAPI +NxpPlatformGetClock( + IN UINT32 ClockType, + ... + ) +{ + UINT64 Clock; + VA_LIST Args; + + Clock =3D 0; + + VA_START (Args, ClockType); + + switch (ClockType) { + case NXP_SYSTEM_CLOCK: + Clock =3D 100 * 1000 * 1000; // 100 MHz + break; + case NXP_I2C_CLOCK: + case NXP_UART_CLOCK: + Clock =3D NxpPlatformGetClock (NXP_SYSTEM_CLOCK); + break; + default: + break; + } + + VA_END (Args); + + return Clock; +} + +/** + Initialize controllers that must setup in the normal world + + This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/Pl= atformPei + in the PEI phase. + +**/ +EFI_STATUS +ArmPlatformInitialize ( + IN UINTN MpId + ) +{ + //TODO: Implement me + + return EFI_SUCCESS; +} + +EFI_STATUS +PrePeiCoreGetMpCoreInfo ( + OUT UINTN *CoreCount, + OUT ARM_CORE_INFO **ArmCoreTable + ) +{ + if (ArmIsMpCore()) { + *CoreCount =3D sizeof(mLX2160aMpCoreInfoTable) / sizeof(ARM_CORE_IN= FO); + *ArmCoreTable =3D mLX2160aMpCoreInfoTable; + return EFI_SUCCESS; + } else { + return EFI_UNSUPPORTED; + } +} + +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { PrePeiCoreGetMpCoreInfo }; +NXP_PLATFORM_GET_CLOCK_PPI gPlatformGetClockPpi =3D { NxpPlatformGetClock = }; + +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D { + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &gArmMpCoreInfoPpiGuid, + &mMpCoreInfoPpi + } +}; + +VOID +ArmPlatformGetPlatformPpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ) +{ + if (ArmIsMpCore()) { + *PpiListSize =3D sizeof(gPlatformPpiTable); + *PpiList =3D gPlatformPpiTable; + } else { + *PpiListSize =3D 0; + *PpiList =3D NULL; + } +} diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformL= ibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibM= em.c new file mode 100644 index 000000000000..ad6862dd81eb --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c @@ -0,0 +1,28 @@ +/** @file +* +* Copyright 2018, 2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include + +/** + Return the Virtual Memory Map of your platform + + This Virtual Memory Map is used by MemoryInitPei Module to initialize th= e MMU on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR = describing a Physical-to- + Virtual Memory mapping. This array mus= t be ended by a zero-filled + entry + +**/ +VOID +ArmPlatformGetVirtualMemoryMap ( + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap + ) +{ + ASSERT(0); +} diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmP= latformHelper.S b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64= /ArmPlatformHelper.S new file mode 100644 index 000000000000..b7c6dbdc2e61 --- /dev/null +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatform= Helper.S @@ -0,0 +1,45 @@ +// +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. +// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// + +#include +#include + +ASM_FUNC(ArmPlatformPeiBootAction) + ret + +//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos =3D (ClusterId * 4) + CoreId +ASM_FUNC(ArmPlatformGetCorePosition) + and x1, x0, #ARM_CORE_MASK + and x0, x0, #ARM_CLUSTER_MASK + add x0, x1, x0, LSR #6 + ret + +//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) + ret + +//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_FUNC(ArmPlatformIsPrimaryCore) + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) + and x0, x0, x1 + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) + cmp w0, w1 + mov x0, #1 + mov x1, #0 + csel x0, x0, x1, eq + ret --=20 2.17.1