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X-MS-Exchange-AntiSpam-MessageData: uIU0dpky67J012tRGP4JRvcerRfG+4nBsiV7h4mmmpCurJFeV77Y3LqI4WUJ2yObuCy7e701ySjsl7LJM+aTjkQa+MEh92Cp+b3coFix6ifaPDIBgv/smZz4h6IaN9lXWEnqAOrzNo0ztdjtrh/EGr7TsXbLp8OBXkVarsbeVmlxmaIZTLhtZcLHuzchEiO+FEuTBhwO5v5vzSN4ZKJt6DmHBwp8gkCbuWvtjVzpcTEflkxRk26+FxMeKFszb2FDMqIKcvCugKYwlKpkAcK/l9ZGIvg5oQ5n5zZi65cGXteNgEOdc+QYnGoCTX0zS/k1s+csW1N2xyUdAafkBOdFs0jq3ZnbjcpaoU1nT5n/Rbs0c401R8azu9QE5VX6gwJTEKs+T1BBRvfGXaD3yFWXoCuLh/4UHajtNf7+oHkfNLMKyi0j1F7B+s4nVKn5/jX2GQny6TVG4X8xf0IADzHp6cAA9CtDPJgncj330JK7T2c= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8dfd3c10-5ebc-4761-7c90-08d80630c31d X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2020 13:36:18.1087 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 9t06lmlnk9BolzOC5hIBJpbNGnZGI/Mh3ff9/5wRFpH6oLW9lZ4EtUG7WZvW9cFIT6w3yP1lMr1qW9DmK7Svxw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB6096 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Pankaj Bansal In NXP SOCs the UART clock is derived from System clock after PLL multiplication. Therefore, add the PL011UartClockLib implementation for NXP platforms. Signed-off-by: Pankaj Bansal Reviewed-by: Leif Lindholm --- Notes: V4: - No change =20 V3: - No change =20 V2: - No change Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf | 24 +++++++++= +++++++++++ Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c | 22 +++++++++= +++++++++ 2 files changed, 46 insertions(+) diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf b/= Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf new file mode 100644 index 000000000000..b771dba7697f --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf @@ -0,0 +1,24 @@ +#/* @file +# Copyright 2018, 2020 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#*/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D PL011UartClockLib + FILE_GUID =3D af8fef24-afbb-472a-b8b7-13101a79703c + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PL011UartClockLib + +[Packages] + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[Sources.common] + PL011UartClockLib.c + +[LibraryClasses] + ArmPlatformLib diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c b/Si= licon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c new file mode 100644 index 000000000000..3814685585eb --- /dev/null +++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c @@ -0,0 +1,22 @@ +/** @file +* +* Copyright 2018, 2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include +#include + +/** + Return clock in for PL011 Uart IP +**/ +UINT32 +EFIAPI +PL011UartClockGetFreq ( + VOID + ) +{ + return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0); +} --=20 2.17.1