From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by mx.groups.io with SMTP id smtpd.web12.43510.1591034421378779008 for ; Mon, 01 Jun 2020 11:00:21 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=Mn3r3OOU; spf=pass (domain: nuviainc.com, ip: 209.85.128.68, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f68.google.com with SMTP id l26so384725wme.3 for ; Mon, 01 Jun 2020 11:00:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=g+7ZV12Dp+mXh4PsJiXHVIkBPDZE9QqnXK4RNNOzCR0=; b=Mn3r3OOU0ed54XAsk13Gs7XR8k7wGMQxBgpOYFqhf3lyrzqFg25D9ffY4n9P2prRSs daaXD+i6IJCZKMNoLJvRqJDDqfHtk/mqbc4PX67lv4GcFPqzQnkb+jkghuSNSlhw1vo0 A7X2JG3FsMpmO104r9Lokcg7ohWOFU1yGfFydUVmLZcJZ5ab4Ef5TPc9sQ8XCi6CVBO7 509Z57XOLFMrebsIKvYNohSCCfYZJr1WWUuyn3MNdj0EG+u6Bq7k42UK0YiY67HbK3PA p3ZtUGK10haKoxz0R6JQHSatbn7GaAZllD/wlArXbx+0tZ2DTw6oa+TGoskZeV4PdSGa 7NbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=g+7ZV12Dp+mXh4PsJiXHVIkBPDZE9QqnXK4RNNOzCR0=; b=Ct+czvGe+SmKvax72SVbH/9XtYwGTYo4bKn0MOKYD7uqP5Xct3FGrmU+LdqdIISCPm szmhXDclGRlpdH577ERXiLQq29FnryF009vFfSxiGSgxhwujzd9bZ0ZzvG9GZQ0FHByH WLi8f+0J5UR5T6hkxfLRseKB+eN3+FOHhuQ91lVoD+naE24KPTdIYFYhMfi+Bd2E/lZw Q8V/ttI3kaCL1TEfez2lnFG3mBcnyPlOzdxsTcgFaBwthq7DM69+ycVoYctn1jgoJbdv xp58BR5exXCA6TxSwIARybK4IYHnX90OZeiW+hjWKhMwHcZp1AMbQyOI8Qfbxil+9xnH SN5Q== X-Gm-Message-State: AOAM531Jx9KG2VtCP6EbaWxJuvBJarx7/uvnz/WWfRaLl1yO425u5x1s XgUX59ZFuS8hMtQeXbppn/dcCA== X-Google-Smtp-Source: ABdhPJwdCkusPIxZrWXToDF2LkiYKjxL1B8UPNnjIX95Ns4ISrJG8W/bsjAS6bVcZ0G3lBhmKmm3lA== X-Received: by 2002:a1c:65c2:: with SMTP id z185mr404157wmb.125.1591034419803; Mon, 01 Jun 2020 11:00:19 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id m24sm160664wmi.14.2020.06.01.11.00.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Jun 2020 11:00:19 -0700 (PDT) Date: Mon, 1 Jun 2020 19:00:16 +0100 From: "Leif Lindholm" To: Pankaj Bansal Cc: Meenakshi Aggarwal , Michael D Kinney , devel@edk2.groups.io, Varun Sethi , Samer El-Haj-Mahmoud , Jon Nettleton , Ard Biesheuvel Subject: Re: [PATCH edk2-platforms v4 09/10] Platform/NXP: Add LX2160ARDB Platform Message-ID: <20200601180016.GG28566@vanye> References: <20200601133439.5711-1-pankaj.bansal@oss.nxp.com> <20200601133439.5711-10-pankaj.bansal@oss.nxp.com> MIME-Version: 1.0 In-Reply-To: <20200601133439.5711-10-pankaj.bansal@oss.nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Jun 01, 2020 at 19:04:38 +0530, Pankaj Bansal wrote: > From: Pankaj Bansal > > LX2160A Reference Design Board (RDB) is a high-performance development > platform that supports the QorIQ LX2160A Layerscape Architecture SOCs. > > Signed-off-by: Pankaj Bansal > --- > > Notes: > V4: > - Alphabetically sorted Packages in > Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf - Change BlockSize and NumBlocks attributes for FD.LX2160ARDB_EFI. > > V3: > - Alphabetically sorted LibraryClasses in > Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > > V2: > - split Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ in two parts > part containing gPlatformGetClockPpi is put before PL011UartClockLib > implementation. > > Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 23 +++ > Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 46 ++++++ > Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 168 ++++++++++++++++++++ > Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf | 3 + > Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 4 +- > Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c | 54 ++++++- > 6 files changed, 296 insertions(+), 2 deletions(-) > > diff --git a/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf > new file mode 100644 > index 000000000000..13ad6e73cd48 > --- /dev/null > +++ b/Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf > @@ -0,0 +1,168 @@ > +# LX2160aRdbPkg.fdf > +# > +# FLASH layout file for LX2160a board. > +# > +# Copyright 2018-2020 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > + > +################################################################################ > +# > +# FD Section > +# The [FD] Section is made up of the definition statements and a > +# description of what goes into the Flash Device Image. Each FD section > +# defines one flash "device" image. A flash device image may be one of > +# the following: Removable media bootable image (like a boot floppy > +# image,) an Option ROM image (that would be "flashed" into an add-in > +# card,) a System "Flash" image (that would be burned into a system's > +# flash) or an Update ("Capsule") image that will be used to update and > +# existing system flash. > +# > +################################################################################ > + > +[FD.LX2160ARDB_EFI] > +BaseAddress = 0x82000000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the FLASH Device. > +Size = 0x00140000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the FLASH Device > +ErasePolarity = 1 > +BlockSize = 0x1000 > +NumBlocks = 0x140 In v3 (and v1, so I'll assume also in v2), this was 0x10000 and 0x14. This change may or may not be an improvement, but it is not something that should change as part of a version step describing only a sort order change in a .inf. I have reverted these values back to their v1-v3 original. If you want to change them, please submit that as a separate patch. With that - for remaining patches: Reviewed-by: Leif Lindholm Series pushed as dae68d51c5df..c5b2d12eb826. / Leif > + > +################################################################################ > +# > +# Following are lists of FD Region layout which correspond to the locations of different > +# images within the flash device. > +# > +# Regions must be defined in ascending order and may not overlap. > +# > +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by > +# the pipe "|" character, followed by the size of the region, also in hex with the leading > +# "0x" characters. Like: > +# Offset|Size > +# PcdOffsetCName|PcdSizeCName > +# RegionType > +# > +################################################################################ > +0x00000000|0x00140000 > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > +FV = FVMAIN_COMPACT > + > +!include Platform/NXP/FVRules.fdf.inc > +################################################################################ > +# > +# FV Section > +# > +# [FV] section is used to define what components or modules are placed within a flash > +# device file. This section also defines order the components and modules are positioned > +# within the image. The [FV] section consists of define statements, set statements and > +# module statements. > +# > +################################################################################ > + > +[FV.FvMain] > +FvNameGuid = 1037c42b-8452-4c41-aac7-41e6c31468da > +BlockSize = 0x1 > +NumBlocks = 0 # This FV gets compressed so make it just big enough > +FvAlignment = 8 # FV alignment and FV attributes setting. > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > + > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > + > + # > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > + # > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > + > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf > + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf > + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > + INF MdeModulePkg/Universal/Metronome/Metronome.inf > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > + > + # > + # Multiple Console IO support > + # > + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > + > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf > + > + # > + # FAT filesystem + GPT/MBR partitioning > + # > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > + INF FatPkg/EnhancedFatDxe/Fat.inf > + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > + > + # > + # UEFI application (Shell Embedded Boot Loader) > + # > + INF ShellPkg/Application/Shell/Shell.inf > + > + # > + # Bds > + # > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > + INF MdeModulePkg/Application/UiApp/UiApp.inf > + > +[FV.FVMAIN_COMPACT] > +FvAlignment = 8 > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > + > + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > + INF MdeModulePkg/Core/Pei/PeiMain.inf > + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf > + INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf > + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf > + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf > + INF ArmPkg/Drivers/CpuPei/CpuPei.inf > + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf > + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > + > + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { > + SECTION FV_IMAGE = FVMAIN > + } > + } > diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > index 53d8af58925a..e1ab682c1976 100644 > --- a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > @@ -18,11 +18,14 @@ > ArmPlatformPkg/ArmPlatformPkg.dec > MdeModulePkg/MdeModulePkg.dec > MdePkg/MdePkg.dec > + Silicon/NXP/Chassis3V2/Chassis3V2.dec > + Silicon/NXP/LX2160A/LX2160A.dec > Silicon/NXP/NxpQoriqLs.dec > > [LibraryClasses] > ArmLib > DebugLib > + SocLib > > [Sources.common] > ArmPlatformLib.c > diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c > index 806cfd180bee..f3f1e5b3f220 100644 > --- a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c > +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c > @@ -8,6 +8,7 @@ > > #include > #include > +#include > > #include > #include > @@ -76,6 +77,7 @@ NxpPlatformGetClock( > case NXP_I2C_CLOCK: > case NXP_UART_CLOCK: > Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK); > + Clock = SocGetClock (Clock, ClockType, Args); > break; > default: > break; > @@ -98,7 +100,7 @@ ArmPlatformInitialize ( > IN UINTN MpId > ) > { > - //TODO: Implement me > + SocInit (); > > return EFI_SUCCESS; > } > diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c > index ad6862dd81eb..391dab265ad7 100644 > --- a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c > +++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c > @@ -7,7 +7,12 @@ > **/ > > #include > +#include > #include > +#include > +#include > + > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6 > > /** > Return the Virtual Memory Map of your platform > @@ -24,5 +29,52 @@ ArmPlatformGetVirtualMemoryMap ( > IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > ) > { > - ASSERT(0); > + UINTN Index; > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > + > + Index = 0; > + > + ASSERT (VirtualMemoryMap != NULL); > + > + VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * > + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > + > + if (VirtualMemoryTable == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__)); > + return; > + } > + > + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LX2160A_DRAM0_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > + > + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM1_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM1_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LX2160A_DRAM1_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > + > + VirtualMemoryTable[Index].PhysicalBase = LX2160A_DRAM2_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LX2160A_DRAM2_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LX2160A_DRAM2_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > + > + // CCSR Space > + VirtualMemoryTable[Index].PhysicalBase = LX2160A_CCSR_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LX2160A_CCSR_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LX2160A_CCSR_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // FlexSPI > + VirtualMemoryTable[Index].PhysicalBase = LX2160A_FSPI0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LX2160A_FSPI0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LX2160A_FSPI0_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // End of Table > + ZeroMem (&VirtualMemoryTable[Index], sizeof (ARM_MEMORY_REGION_DESCRIPTOR)); > + > + ASSERT (Index < MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > + > + *VirtualMemoryMap = VirtualMemoryTable; > } > -- > 2.17.1 >