From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from huawei.com (huawei.com [185.176.76.210]) by mx.groups.io with SMTP id smtpd.web10.2659.1591691032875505568 for ; Tue, 09 Jun 2020 01:23:53 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: huawei.com, ip: 185.176.76.210, mailfrom: jonathan.cameron@huawei.com) Received: from lhreml710-chm.china.huawei.com (unknown [172.18.7.108]) by Forcepoint Email with ESMTP id 40C4CE4B2D0F87F98DD0; Tue, 9 Jun 2020 09:23:49 +0100 (IST) Received: from localhost (10.47.27.61) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Tue, 9 Jun 2020 09:23:48 +0100 Date: Tue, 9 Jun 2020 09:23:05 +0100 From: "Jonathan Cameron" To: Wasim Khan CC: , , , , , Wasim Khan Subject: Re: [edk2-devel] [PATCH edk2-platforms v5 0/3] Add SerDes Support Message-ID: <20200609092305.0000338b@Huawei.com> In-Reply-To: <1591642355-26470-1-git-send-email-wasim.khan@oss.nxp.com> References: <1591642355-26470-1-git-send-email-wasim.khan@oss.nxp.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; i686-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.47.27.61] X-ClientProxiedBy: lhreml745-chm.china.huawei.com (10.201.108.195) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit On Tue, 9 Jun 2020 00:22:32 +0530 Wasim Khan wrote: > From: Wasim Khan Hi Wasim, Minor moan, please put a prefix on the patch description so those of us who scan read EDK2 lists don't have to open the thread to find out what SoC this applies to. Silicon/NXP: as done for the patches would work well but anything similar to ensure the title of the cover letter isn't generic would be fine. Thanks, Jonathan > > NXP SoCs supports different Serdes protocols using reset > configuration word (RCW). > Based on Serdes protocol value in reset configuration word (RCW) > different IP blocks gets enabled in HW. > > This patch series implements SerDesHelperLib and provide SoC specific > serdes configuration for LS1043A, which can be used by different IPs > (Ex: PCIe) to know the enabled interfaces and perform the required > initialization. > > V1 Series can be referred here: > https://edk2.groups.io/g/devel/message/60542 > > V2 Series can be referred here: > https://edk2.groups.io/g/devel/message/60836 > > V3 Series can be referred here: > https://edk2.groups.io/g/devel/message/60901 > > Changes in V4: > - Included SocSerDes.h , which got missed in V3 > > Changes in V5: > - Corrected enum value and CheckPatch fix > > Wasim Khan (3): > Silicon/NXP/Library: Implement SerDesHelperLib > Silicon/NXP: LS1043A: Add SerDes Support > Silicon/NXP: PciHostBridgeLib: Initialize only enabled PCIe > controllers > > Silicon/NXP/NxpQoriqLs.dec | 1 + > Silicon/NXP/LS1043A/LS1043A.dsc.inc | 2 + > Silicon/NXP/LS1043A/Library/SocLib/SocLib.inf | 6 + > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 1 + > Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.inf | 28 ++++ > Silicon/NXP/Include/Library/SerDes.h | 28 ++++ > Silicon/NXP/Include/Library/SerDesHelperLib.h | 64 ++++++++ > Silicon/NXP/LS1043A/Include/SocSerDes.h | 33 ++++ > Silicon/NXP/LS1043A/Library/SocLib/SerDes.c | 119 ++++++++++++++ > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c | 35 ++++- > Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.c | 164 ++++++++++++++++++++ > 11 files changed, 480 insertions(+), 1 deletion(-) > create mode 100644 Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.inf > create mode 100644 Silicon/NXP/Include/Library/SerDes.h > create mode 100644 Silicon/NXP/Include/Library/SerDesHelperLib.h > create mode 100644 Silicon/NXP/LS1043A/Include/SocSerDes.h > create mode 100644 Silicon/NXP/LS1043A/Library/SocLib/SerDes.c > create mode 100644 Silicon/NXP/Library/SerDesHelperLib/SerDesHelperLib.c >