[PATCH edk2-platforms 0/8] Silicon/NXP: Add SVR and DEVDISRn configuration

[PATCH edk2-platforms 0/8] Silicon/NXP: Add SVR and DEVDISRn configuration

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

System Version Register(SVR) is used to provide the SoC details
like Manufacturer ID, SoC Family, SoC major and minor version
etc.
DEVDISRn is used to disable unused peripherals.

This patch series update device configuration structure (DCFG)
for SVR and DEVDISRn for LS1043A (Chassis2) and LX2160A (Chassis3V2)

Wasim Khan (8):
  Silicon/NXP: Chassis2: Add SVR and DEVDISRn device configuration
  Silicon/NXP: Chassis2: define SVR macros
  Silicon/NXP: LS1043A: Define SVR for LS1043A SoC
  Silicon/NXP: LS1043A: Add SocGetSvr API
  Silicon/NXP: Chassis3V2: Add SVR and DEVDISRn in device configuration
  Silicon/NXP: Chassis3V2: define SVR macros
  Silicon/NXP: LX2160A: Define SVR for LX2160A SoC
  Silicon/NXP: LX2160A: Add SocGetSvr API

 Silicon/NXP/Chassis2/Include/Chassis.h      | 14 +++++++++++++-
 Silicon/NXP/Chassis3V2/Include/Chassis.h    | 16 +++++++++++++++-
 Silicon/NXP/Include/Library/SocLib.h        |  7 +++++++
 Silicon/NXP/LS1043A/Include/Soc.h           |  3 +++
 Silicon/NXP/LX2160A/Include/Soc.h           |  3 +++
 Silicon/NXP/LS1043A/Library/SocLib/SocLib.c | 14 ++++++++++++++
 Silicon/NXP/LX2160A/Library/SocLib/SocLib.c | 14 ++++++++++++++
 7 files changed, 69 insertions(+), 2 deletions(-)

-- 
2.7.4

[PATCH edk2-platforms 1/8] Silicon/NXP: Chassis2: Add SVR and DEVDISRn device configuration

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

System Version Register(SVR) is used to provide the SoC details
like Manufacturer ID, SoC Family, SoC major and minor version
etc.
DEVDISRn is used to disable unused peripherals.

Update Device Configuration structure for SVR and DEVDISRn.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/Chassis2/Include/Chassis.h | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/Silicon/NXP/Chassis2/Include/Chassis.h b/Silicon/NXP/Chassis2/Include/Chassis.h
index 14e21ef9daf4..e5edd80134a4 100644
--- a/Silicon/NXP/Chassis2/Include/Chassis.h
+++ b/Silicon/NXP/Chassis2/Include/Chassis.h
@@ -28,7 +28,15 @@
 **/
 #pragma pack(1)
 typedef struct {
-  UINT8   Reserved0[0x100 - 0x0];
+  UINT8   Reserved0[0x70 - 0x0];
+  UINT32  DeviceDisableRegister1;  // Device Disable Register 1
+  UINT32  DeviceDisableRegister2;  // Device Disable Register 2
+  UINT32  DeviceDisableRegister3;  // Device Disable Register 3
+  UINT32  DeviceDisableRegister4;  // Device Disable Register 4
+  UINT32  DeviceDisableRegister5;  // Device Disable Register 5
+  UINT8   Reserved1[0xa4 - 0x84];
+  UINT32  Svr;                     // System Version Register
+  UINT8   Reserved2[0x100 - 0xa8];
   UINT32  RcwSr[16]; // Reset Control Word Status Register
 } NXP_LAYERSCAPE_CHASSIS2_DEVICE_CONFIG;
 #pragma pack()
-- 
2.7.4

[PATCH edk2-platforms 2/8] Silicon/NXP: Chassis2: define SVR macros

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

Define macros to retrieve System Version Register(SVR)
related information

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/Chassis2/Include/Chassis.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Silicon/NXP/Chassis2/Include/Chassis.h b/Silicon/NXP/Chassis2/Include/Chassis.h
index e5edd80134a4..7e8bf224884b 100644
--- a/Silicon/NXP/Chassis2/Include/Chassis.h
+++ b/Silicon/NXP/Chassis2/Include/Chassis.h
@@ -12,6 +12,10 @@
 
 #define  NXP_LAYERSCAPE_CHASSIS2_DCFG_ADDRESS  0x1EE0000
 
+#define SVR_SOC_VER(svr)            (((svr) >> 8) & 0xFFFFFE)
+#define SVR_MAJOR(svr)              (((svr) >> 4) & 0xf)
+#define SVR_MINOR(svr)              (((svr) >> 0) & 0xf)
+
 /* SMMU Defintions */
 #define SMMU_BASE_ADDR             0x09000000
 #define SMMU_REG_SCR0              (SMMU_BASE_ADDR + 0x0)
-- 
2.7.4

Re: [PATCH edk2-platforms 2/8] Silicon/NXP: Chassis2: define SVR macros

[Leif Lindholm]

On Wed, Jun 10, 2020 at 02:50:53 +0530, Wasim Khan wrote:
> From: Wasim Khan <wasim.khan@nxp.com>
> 
> Define macros to retrieve System Version Register(SVR)
> related information
> 
> Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> ---
>  Silicon/NXP/Chassis2/Include/Chassis.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Silicon/NXP/Chassis2/Include/Chassis.h b/Silicon/NXP/Chassis2/Include/Chassis.h
> index e5edd80134a4..7e8bf224884b 100644
> --- a/Silicon/NXP/Chassis2/Include/Chassis.h
> +++ b/Silicon/NXP/Chassis2/Include/Chassis.h
> @@ -12,6 +12,10 @@
>  
>  #define  NXP_LAYERSCAPE_CHASSIS2_DCFG_ADDRESS  0x1EE0000
>  
> +#define SVR_SOC_VER(svr)            (((svr) >> 8) & 0xFFFFFE)
> +#define SVR_MAJOR(svr)              (((svr) >> 4) & 0xf)
> +#define SVR_MINOR(svr)              (((svr) >> 0) & 0xf)
> +
>  /* SMMU Defintions */
>  #define SMMU_BASE_ADDR             0x09000000
>  #define SMMU_REG_SCR0              (SMMU_BASE_ADDR + 0x0)

These macros are identical between Chassis2 and Chassis3V2, and they
also look like exactly the sort of thing you want identical across
different chassis. Is there a common header file they can use?

(The set is straightforward, I have no other comments on it.)

/
    Leif

> -- 
> 2.7.4
> 

Re: [PATCH edk2-platforms 2/8] Silicon/NXP: Chassis2: define SVR macros

[Wasim Khan (OSS)]

> -----Original Message-----
> From: Leif Lindholm <leif@nuviainc.com>
> Sent: Wednesday, June 17, 2020 8:24 PM
> To: Wasim Khan (OSS) <wasim.khan@oss.nxp.com>
> Cc: devel@edk2.groups.io; Meenakshi Aggarwal
> <meenakshi.aggarwal@nxp.com>; Varun Sethi <V.Sethi@nxp.com>;
> ard.biesheuvel@arm.com; Wasim Khan <wasim.khan@nxp.com>
> Subject: Re: [PATCH edk2-platforms 2/8] Silicon/NXP: Chassis2: define SVR
> macros
> 
> On Wed, Jun 10, 2020 at 02:50:53 +0530, Wasim Khan wrote:
> > From: Wasim Khan <wasim.khan@nxp.com>
> >
> > Define macros to retrieve System Version Register(SVR) related
> > information
> >
> > Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> > ---
> >  Silicon/NXP/Chassis2/Include/Chassis.h | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/Silicon/NXP/Chassis2/Include/Chassis.h
> > b/Silicon/NXP/Chassis2/Include/Chassis.h
> > index e5edd80134a4..7e8bf224884b 100644
> > --- a/Silicon/NXP/Chassis2/Include/Chassis.h
> > +++ b/Silicon/NXP/Chassis2/Include/Chassis.h
> > @@ -12,6 +12,10 @@
> >
> >  #define  NXP_LAYERSCAPE_CHASSIS2_DCFG_ADDRESS  0x1EE0000
> >
> > +#define SVR_SOC_VER(svr)            (((svr) >> 8) & 0xFFFFFE)
> > +#define SVR_MAJOR(svr)              (((svr) >> 4) & 0xf)
> > +#define SVR_MINOR(svr)              (((svr) >> 0) & 0xf)
> > +
> >  /* SMMU Defintions */
> >  #define SMMU_BASE_ADDR             0x09000000
> >  #define SMMU_REG_SCR0              (SMMU_BASE_ADDR + 0x0)
> 
> These macros are identical between Chassis2 and Chassis3V2, and they also look
> like exactly the sort of thing you want identical across different chassis. Is there
> a common header file they can use?

Thank you Leif for the review. 
These MACROS are chassic specific. Upper 24 bits representation is different in Chassis2 and Chassis3V2 (although not used currently and masked for SVR calculation but we may need it in future). 
SVR representation may further change for future SoC, so we would like to keep them in chassis specific header file.


> 
> (The set is straightforward, I have no other comments on it.)
> 
> /
>     Leif
> 
> > --
> > 2.7.4
> >

Re: [PATCH edk2-platforms 2/8] Silicon/NXP: Chassis2: define SVR macros

[Leif Lindholm]

On Thu, Jun 18, 2020 at 09:59:28 +0000, Wasim Khan (OSS) wrote:
> 
> 
> > -----Original Message-----
> > From: Leif Lindholm <leif@nuviainc.com>
> > Sent: Wednesday, June 17, 2020 8:24 PM
> > To: Wasim Khan (OSS) <wasim.khan@oss.nxp.com>
> > Cc: devel@edk2.groups.io; Meenakshi Aggarwal
> > <meenakshi.aggarwal@nxp.com>; Varun Sethi <V.Sethi@nxp.com>;
> > ard.biesheuvel@arm.com; Wasim Khan <wasim.khan@nxp.com>
> > Subject: Re: [PATCH edk2-platforms 2/8] Silicon/NXP: Chassis2: define SVR
> > macros
> > 
> > On Wed, Jun 10, 2020 at 02:50:53 +0530, Wasim Khan wrote:
> > > From: Wasim Khan <wasim.khan@nxp.com>
> > >
> > > Define macros to retrieve System Version Register(SVR) related
> > > information
> > >
> > > Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
> > > ---
> > >  Silicon/NXP/Chassis2/Include/Chassis.h | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/Silicon/NXP/Chassis2/Include/Chassis.h
> > > b/Silicon/NXP/Chassis2/Include/Chassis.h
> > > index e5edd80134a4..7e8bf224884b 100644
> > > --- a/Silicon/NXP/Chassis2/Include/Chassis.h
> > > +++ b/Silicon/NXP/Chassis2/Include/Chassis.h
> > > @@ -12,6 +12,10 @@
> > >
> > >  #define  NXP_LAYERSCAPE_CHASSIS2_DCFG_ADDRESS  0x1EE0000
> > >
> > > +#define SVR_SOC_VER(svr)            (((svr) >> 8) & 0xFFFFFE)
> > > +#define SVR_MAJOR(svr)              (((svr) >> 4) & 0xf)
> > > +#define SVR_MINOR(svr)              (((svr) >> 0) & 0xf)
> > > +
> > >  /* SMMU Defintions */
> > >  #define SMMU_BASE_ADDR             0x09000000
> > >  #define SMMU_REG_SCR0              (SMMU_BASE_ADDR + 0x0)
> > 
> > These macros are identical between Chassis2 and Chassis3V2, and they also look
> > like exactly the sort of thing you want identical across different chassis. Is there
> > a common header file they can use?
> 
> Thank you Leif for the review. 
> These MACROS are chassic specific. Upper 24 bits representation is
> different in Chassis2 and Chassis3V2 (although not used currently
> and masked for SVR calculation but we may need it in future).
> SVR representation may further change for future SoC, so we would
> like to keep them in chassis specific header file.

OK, understood.
Yes, this is fine then.
For the series:
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Pushed as 8dd78ea11a38..14e47144ffc6.

/
    Leif
> 
> 
> > 
> > (The set is straightforward, I have no other comments on it.)
> > 
> > /
> >     Leif
> > 
> > > --
> > > 2.7.4
> > >

[PATCH edk2-platforms 3/8] Silicon/NXP: LS1043A: Define SVR for LS1043A SoC

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

Define System Version Register(SVR) for LS1043A SoC

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/LS1043A/Include/Soc.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Silicon/NXP/LS1043A/Include/Soc.h b/Silicon/NXP/LS1043A/Include/Soc.h
index 97a77d3f5da6..21b0dafffe91 100644
--- a/Silicon/NXP/LS1043A/Include/Soc.h
+++ b/Silicon/NXP/LS1043A/Include/Soc.h
@@ -45,6 +45,9 @@
 
 #define LS1043A_DCFG_ADDRESS         NXP_LAYERSCAPE_CHASSIS2_DCFG_ADDRESS
 
+//SVR
+#define SVR_LS1043A                 0x879200
+
 /**
   Reset Control Word (RCW) Bits
 **/
-- 
2.7.4

[PATCH edk2-platforms 4/8] Silicon/NXP: LS1043A: Add SocGetSvr API

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

Add SocGetSvr API to get the System Version Register(SVR)

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/Include/Library/SocLib.h        |  7 +++++++
 Silicon/NXP/LS1043A/Library/SocLib/SocLib.c | 14 ++++++++++++++
 2 files changed, 21 insertions(+)

diff --git a/Silicon/NXP/Include/Library/SocLib.h b/Silicon/NXP/Include/Library/SocLib.h
index 7b25107e4746..b770671c1331 100644
--- a/Silicon/NXP/Include/Library/SocLib.h
+++ b/Silicon/NXP/Include/Library/SocLib.h
@@ -49,4 +49,11 @@ SocInit (
   VOID
   );
 
+/**
+  Function to get System Version Register(SVR) of SoC
+**/
+UINT32
+SocGetSvr (
+  VOID
+  );
 #endif // SOC_LIB_H__
diff --git a/Silicon/NXP/LS1043A/Library/SocLib/SocLib.c b/Silicon/NXP/LS1043A/Library/SocLib/SocLib.c
index 39fb4c14e0b9..3ebbf7df4476 100644
--- a/Silicon/NXP/LS1043A/Library/SocLib/SocLib.c
+++ b/Silicon/NXP/LS1043A/Library/SocLib/SocLib.c
@@ -64,6 +64,20 @@ SocGetClock (
 }
 
 /**
+  Function to get SoC's System Version Register(SVR)
+ **/
+UINT32
+SocGetSvr (
+  VOID
+  )
+{
+  LS1043A_DEVICE_CONFIG  *DeviceConfig;
+
+  DeviceConfig = (LS1043A_DEVICE_CONFIG  *)LS1043A_DCFG_ADDRESS;
+  return DcfgRead32 ((UINTN)&DeviceConfig->Svr);
+}
+
+/**
   Function to initialize SoC specific constructs
  **/
 VOID
-- 
2.7.4

[PATCH edk2-platforms 5/8] Silicon/NXP: Chassis3V2: Add SVR and DEVDISRn in device configuration

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

System Version Register(SVR) is used to provide the SoC details
like Manufacturer ID, SoC Family, SoC major and minor version
etc.
DEVDISRn is used to disable unused peripherals.

Update Device Configuration structure for SVR and DEVDISRn.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/Chassis3V2/Include/Chassis.h | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/Silicon/NXP/Chassis3V2/Include/Chassis.h b/Silicon/NXP/Chassis3V2/Include/Chassis.h
index 0fd70132d897..cbc6b20e244d 100644
--- a/Silicon/NXP/Chassis3V2/Include/Chassis.h
+++ b/Silicon/NXP/Chassis3V2/Include/Chassis.h
@@ -18,7 +18,17 @@
 **/
 #pragma pack(1)
 typedef struct {
-  UINT8   Reserved0[0x100 - 0x0];
+  UINT8   Reserved0[0x70 - 0x0];
+  UINT32  DeviceDisableRegister1;  // Device Disable Register 1
+  UINT32  DeviceDisableRegister2;  // Device Disable Register 2
+  UINT32  DeviceDisableRegister3;  // Device Disable Register 3
+  UINT32  DeviceDisableRegister4;  // Device Disable Register 4
+  UINT32  DeviceDisableRegister5;  // Device Disable Register 5
+  UINT32  DeviceDisableRegister6;  // Device Disable Register 6
+  UINT32  DeviceDisableRegister7;  // Device Disable Register 7
+  UINT8   Reserved1[0xa4 - 0x8c];
+  UINT32  Svr;                     // System Version Register
+  UINT8   Reserved2[0x100 - 0xa8];
   UINT32  RcwSr[32]; // Reset Control Word Status Register
 } NXP_LAYERSCAPE_CHASSIS3V2_DEVICE_CONFIG;
 #pragma pack()
-- 
2.7.4

[PATCH edk2-platforms 6/8] Silicon/NXP: Chassis3V2: define SVR macros

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

Define macros to retrieve System Version Register(SVR)
related information

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/Chassis3V2/Include/Chassis.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Silicon/NXP/Chassis3V2/Include/Chassis.h b/Silicon/NXP/Chassis3V2/Include/Chassis.h
index cbc6b20e244d..c302e5c9a719 100644
--- a/Silicon/NXP/Chassis3V2/Include/Chassis.h
+++ b/Silicon/NXP/Chassis3V2/Include/Chassis.h
@@ -12,6 +12,10 @@
 
 #define  NXP_LAYERSCAPE_CHASSIS3V2_DCFG_ADDRESS  0x1E00000
 
+#define SVR_SOC_VER(svr)            (((svr) >> 8) & 0xFFFFFE)
+#define SVR_MAJOR(svr)              (((svr) >> 4) & 0xf)
+#define SVR_MINOR(svr)              (((svr) >> 0) & 0xf)
+
 /**
   The Device Configuration Unit provides general purpose configuration and
   status for the device. These registers only support 32-bit accesses.
-- 
2.7.4

[PATCH edk2-platforms 7/8] Silicon/NXP: LX2160A: Define SVR for LX2160A SoC

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

Define System Version Register(SVR) for LX2160A SoC

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/LX2160A/Include/Soc.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Silicon/NXP/LX2160A/Include/Soc.h b/Silicon/NXP/LX2160A/Include/Soc.h
index 52674ee5f32c..6c745d580a6d 100644
--- a/Silicon/NXP/LX2160A/Include/Soc.h
+++ b/Silicon/NXP/LX2160A/Include/Soc.h
@@ -28,6 +28,9 @@
 
 #define LX2160A_DCFG_ADDRESS         NXP_LAYERSCAPE_CHASSIS3V2_DCFG_ADDRESS
 
+// SVR
+#define SVR_LX2160A                  0x873600
+
 /**
   Reset Control Word (RCW) Bits
 **/
-- 
2.7.4

[PATCH edk2-platforms 8/8] Silicon/NXP: LX2160A: Add SocGetSvr API

[Wasim Khan]

From: Wasim Khan <wasim.khan@nxp.com>

Add SocGetSvr API to get the System Version Register(SVR)

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 Silicon/NXP/LX2160A/Library/SocLib/SocLib.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
index 6f774eb7dc6c..3939afb2fb0c 100644
--- a/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
+++ b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
@@ -67,6 +67,20 @@ SocGetClock (
 }
 
 /**
+  Function to get SoC's System Version Register(SVR)
+ **/
+UINT32
+SocGetSvr (
+  VOID
+  )
+{
+  LX2160A_DEVICE_CONFIG  *DeviceConfig;
+
+  DeviceConfig = (LX2160A_DEVICE_CONFIG  *)LX2160A_DCFG_ADDRESS;
+  return DcfgRead32 ((UINTN)&DeviceConfig->Svr);
+}
+
+/**
   Function to initialize SoC specific constructs
  **/
 VOID
-- 
2.7.4