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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Bob Feng <bob.c.feng@intel.com>,
	Liming Gao <liming.gao@intel.com>,
	Daniel Schaefer <daniel.schaefer@hpe.com>,
	Leif Lindholm <leif.lindholm@linaro.org>
Subject: [BaseTools PATCH v2] BaseTools: Add external definitions for RISC-V assembly build
Date: Thu, 18 Jun 2020 08:59:51 +0800	[thread overview]
Message-ID: <20200618005951.26024-1-abner.chang@hpe.com> (raw)

Add opensbi external definitions to RISC-V build for assembly
code. Use GCC5_RISCV_OPENSBI_TYPES to refer to edk2 data type
for assembly files instead of using opensbi data type.

Signed-off-by: Abner Chang <abner.chang@hpe.com>

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
---
 BaseTools/Conf/tools_def.template | 1 +
 1 file changed, 1 insertion(+)

diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 923517b5c2..8aeb8a2a64 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -2037,6 +2037,7 @@ DEFINE GCC5_RISCV64_CC_FLAGS               = DEF(GCC5_RISCV_ALL_CC_FLAGS) DEF(GC
 DEFINE GCC5_RISCV64_DLINK_FLAGS            = DEF(GCC5_RISCV_ALL_DLINK_FLAGS) -Wl,-melf64lriscv,--oformat=elf64-littleriscv,--no-relax
 DEFINE GCC5_RISCV64_DLINK2_FLAGS           = DEF(GCC5_RISCV_ALL_DLINK2_FLAGS)
 DEFINE GCC5_RISCV64_ASM_FLAGS              = DEF(GCC5_RISCV_ALL_ASM_FLAGS) -march=DEF(GCC5_RISCV64_ARCH) -mcmodel=medany -mabi=lp64
+DEFINE GCC_PP_FLAGS                        = -E -x assembler-with-cpp -include AutoGen.h DEF(GCC5_RISCV_OPENSBI_TYPES)
 
 ####################################################################################
 #
-- 
2.25.0


             reply	other threads:[~2020-06-18  1:40 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-18  0:59 Abner Chang [this message]
2020-06-24  3:34 ` [BaseTools PATCH v2] BaseTools: Add external definitions for RISC-V assembly build Bob Feng

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