public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Kirkendall, Garrett" <garrett.kirkendall@amd.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Laszlo Ersek <lersek@redhat.com>
Subject: [PATCH v2 0/2] AMD procesor MSR_IA32_MISC_ENABLE
Date: Thu, 18 Jun 2020 10:22:43 -0500	[thread overview]
Message-ID: <20200618152245.6483-1-Garrett.Kirkendall@amd.com> (raw)

AMD processor does not support MSR_IA32_MISC_ENABLE register.  Accessing
this register on AMD causes an unhandled exception in SmmEntry.nasm and
a subsequent failure to boot since this is too early in SMM path for the
exception handler to be loaded.

First, to distinguish between AMD and other processors, refactor
StandardSignatureIsAuthenticAMD into BaseUefiCpuLib.  So there is only
one copy in the source. All changed modules already include UefiCpuLib
either directly or indirectly so could not easly split first patch.

Second, Skip manipulation of MSR_IA32_MISC_ENABLE register if running
on an AMD processor.

Tested on AMD X64 hardware.
OvmfIa32 and OvmfIa32X64 on Intel hardware.

Garrett Kirkendall (2):
  UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib
  UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on
    AMD

 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf         |  7 ++++
 UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf             |  2 ++
 UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf |  2 ++
 UefiCpuPkg/Include/Library/UefiCpuLib.h                      | 14 ++++++++
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h               |  3 ++
 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c           | 38 ++++++++++++++++++++
 UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c               | 25 ++-----------
 UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c   | 25 ++-----------
 UefiCpuPkg/Library/MpInitLib/MpLib.c                         | 23 ------------
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c                       |  9 ++++-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm                 | 19 ++++++++--
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm                  | 20 +++++++++--
 12 files changed, 113 insertions(+), 74 deletions(-)
 create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c

Changes at:
https://github.com/gkirkendall-amd/edk2/tree/smmentry_nasm_skip_msr_xd_bit_on_amd_v2

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>

-- 
2.27.0


             reply	other threads:[~2020-06-18 15:23 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-18 15:22 Kirkendall, Garrett [this message]
2020-06-18 15:22 ` [PATCH v2 1/2] UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib Kirkendall, Garrett
2020-06-18 15:22 ` [PATCH v2 2/2] UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on AMD Kirkendall, Garrett
2020-06-19 14:48   ` [edk2-devel] " Laszlo Ersek
2020-06-19  1:00 ` [PATCH v2 0/2] AMD procesor MSR_IA32_MISC_ENABLE Dong, Eric
2020-06-19 14:35   ` [edk2-devel] " Laszlo Ersek

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200618152245.6483-1-Garrett.Kirkendall@amd.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox