From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by mx.groups.io with SMTP id smtpd.web11.10105.1592493895062300275 for ; Thu, 18 Jun 2020 08:24:55 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=vG55ehAM; spf=pass (domain: nuviainc.com, ip: 209.85.221.68, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f68.google.com with SMTP id a6so4535777wrm.4 for ; Thu, 18 Jun 2020 08:24:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=GM71kgICq/I4ezFJCV+IiySu4c69s1SUGl+KIwmrAww=; b=vG55ehAMSKfSTIxaX5IkfGgjfz1VPv9ENcR7b5PNR+9o6LYX3swmVXwkTvjzrsmkvj K/DaZfCJHXAE6PcOUzadWHnRVg+IVsQmmtnyurlJ5EJ3ptU5Gb7T1/qVziUOWy+JH1Zu 8BW1tWPrOaVXU7xMdIF+hgXu15Iz77qygcjgIGzRoqe47WFsv6624VsV420s7FyXUB3S Rt98+v8J3dus/F7diqixvBVeGPi6D6ZtpM3TEZtEqAp1Gy6+wAXAZ3QsU382tBMpHhfx JgDN5Ft5WbPHvVHNBFtsnoGysgSKLOd2l3AP7LVT7TpJl/lHlfXGrduYKGPQA+vGqxJV +Y3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=GM71kgICq/I4ezFJCV+IiySu4c69s1SUGl+KIwmrAww=; b=JChXQPsTPhBwhHdw4Pp7zMUVZvFPKnIQ6g5Jd0A7v5YCDvvA12Uo9ORR4o4XUw4E1e umCz+T8BwuOz68nuNAQvRXXR/TtnLjz8qaBnA5+XNerj9BntIxqX7NHLKzJjVffYaqsU fakXPFDM2RsNngU819PYOdf24zwS/hR2wti2yjck/HJYNelnaMiRt/oA7EQYqycPWbcj ldGLSEJjKEoRtk/4WoGc6zG+ubqiLOi1d/yPal1cwc863hH03W6WTHcZ4PNK7U0sBWWB 8t/gL9F2BG7tzcNlxd47U5sZ86E1GM5i/sTO+F0BiJVvSFywxkNOnQy2QQi68zhUmBuw ZEHg== X-Gm-Message-State: AOAM5328eeMKHdGGaT1gQYStPox0/zHd3d1ElELidGxKULZcVmVMCELc 1Z+LZdH1rT64iq6Y/8+T93MTnA== X-Google-Smtp-Source: ABdhPJyAVNiaeS3p6rHU8aoEoEfvzTi3TLY1JIXlfkACUcl3KDbThi0rl8GmUHop35/DVZpT0n0YhQ== X-Received: by 2002:adf:9021:: with SMTP id h30mr5140900wrh.19.1592493893712; Thu, 18 Jun 2020 08:24:53 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id j5sm3948344wrm.57.2020.06.18.08.24.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2020 08:24:53 -0700 (PDT) Date: Thu, 18 Jun 2020 16:24:51 +0100 From: "Leif Lindholm" To: Wasim Khan Cc: devel@edk2.groups.io, meenakshi.aggarwal@nxp.com, V.Sethi@nxp.com, ard.biesheuvel@arm.com, Wasim Khan Subject: Re: [PATCH edk2-platforms 0/7] NXP: Add PCIe Support for LX2160aRdbPkg Message-ID: <20200618152451.GZ6739@vanye> References: <1591741050-11645-1-git-send-email-wasim.khan@oss.nxp.com> MIME-Version: 1.0 In-Reply-To: <1591741050-11645-1-git-send-email-wasim.khan@oss.nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Jun 10, 2020 at 03:47:23 +0530, Wasim Khan wrote: > From: Wasim Khan > > This patch series adds PCIe support for LX2160aRdbPkg. > LX2160-Rev1 and LX2160-Rev2 has different PCIe controller. Platform > driver checks the SoC version and enable corresponding PCIe controller > and its feature using dynamic PCDs. > > PciHostBridgeLib and PciSegmentLib already has support for both > PCIe controllers. > > > This patch series dependes on below patch series: > 1 - Silicon/NXP: LX2160A: Add SerDes Support > 2 - Silicon/NXP: Add SVR and DEVDISRn config configuration No further comments on this set. You can consider any patch without a comment as: Reviewed-by: Leif Lindholm Now, I'm going to take some time off - I'll be back 29/6 and will look at any new revisions then if this hasn't been merged yet.. > Wasim Khan (7): > Platform/NXP: LX2160aRdbPkg: Add PCIe space in VirtualMemoryMap > Silicon/NXP: LX2160A: Define PCIe related PCDs > Platform/NXP: LX2160aRdbPkg: Add PlatformDxe driver > Platform/NXP: LX2160aRdbPkg: Enable PlatformDxe driver > Platform/NXP: LX2160aRdbPkg: Hide Root Port for LX2160A-Rev2 > Platform/NXP: LX2160aRdbPkg: Enable NetworkPkg > Platform/NXP: LX2160aRdbPkg: Enable PCIE support > > Silicon/NXP/NxpQoriqLs.dec | 1 + > Silicon/NXP/LX2160A/LX2160A.dsc.inc | 5 + > Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 22 +++++ > Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.fdf | 15 +++ > Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf | 36 ++++++++ > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 1 + > Silicon/NXP/Include/Pcie.h | 1 + > Silicon/NXP/LX2160A/Include/Soc.h | 8 ++ > Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c | 96 ++++++++++++++++++++ > Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c | 38 +++++++- > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c | 6 +- > 11 files changed, 227 insertions(+), 2 deletions(-) > create mode 100644 Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.inf > create mode 100644 Platform/NXP/LX2160aRdbPkg/Drivers/PlatformDxe/PlatformDxe.c > > -- > 2.7.4 >