From: "Kirkendall, Garrett" <garrett.kirkendall@amd.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Laszlo Ersek <lersek@redhat.com>, Hao A Wu <hao.a.wu@intel.com>
Subject: [PATCH v5 0/4] AMD processor MSR_IA32_MISC_ENABLE
Date: Fri, 19 Jun 2020 11:56:25 -0500 [thread overview]
Message-ID: <20200619165629.9545-1-Garrett.Kirkendall@amd.com> (raw)
AMD processor does not support MSR_IA32_MISC_ENABLE register. Accessing
this register on AMD causes an unhandled exception in SmmEntry.nasm and
a subsequent failure to boot since this is too early in SMM path for the
exception handler to be loaded.
1. Prepare PcAtChipsetPkg/PcAtChipsetPkg.dsc to move
StandardSignatureIsAuthenticAMD into UefiCpuLib LibraryClass
BaseUefiCpuLib in UefiCpuPkg.
2. To distinguish between AMD and other processors, refactor
StandardSignatureIsAuthenticAMD into BaseUefiCpuLib. So there is only
one copy in the source.
3. Skip manipulation of MSR_IA32_MISC_ENABLE register if running
on an AMD processor.
Tested on AMD X64 hardware.
OvmfIa32 and OvmfIa32X64 on Intel hardware.
v1: Move StandardSignatureIsAuthenticAMD. Handle MSR_IA32_MISC_ENABLE
v2: Incorporate Laszlo's feedback
v3: Typo, not sent
v4: Patch in to add UefiCpuLib to PcAtChipsetPkg.dsc
v5: Patch in to add UefiCpuLib to SourceLevelDebugPkg.dsc
Garrett Kirkendall (4):
PcAtChipsetPkg: PcAtChipsetPkg.dsc add UefiCpuLib LibraryClass
SourceLevelDebugPkg: SourceLevelDebugPkg.dsc add UefiCpuLib
LibraryClass
UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib
UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on
AMD
PcAtChipsetPkg/PcAtChipsetPkg.dsc | 2 ++
SourceLevelDebugPkg/SourceLevelDebugPkg.dsc | 2 ++
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 7 ++++
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf | 2 ++
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf | 2 ++
UefiCpuPkg/Include/Library/UefiCpuLib.h | 14 ++++++++
UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 3 ++
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 38 ++++++++++++++++++++
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 25 ++-----------
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 25 ++-----------
UefiCpuPkg/Library/MpInitLib/MpLib.c | 23 ------------
UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 9 ++++-
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 19 ++++++++--
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 20 +++++++++--
14 files changed, 117 insertions(+), 74 deletions(-)
create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
Changes at:
https://github.com/gkirkendall-amd/edk2/tree/smmentry_nasm_skip_msr_xd_bit_on_amd_v5
Pull Request:
https://github.com/tianocore/edk2/pull/715
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>
--
2.27.0
next reply other threads:[~2020-06-19 16:56 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-19 16:56 Kirkendall, Garrett [this message]
2020-06-19 16:56 ` [PATCH v5 1/4] PcAtChipsetPkg: PcAtChipsetPkg.dsc add UefiCpuLib LibraryClass Kirkendall, Garrett
2020-06-22 2:50 ` [edk2-devel] " Guomin Jiang
2020-06-19 16:56 ` [PATCH v5 2/4] SourceLevelDebugPkg: SourceLevelDebugPkg.dsc " Kirkendall, Garrett
2020-06-19 16:56 ` [PATCH v5 3/4] UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib Kirkendall, Garrett
2020-06-19 16:56 ` [PATCH v5 4/4] UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE manipulation on AMD Kirkendall, Garrett
2020-06-19 20:26 ` Laszlo Ersek
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