* [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.
@ 2020-06-27 1:51 Dong, Eric
2020-06-29 0:44 ` Chiu, Chasel
0 siblings, 1 reply; 3+ messages in thread
From: Dong, Eric @ 2020-06-27 1:51 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Star Zeng
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2825
UefiCpuLib has API InitializeFloatingPointUnits.
Remove internal copy of InitializeFloatingPointUnits
in FspSecCoreM, use UefiCpuLib API.
This change also avoid later potential conflict when
use UefiCpuLib for FspSecCoreM module.
Signed-off-by: Eric Dong <eric.dong@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
---
IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 3 +-
IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf | 1 -
.../FspSecCore/Ia32/InitializeFpu.nasm | 72 -------------------
IntelFsp2Pkg/FspSecCore/SecMain.h | 15 +---
IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
5 files changed, 4 insertions(+), 88 deletions(-)
delete mode 100644 IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
index 25f2a109ab..61b7ddca4c 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
@@ -29,7 +29,6 @@
[Sources.IA32]
Ia32/Stack.nasm
- Ia32/InitializeFpu.nasm
Ia32/FspApiEntryM.nasm
Ia32/FspApiEntryCommon.nasm
Ia32/FspHelper.nasm
@@ -41,6 +40,7 @@
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
BaseMemoryLib
@@ -51,6 +51,7 @@
FspSwitchStackLib
FspCommonLib
FspSecPlatformLib
+ UefiCpuLib
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
index 971b311e42..664bde5678 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
@@ -25,7 +25,6 @@
[Sources.IA32]
Ia32/Stack.nasm
- Ia32/InitializeFpu.nasm
Ia32/FspApiEntryT.nasm
Ia32/FspHelper.nasm
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
deleted file mode 100644
index ebc91c41e4..0000000000
--- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
+++ /dev/null
@@ -1,72 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
-; SPDX-License-Identifier: BSD-2-Clause-Patent
-;
-; Abstract:
-;
-;------------------------------------------------------------------------------
-
-
-SECTION .data
-;
-; Float control word initial value:
-; all exceptions masked, double-precision, round-to-nearest
-;
-ASM_PFX(mFpuControlWord):
- dw 0x027F
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-ASM_PFX(mMmxControlWord):
- dd 0x01F80
-
-SECTION .text
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-
-global ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
-
- push ebx
-
- ;
- ; Initialize floating point units
- ;
- finit
- fldcw [ASM_PFX(mFpuControlWord)]
-
- ;
- ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
- ; whether the processor supports SSE instruction.
- ;
- mov eax, 1
- cpuid
- bt edx, 25
- jnc Done
-
- ;
- ; Set OSFXSR bit 9 in CR4
- ;
- mov eax, cr4
- or eax, BIT9
- mov cr4, eax
-
- ;
- ; The processor should support SSE instruction and we can use
- ; ldmxcsr instruction
- ;
- ldmxcsr [ASM_PFX(mMmxControlWord)]
-Done:
- pop ebx
-
- ret
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h b/IntelFsp2Pkg/FspSecCore/SecMain.h
index af7f387960..f6333b0ffb 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.h
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
@@ -21,6 +21,7 @@
#include <Library/SerialPortLib.h>
#include <Library/FspSwitchStackLib.h>
#include <Library/FspCommonLib.h>
+#include <Library/UefiCpuLib.h>
#include <FspEas.h>
typedef VOID (*PEI_CORE_ENTRY) ( \
@@ -80,20 +81,6 @@ SecTemporaryRamSupport (
IN UINTN CopySize
);
-/**
- Initializes floating point units for requirement of UEFI specification.
-
- This function initializes floating-point control word to 0x027F (all exceptions
- masked,double-precision, round-to-nearest) and multimedia-extensions control word
- (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
- for masked underflow).
-
-**/
-VOID
-EFIAPI
-InitializeFloatingPointUnits (
- VOID
- );
/**
diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
index 26cd3da43c..309411630d 100644
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
@@ -25,6 +25,7 @@
PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
--
2.21.0.windows.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.
2020-06-27 1:51 [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib Dong, Eric
@ 2020-06-29 0:44 ` Chiu, Chasel
2020-07-06 9:43 ` [edk2-devel] " Laszlo Ersek
0 siblings, 1 reply; 3+ messages in thread
From: Chiu, Chasel @ 2020-06-29 0:44 UTC (permalink / raw)
To: Dong, Eric, devel@edk2.groups.io; +Cc: Desimone, Nathaniel L, Zeng, Star
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Dong, Eric <eric.dong@intel.com>
> Sent: Saturday, June 27, 2020 9:52 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2825
>
> UefiCpuLib has API InitializeFloatingPointUnits.
> Remove internal copy of InitializeFloatingPointUnits in FspSecCoreM, use
> UefiCpuLib API.
>
> This change also avoid later potential conflict when use UefiCpuLib for
> FspSecCoreM module.
>
> Signed-off-by: Eric Dong <eric.dong@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> ---
> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 3 +-
> IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf | 1 -
> .../FspSecCore/Ia32/InitializeFpu.nasm | 72 -------------------
> IntelFsp2Pkg/FspSecCore/SecMain.h | 15 +---
> IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
> 5 files changed, 4 insertions(+), 88 deletions(-) delete mode 100644
> IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
>
> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> index 25f2a109ab..61b7ddca4c 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> @@ -29,7 +29,6 @@
>
> [Sources.IA32]
> Ia32/Stack.nasm
> - Ia32/InitializeFpu.nasm
> Ia32/FspApiEntryM.nasm
> Ia32/FspApiEntryCommon.nasm
> Ia32/FspHelper.nasm
> @@ -41,6 +40,7 @@
> [Packages]
> MdePkg/MdePkg.dec
> IntelFsp2Pkg/IntelFsp2Pkg.dec
> + UefiCpuPkg/UefiCpuPkg.dec
>
> [LibraryClasses]
> BaseMemoryLib
> @@ -51,6 +51,7 @@
> FspSwitchStackLib
> FspCommonLib
> FspSecPlatformLib
> + UefiCpuLib
>
> [Pcd]
> gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ##
> CONSUMES
> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
> index 971b311e42..664bde5678 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
> @@ -25,7 +25,6 @@
>
> [Sources.IA32]
> Ia32/Stack.nasm
> - Ia32/InitializeFpu.nasm
> Ia32/FspApiEntryT.nasm
> Ia32/FspHelper.nasm
>
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
> deleted file mode 100644
> index ebc91c41e4..0000000000
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
> +++ /dev/null
> @@ -1,72 +0,0 @@
> -;------------------------------------------------------------------------------
> -;
> -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR> -;
> SPDX-License-Identifier: BSD-2-Clause-Patent -; -; Abstract:
> -;
> -;------------------------------------------------------------------------------
> -
> -
> -SECTION .data
> -;
> -; Float control word initial value:
> -; all exceptions masked, double-precision, round-to-nearest -;
> -ASM_PFX(mFpuControlWord):
> - dw 0x027F
> -;
> -; Multimedia-extensions control word:
> -; all exceptions masked, round-to-nearest, flush to zero for masked
> underflow -;
> -ASM_PFX(mMmxControlWord):
> - dd 0x01F80
> -
> -SECTION .text
> -
> -;
> -; Initializes floating point units for requirement of UEFI specification.
> -;
> -; This function initializes floating-point control word to 0x027F (all
> exceptions -; masked,double-precision, round-to-nearest) and
> multimedia-extensions control word -; (if supported) to 0x1F80 (all
> exceptions masked, round-to-nearest, flush to zero -; for masked underflow).
> -;
> -
> -global ASM_PFX(InitializeFloatingPointUnits)
> -ASM_PFX(InitializeFloatingPointUnits):
> -
> -
> - push ebx
> -
> - ;
> - ; Initialize floating point units
> - ;
> - finit
> - fldcw [ASM_PFX(mFpuControlWord)]
> -
> - ;
> - ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
> - ; whether the processor supports SSE instruction.
> - ;
> - mov eax, 1
> - cpuid
> - bt edx, 25
> - jnc Done
> -
> - ;
> - ; Set OSFXSR bit 9 in CR4
> - ;
> - mov eax, cr4
> - or eax, BIT9
> - mov cr4, eax
> -
> - ;
> - ; The processor should support SSE instruction and we can use
> - ; ldmxcsr instruction
> - ;
> - ldmxcsr [ASM_PFX(mMmxControlWord)]
> -Done:
> - pop ebx
> -
> - ret
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h
> b/IntelFsp2Pkg/FspSecCore/SecMain.h
> index af7f387960..f6333b0ffb 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
> @@ -21,6 +21,7 @@
> #include <Library/SerialPortLib.h>
> #include <Library/FspSwitchStackLib.h>
> #include <Library/FspCommonLib.h>
> +#include <Library/UefiCpuLib.h>
> #include <FspEas.h>
>
> typedef VOID (*PEI_CORE_ENTRY) ( \
> @@ -80,20 +81,6 @@ SecTemporaryRamSupport (
> IN UINTN CopySize
> );
>
> -/**
> - Initializes floating point units for requirement of UEFI specification.
> -
> - This function initializes floating-point control word to 0x027F (all
> exceptions
> - masked,double-precision, round-to-nearest) and multimedia-extensions
> control word
> - (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush
> to zero
> - for masked underflow).
> -
> -**/
> -VOID
> -EFIAPI
> -InitializeFloatingPointUnits (
> - VOID
> - );
>
> /**
>
> diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
> index 26cd3da43c..309411630d 100644
> --- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc
> +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
> @@ -25,6 +25,7 @@
> PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
> IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
>
> UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco
> mpressLib.inf
> + UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
>
>
> ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseRe
> portStatusCodeLibNull.inf
>
> PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformance
> LibNull.inf
> --
> 2.21.0.windows.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.
2020-06-29 0:44 ` Chiu, Chasel
@ 2020-07-06 9:43 ` Laszlo Ersek
0 siblings, 0 replies; 3+ messages in thread
From: Laszlo Ersek @ 2020-07-06 9:43 UTC (permalink / raw)
To: devel, chasel.chiu, Dong, Eric; +Cc: Desimone, Nathaniel L, Zeng, Star
On 06/29/20 02:44, Chiu, Chasel wrote:
>
> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
This was merged as commit 0060e0a694f3f249c3ec081b0e61287c36f64ebb.
Laszlo
>> -----Original Message-----
>> From: Dong, Eric <eric.dong@intel.com>
>> Sent: Saturday, June 27, 2020 9:52 AM
>> To: devel@edk2.groups.io
>> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
>> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>
>> Subject: [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.
>>
>> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2825
>>
>> UefiCpuLib has API InitializeFloatingPointUnits.
>> Remove internal copy of InitializeFloatingPointUnits in FspSecCoreM, use
>> UefiCpuLib API.
>>
>> This change also avoid later potential conflict when use UefiCpuLib for
>> FspSecCoreM module.
>>
>> Signed-off-by: Eric Dong <eric.dong@intel.com>
>> Cc: Chasel Chiu <chasel.chiu@intel.com>
>> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
>> Cc: Star Zeng <star.zeng@intel.com>
>> ---
>> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 3 +-
>> IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf | 1 -
>> .../FspSecCore/Ia32/InitializeFpu.nasm | 72 -------------------
>> IntelFsp2Pkg/FspSecCore/SecMain.h | 15 +---
>> IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
>> 5 files changed, 4 insertions(+), 88 deletions(-) delete mode 100644
>> IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
>>
>> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
>> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
>> index 25f2a109ab..61b7ddca4c 100644
>> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
>> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
>> @@ -29,7 +29,6 @@
>>
>> [Sources.IA32]
>> Ia32/Stack.nasm
>> - Ia32/InitializeFpu.nasm
>> Ia32/FspApiEntryM.nasm
>> Ia32/FspApiEntryCommon.nasm
>> Ia32/FspHelper.nasm
>> @@ -41,6 +40,7 @@
>> [Packages]
>> MdePkg/MdePkg.dec
>> IntelFsp2Pkg/IntelFsp2Pkg.dec
>> + UefiCpuPkg/UefiCpuPkg.dec
>>
>> [LibraryClasses]
>> BaseMemoryLib
>> @@ -51,6 +51,7 @@
>> FspSwitchStackLib
>> FspCommonLib
>> FspSecPlatformLib
>> + UefiCpuLib
>>
>> [Pcd]
>> gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ##
>> CONSUMES
>> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
>> b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
>> index 971b311e42..664bde5678 100644
>> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
>> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
>> @@ -25,7 +25,6 @@
>>
>> [Sources.IA32]
>> Ia32/Stack.nasm
>> - Ia32/InitializeFpu.nasm
>> Ia32/FspApiEntryT.nasm
>> Ia32/FspHelper.nasm
>>
>> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
>> b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
>> deleted file mode 100644
>> index ebc91c41e4..0000000000
>> --- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
>> +++ /dev/null
>> @@ -1,72 +0,0 @@
>> -;------------------------------------------------------------------------------
>> -;
>> -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR> -;
>> SPDX-License-Identifier: BSD-2-Clause-Patent -; -; Abstract:
>> -;
>> -;------------------------------------------------------------------------------
>> -
>> -
>> -SECTION .data
>> -;
>> -; Float control word initial value:
>> -; all exceptions masked, double-precision, round-to-nearest -;
>> -ASM_PFX(mFpuControlWord):
>> - dw 0x027F
>> -;
>> -; Multimedia-extensions control word:
>> -; all exceptions masked, round-to-nearest, flush to zero for masked
>> underflow -;
>> -ASM_PFX(mMmxControlWord):
>> - dd 0x01F80
>> -
>> -SECTION .text
>> -
>> -;
>> -; Initializes floating point units for requirement of UEFI specification.
>> -;
>> -; This function initializes floating-point control word to 0x027F (all
>> exceptions -; masked,double-precision, round-to-nearest) and
>> multimedia-extensions control word -; (if supported) to 0x1F80 (all
>> exceptions masked, round-to-nearest, flush to zero -; for masked underflow).
>> -;
>> -
>> -global ASM_PFX(InitializeFloatingPointUnits)
>> -ASM_PFX(InitializeFloatingPointUnits):
>> -
>> -
>> - push ebx
>> -
>> - ;
>> - ; Initialize floating point units
>> - ;
>> - finit
>> - fldcw [ASM_PFX(mFpuControlWord)]
>> -
>> - ;
>> - ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
>> - ; whether the processor supports SSE instruction.
>> - ;
>> - mov eax, 1
>> - cpuid
>> - bt edx, 25
>> - jnc Done
>> -
>> - ;
>> - ; Set OSFXSR bit 9 in CR4
>> - ;
>> - mov eax, cr4
>> - or eax, BIT9
>> - mov cr4, eax
>> -
>> - ;
>> - ; The processor should support SSE instruction and we can use
>> - ; ldmxcsr instruction
>> - ;
>> - ldmxcsr [ASM_PFX(mMmxControlWord)]
>> -Done:
>> - pop ebx
>> -
>> - ret
>> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h
>> b/IntelFsp2Pkg/FspSecCore/SecMain.h
>> index af7f387960..f6333b0ffb 100644
>> --- a/IntelFsp2Pkg/FspSecCore/SecMain.h
>> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
>> @@ -21,6 +21,7 @@
>> #include <Library/SerialPortLib.h>
>> #include <Library/FspSwitchStackLib.h>
>> #include <Library/FspCommonLib.h>
>> +#include <Library/UefiCpuLib.h>
>> #include <FspEas.h>
>>
>> typedef VOID (*PEI_CORE_ENTRY) ( \
>> @@ -80,20 +81,6 @@ SecTemporaryRamSupport (
>> IN UINTN CopySize
>> );
>>
>> -/**
>> - Initializes floating point units for requirement of UEFI specification.
>> -
>> - This function initializes floating-point control word to 0x027F (all
>> exceptions
>> - masked,double-precision, round-to-nearest) and multimedia-extensions
>> control word
>> - (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush
>> to zero
>> - for masked underflow).
>> -
>> -**/
>> -VOID
>> -EFIAPI
>> -InitializeFloatingPointUnits (
>> - VOID
>> - );
>>
>> /**
>>
>> diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
>> index 26cd3da43c..309411630d 100644
>> --- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc
>> +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
>> @@ -25,6 +25,7 @@
>> PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
>> IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
>>
>> UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco
>> mpressLib.inf
>> + UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
>>
>>
>> ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseRe
>> portStatusCodeLibNull.inf
>>
>> PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformance
>> LibNull.inf
>> --
>> 2.21.0.windows.1
>
>
>
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-07-06 9:43 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2020-06-27 1:51 [PATCH] IntelFsp2Pkg/FspSecCore: Use UefiCpuLib Dong, Eric
2020-06-29 0:44 ` Chiu, Chasel
2020-07-06 9:43 ` [edk2-devel] " Laszlo Ersek
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