From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f65.google.com (mail-wr1-f65.google.com [209.85.221.65]) by mx.groups.io with SMTP id smtpd.web11.15411.1594126243853117306 for ; Tue, 07 Jul 2020 05:50:44 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=RA6H+G1u; spf=pass (domain: nuviainc.com, ip: 209.85.221.65, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f65.google.com with SMTP id b6so44987130wrs.11 for ; Tue, 07 Jul 2020 05:50:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=kT/oI+3dnyWus+6HEnJ0uNv0QFP/sxdsiJXJtDVKgzs=; b=RA6H+G1u8uv8ERdh2Y01ahh1EF8G//+yLUOUHB1+IzqqOlZTwc7zIPcgaZg6ddnQLW bJKHWg7AGDEW1BFvVcugwQtPSyaUoonUry0M9Hnh3zvuaa/VffyWU8N9rCZK3ksnVA/s Qm3k1bRCV6+TZ8WDEsL/EaDgn+ZCnIXq23FqSAXRnLbEq9IOVBCteR3hNbMJHIFKHyQs Rj5tdl7ZGiCyPVEHLrQJW70ZI0kmLciUdJlKAIvRSA1X2gkd3P2tvH+FNf/1PPu5lQ7b RTqk91KbzUuoc187t098hndTLJHY0ywjPrgjr/4OHuIuZUh9Rl1XpIadZoumfX+UX7bH jEuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=kT/oI+3dnyWus+6HEnJ0uNv0QFP/sxdsiJXJtDVKgzs=; b=nFCmRcemUlZ62RgdN8OfzYUq7tgUq7ccNAPqaY/XyRxlbUCA52d9Bkyjds7UlEVNXm UZiTe1rGL6BUvxFhTHgjWKD/5sFMRUTGgkOTzyIj8yyI4n05jsePDHUeDq0wntu9url+ erRA0NvTm/1BMgyxxKKWW3QnbvJKddg7pIhMrRQYc/jt3LtgjxRZGdQ+smoosF6AI/gK /mXkqT67XhOVmwWIZ6/mU5L3aJgN0J7f9JQSqTSyvGvs7YHiyiCt6FQY8/Nnp5cRLIDq iIAN0ZuUpsVXugXevBET8QAnGHHRhEKdeyLvfV+hIvuXcrZmnR75x3O3JhRPORKlTvnS yCWA== X-Gm-Message-State: AOAM530KOnbRWmkDgN35TdRgDx0fNxNrXXtR67qlh3sdWB2wE5/XyO9A HEX9qJxJd78BpIG7HaLdMRYN/A== X-Google-Smtp-Source: ABdhPJym2RtDp5+WltxKfqy+VwXRWm9fK1vBI+C5wu8vIoZje9cRlmwS7kq+YxTmsYbFfhnRA2cqqw== X-Received: by 2002:a5d:69c8:: with SMTP id s8mr52732857wrw.405.1594126242206; Tue, 07 Jul 2020 05:50:42 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id f197sm1100541wme.33.2020.07.07.05.50.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jul 2020 05:50:41 -0700 (PDT) Date: Tue, 7 Jul 2020 13:50:39 +0100 From: "Leif Lindholm" To: Pankaj Bansal Cc: Meenakshi Aggarwal , Michael D Kinney , devel@edk2.groups.io, Varun Sethi , Samer El-Haj-Mahmoud , Augustine Philips , Ard Biesheuvel , Arokia Samy , Kuldip Dwivedi , Pramod Kumar Subject: Re: [PATCH edk2-platforms v2 5/6] Platform/NXP: Add LS1046AFRWY Platform Message-ID: <20200707125039.GE12303@vanye> References: <20200706082421.9139-1-pankaj.bansal@oss.nxp.com> <20200706082421.9139-6-pankaj.bansal@oss.nxp.com> MIME-Version: 1.0 In-Reply-To: <20200706082421.9139-6-pankaj.bansal@oss.nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Jul 06, 2020 at 03:24:20 -0500, Pankaj Bansal wrote: > From: Pankaj Bansal > > LS1046A Freeway (FRWY) is a high-performance development > platform that supports the QorIQ LS1046A Layerscape Architecture SOCs. > > Co-authored-by: Pramod Kumar > Co-authored-by: Pankaj Bansal > Signed-off-by: Pankaj Bansal > --- > Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dec | 23 +++ > Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 46 ++++++ > Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf | 168 ++++++++++++++++++++ > Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf | 4 + > Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 53 +++++- > Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c | 49 +++++- Why are these modifications made to ArmPlatformLib in the patch after the one where it was added? / Leif > 6 files changed, 341 insertions(+), 2 deletions(-) > > diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dec b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dec > new file mode 100644 > index 000000000000..a693d8262444 > --- /dev/null > +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dec > @@ -0,0 +1,23 @@ > +# LS1046aFrwyPkg.dec > +# LS1046a board package. > +# > +# Copyright 2019-2020 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > + > +[Defines] > + PACKAGE_NAME = LS1046aFrwyPkg > + PACKAGE_GUID = 3547d88c-62c2-4fb2-a11b-80245f80928f > + > +################################################################################ > +# > +# Include Section - list of Include Paths that are provided by this package. > +# Comments are used for Keywords and Module Types. > +# > +# Supported Module Types: > +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION > +# > +################################################################################ > +[Includes.common] > + Include # Root include for the package > diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc > new file mode 100644 > index 000000000000..3f29dadd5d1d > --- /dev/null > +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc > @@ -0,0 +1,46 @@ > +# LS1046aFrwyPkg.dsc > +# > +# LS1046AFRWY Board package. > +# > +# Copyright 2019-2020 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > + > +################################################################################ > +# > +# Defines Section - statements that will be processed to create a Makefile. > +# > +################################################################################ > +[Defines] > + # > + # Defines for default states. These can be changed on the command line. > + # -D FLAG=VALUE > + # > + PLATFORM_NAME = LS1046aFrwyPkg > + PLATFORM_GUID = 79adaa48-5f50-49f0-aa9a-544ac9260ef8 > + OUTPUT_DIRECTORY = Build/LS1046aFrwyPkg > + FLASH_DEFINITION = Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf > + > +!include Silicon/NXP/NxpQoriqLs.dsc.inc > +!include Silicon/NXP/LS1046A/LS1046A.dsc.inc > + > +[LibraryClasses.common] > + ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > + RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf > + > +################################################################################ > +# > +# Components Section - list of all EDK II Modules needed by this Platform > +# > +################################################################################ > +[Components.common] > + # > + # Architectural Protocols > + # > + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > + } > + > +## > diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf > new file mode 100644 > index 000000000000..8da5b57cb49e > --- /dev/null > +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf > @@ -0,0 +1,168 @@ > +# LS1046aFrwyPkg.fdf > +# > +# FLASH layout file for LS1046a board. > +# > +# Copyright 2019-2020 NXP > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > + > +################################################################################ > +# > +# FD Section > +# The [FD] Section is made up of the definition statements and a > +# description of what goes into the Flash Device Image. Each FD section > +# defines one flash "device" image. A flash device image may be one of > +# the following: Removable media bootable image (like a boot floppy > +# image,) an Option ROM image (that would be "flashed" into an add-in > +# card,) a System "Flash" image (that would be burned into a system's > +# flash) or an Update ("Capsule") image that will be used to update and > +# existing system flash. > +# > +################################################################################ > + > +[FD.LS1046AFRWY_EFI] > +BaseAddress = 0x82000000|gArmTokenSpaceGuid.PcdFdBaseAddress #The base address of the FLASH Device. > +Size = 0x00140000|gArmTokenSpaceGuid.PcdFdSize #The size in bytes of the FLASH Device > +ErasePolarity = 1 > +BlockSize = 0x1000 > +NumBlocks = 0x140 > + > +################################################################################ > +# > +# Following are lists of FD Region layout which correspond to the locations of different > +# images within the flash device. > +# > +# Regions must be defined in ascending order and may not overlap. > +# > +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by > +# the pipe "|" character, followed by the size of the region, also in hex with the leading > +# "0x" characters. Like: > +# Offset|Size > +# PcdOffsetCName|PcdSizeCName > +# RegionType > +# > +################################################################################ > +0x00000000|0x00140000 > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > +FV = FVMAIN_COMPACT > + > +!include Platform/NXP/FVRules.fdf.inc > +################################################################################ > +# > +# FV Section > +# > +# [FV] section is used to define what components or modules are placed within a flash > +# device file. This section also defines order the components and modules are positioned > +# within the image. The [FV] section consists of define statements, set statements and > +# module statements. > +# > +################################################################################ > + > +[FV.FvMain] > +FvNameGuid = 1037c42b-8452-4c41-aac7-41e6c31468da > +BlockSize = 0x1 > +NumBlocks = 0 # This FV gets compressed so make it just big enough > +FvAlignment = 8 # FV alignment and FV attributes setting. > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > + > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > + > + # > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > + # > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > + > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf > + INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf > + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > + INF MdeModulePkg/Universal/Metronome/Metronome.inf > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > + > + # > + # Multiple Console IO support > + # > + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > + > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > + > + # > + # FAT filesystem + GPT/MBR partitioning > + # > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > + INF FatPkg/EnhancedFatDxe/Fat.inf > + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > + > + # > + # UEFI application (Shell Embedded Boot Loader) > + # > + INF ShellPkg/Application/Shell/Shell.inf > + > + # > + # Bds > + # > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > + INF MdeModulePkg/Application/UiApp/UiApp.inf > + > +[FV.FVMAIN_COMPACT] > +FvAlignment = 8 > +ERASE_POLARITY = 1 > +MEMORY_MAPPED = TRUE > +STICKY_WRITE = TRUE > +LOCK_CAP = TRUE > +LOCK_STATUS = TRUE > +WRITE_DISABLED_CAP = TRUE > +WRITE_ENABLED_CAP = TRUE > +WRITE_STATUS = TRUE > +WRITE_LOCK_CAP = TRUE > +WRITE_LOCK_STATUS = TRUE > +READ_DISABLED_CAP = TRUE > +READ_ENABLED_CAP = TRUE > +READ_STATUS = TRUE > +READ_LOCK_CAP = TRUE > +READ_LOCK_STATUS = TRUE > + > + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf > + INF MdeModulePkg/Core/Pei/PeiMain.inf > + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf > + INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf > + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf > + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf > + INF ArmPkg/Drivers/CpuPei/CpuPei.inf > + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf > + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > + > + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { > + SECTION FV_IMAGE = FVMAIN > + } > + } > diff --git a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > index de93681708e3..7802696bf39b 100644 > --- a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > +++ b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf > @@ -18,10 +18,14 @@ [Packages] > ArmPlatformPkg/ArmPlatformPkg.dec > MdeModulePkg/MdeModulePkg.dec > MdePkg/MdePkg.dec > + Silicon/NXP/Chassis2/Chassis2.dec > + Silicon/NXP/LS1046A/LS1046A.dec > + Silicon/NXP/NxpQoriqLs.dec > > [LibraryClasses] > ArmLib > DebugLib > + SocLib > > [Sources.common] > ArmPlatformLib.c > diff --git a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c > index f59e7aa556a3..e1f20da09337 100644 > --- a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c > +++ b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c > @@ -8,8 +8,10 @@ > > #include > #include > +#include > > #include > +#include > > ARM_CORE_INFO mLS1046aMpCoreInfoTable[] = { > { > @@ -38,6 +40,54 @@ ArmPlatformGetBootMode ( > return BOOT_WITH_FULL_CONFIGURATION; > } > > +/** > + Get the clocks supplied by Platform(Board) to NXP Layerscape SOC IPs > + > + @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock > + is to be retrieved. > + @param[in] ... Variable argument list which is parsed based on > + ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then > + the second argument will be interpreted as controller > + number. > + if ClockType is NXP_CORE_CLOCK, then second argument > + is interpreted as cluster number and third argument is > + interpreted as core number (within the cluster) > + > + @return Actual Clock Frequency. Return value 0 should be > + interpreted as clock not being provided to IP. > +**/ > +UINT64 > +EFIAPI > +NxpPlatformGetClock( > + IN UINT32 ClockType, > + ... > + ) > +{ > + UINT64 Clock; > + VA_LIST Args; > + > + Clock = 0; > + > + VA_START (Args, ClockType); > + > + switch (ClockType) { > + case NXP_SYSTEM_CLOCK: > + Clock = 100 * 1000 * 1000; // 100 MHz > + break; > + case NXP_I2C_CLOCK: > + case NXP_UART_CLOCK: > + Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK); > + Clock = SocGetClock (Clock, ClockType, Args); > + break; > + default: > + break; > + } > + > + VA_END (Args); > + > + return Clock; > +} > + > /** > Initialize controllers that must setup in the normal world > > @@ -50,7 +100,7 @@ ArmPlatformInitialize ( > IN UINTN MpId > ) > { > - //TODO: Implement me > + SocInit (); > > return EFI_SUCCESS; > } > @@ -71,6 +121,7 @@ PrePeiCoreGetMpCoreInfo ( > } > > ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; > +NXP_PLATFORM_GET_CLOCK_PPI gPlatformGetClockPpi = { NxpPlatformGetClock }; > > EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { > { > diff --git a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c > index 24d949369b98..f712d5931821 100644 > --- a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c > +++ b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c > @@ -7,7 +7,12 @@ > **/ > > #include > +#include > #include > +#include > +#include > + > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5 > > /** > Return the Virtual Memory Map of your platform > @@ -24,5 +29,47 @@ ArmPlatformGetVirtualMemoryMap ( > IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > ) > { > - ASSERT(0); > + UINTN Index; > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > + > + Index = 0; > + > + ASSERT (VirtualMemoryMap != NULL); > + > + VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * > + MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > + > + if (VirtualMemoryTable == NULL) { > + DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__)); > + return; > + } > + > + VirtualMemoryTable[Index].PhysicalBase = LS1046A_DRAM0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LS1046A_DRAM0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LS1046A_DRAM0_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > + > + VirtualMemoryTable[Index].PhysicalBase = LS1046A_DRAM1_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LS1046A_DRAM1_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LS1046A_DRAM1_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; > + > + // CCSR Space > + VirtualMemoryTable[Index].PhysicalBase = LS1046A_CCSR_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LS1046A_CCSR_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LS1046A_CCSR_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // QSPI > + VirtualMemoryTable[Index].PhysicalBase = LS1046A_QSPI0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].VirtualBase = LS1046A_QSPI0_PHYS_ADDRESS; > + VirtualMemoryTable[Index].Length = LS1046A_QSPI0_SIZE; > + VirtualMemoryTable[Index++].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > + > + // End of Table > + ZeroMem (&VirtualMemoryTable[Index], sizeof (ARM_MEMORY_REGION_DESCRIPTOR)); > + > + ASSERT (Index < MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > + > + *VirtualMemoryMap = VirtualMemoryTable; > } > -- > 2.17.1 >