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From: "Pankaj Bansal" <pankaj.bansal@nxp.com>
To: Leif Lindholm <leif@nuviainc.com>,
	Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	devel@edk2.groups.io, Varun Sethi <V.Sethi@nxp.com>,
	Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>,
	Augustine Philips <Augustine.Philips@arm.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Arokia Samy <arokia.samy@puresoftware.com>,
	Kuldip Dwivedi <kuldip.dwivedi@puresoftware.com>
Subject: [PATCH edk2-platforms v3 2/5] Silicon/NXP/LS1043A: Fix the RCW bits' parsing
Date: Tue,  7 Jul 2020 23:57:16 -0500	[thread overview]
Message-ID: <20200708045719.2648-3-pankaj.bansal@oss.nxp.com> (raw)
In-Reply-To: <20200708045719.2648-1-pankaj.bansal@oss.nxp.com>

From: Pankaj Bansal <pankaj.bansal@nxp.com>

For LS1043A SOC the DCFG registers are read in big endian format.
After Reading the registers in code we have the registers in Little
Endian Bit format i.e. LSBit 0.

However, the RCW bits in RCWSR registers in LS1043A SOC are in MSBit 0
format.

Currently, we are parsing the RCW bits in LE bit format i.e. LSBit 0.
Therefore, Fix the RCW bits' parsing as per MSBit 0.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
---

Notes:
    V3:
    - Added Reviewed-by: Leif Lindholm <leif@nuviainc.com>
    
    V2:
    - Changed commit header and description.
    - Moved changes in comments to previous commit

 Silicon/NXP/LS1043A/Include/Soc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/NXP/LS1043A/Include/Soc.h b/Silicon/NXP/LS1043A/Include/Soc.h
index c694576ed18d..40619536c6fe 100644
--- a/Silicon/NXP/LS1043A/Include/Soc.h
+++ b/Silicon/NXP/LS1043A/Include/Soc.h
@@ -78,7 +78,7 @@ Bit(s) | Field Name  | Description                  | Notes/comments
 
   which is why the RCW bits in RCWSR registers are parsed this way
 **/
-#define SYS_PLL_RAT(x)  (((x) & 0x7c) >> 2) // Bits 2-6
+#define SYS_PLL_RAT(x)  (((x) >> 25) & 0x1f) // Bits 2-6
 
 typedef NXP_LAYERSCAPE_CHASSIS2_DEVICE_CONFIG LS1043A_DEVICE_CONFIG;
 
-- 
2.17.1


  parent reply	other threads:[~2020-07-08  4:57 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-08  4:57 [PATCH edk2-platforms v3 0/5] Add LS1046AFRWY Platform Pankaj Bansal
2020-07-08  4:57 ` [PATCH edk2-platforms v3 1/5] Silicon/NXP: Add comments explaining RCW bits' parsing Pankaj Bansal
2020-07-08  4:57 ` Pankaj Bansal [this message]
2020-07-08  4:57 ` [PATCH edk2-platforms v3 3/5] Silicon/NXP: Add LS1046A Soc package Pankaj Bansal
2020-07-08  4:57 ` [PATCH edk2-platforms v3 4/5] Platform/NXP: Add LS1046AFRWY Platform Pankaj Bansal
2020-07-13 16:23   ` Leif Lindholm
2020-07-08  4:57 ` [PATCH edk2-platforms v3 5/5] Platform/NXP/LS1046aFrwyPkg: Add VarStore Pankaj Bansal

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