From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com []) by mx.groups.io with SMTP id smtpd.web12.35600.1595244629521419095 for ; Mon, 20 Jul 2020 04:30:45 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: guomin.jiang@intel.com) IronPort-SDR: zQlleJYkCkeQ3hRWZlZ2N4T+pRGTUdyj6bT0cGVBXwOqm1zCWG+thSLIbS47GQS1KXz1cckXOm JdL6YV6qJEfg== X-IronPort-AV: E=McAfee;i="6000,8403,9687"; a="137373212" X-IronPort-AV: E=Sophos;i="5.75,374,1589266800"; d="scan'208";a="137373212" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2020 04:30:45 -0700 IronPort-SDR: Z+VsCJAPqyBv1MPe3jUvU+JBbuhtQbT4IPxcUkEIGPPQBgF5qKNplPUGALP+49yqfGjYLqLKsH GsT/WOgmlEtA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,374,1589266800"; d="scan'208";a="271411284" Received: from guominji-mobl.ccr.corp.intel.com ([10.238.13.140]) by fmsmga008.fm.intel.com with ESMTP; 20 Jul 2020 04:30:43 -0700 From: "Guomin Jiang" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Laszlo Ersek , Rahul Kumar Subject: [PATCH v6 08/10] UefiCpuPkg: Correct some typos. Date: Mon, 20 Jul 2020 19:30:20 +0800 Message-Id: <20200720113022.675-9-guomin.jiang@intel.com> X-Mailer: git-send-email 2.25.1.windows.1 In-Reply-To: <20200720113022.675-1-guomin.jiang@intel.com> References: <20200720113022.675-1-guomin.jiang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Correct some typos. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Rahul Kumar Signed-off-by: Guomin Jiang Reviewed-by: Laszlo Ersek --- UefiCpuPkg/CpuMpPei/CpuMpPei.h | 2 +- .../Library/CpuExceptionHandlerLib/CpuExceptionCommon.h | 4 ++-- UefiCpuPkg/CpuMpPei/CpuPaging.c | 4 ++-- .../CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 4 ++-- .../Library/CpuExceptionHandlerLib/SecPeiCpuException.c | 2 +- .../Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 4 ++-- 6 files changed, 10 insertions(+), 10 deletions(-) diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h index 309478cbe14c..6a481a84dcc7 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h @@ -424,7 +424,7 @@ InitializeCpuMpWorker ( ); /** - Enabl/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE. + Enable/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE. Doing this in the memory-discovered callback is to make sure the Stack Guard feature to cover as most PEI code as possible. diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h index 805dd9cbb4ff..0544d6dba631 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h @@ -90,8 +90,8 @@ AsmGetTemplateAddressMap ( **/ VOID ArchUpdateIdtEntry ( - IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, - IN UINTN InterruptHandler + OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry, + IN UINTN InterruptHandler ); /** diff --git a/UefiCpuPkg/CpuMpPei/CpuPaging.c b/UefiCpuPkg/CpuMpPei/CpuPaging.c index 8ab7dfcce3a0..50ad4277af79 100644 --- a/UefiCpuPkg/CpuMpPei/CpuPaging.c +++ b/UefiCpuPkg/CpuMpPei/CpuPaging.c @@ -153,7 +153,7 @@ GetPhysicalAddressWidth ( Get the type of top level page table. @retval Page512G PML4 paging. - @retval Page1G PAE paing. + @retval Page1G PAE paging. **/ PAGE_ATTRIBUTE @@ -583,7 +583,7 @@ SetupStackGuardPage ( } /** - Enabl/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE. + Enable/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE. Doing this in the memory-discovered callback is to make sure the Stack Guard feature to cover as most PEI code as possible. diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c index 1aafb7dac139..903449e0daa9 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -18,8 +18,8 @@ **/ VOID ArchUpdateIdtEntry ( - IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, - IN UINTN InterruptHandler + OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry, + IN UINTN InterruptHandler ) { IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index 20148db74cf8..d4ae153c5742 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -87,7 +87,7 @@ InitializeCpuExceptionHandlers ( IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR); if (IdtEntryCount > CPU_EXCEPTION_NUM) { // - // CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most + // CPU exception library only setup CPU_EXCEPTION_NUM exception handler at most // IdtEntryCount = CPU_EXCEPTION_NUM; } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c index 894c1cfb7533..d3da16e4dfa2 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c @@ -17,8 +17,8 @@ **/ VOID ArchUpdateIdtEntry ( - IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, - IN UINTN InterruptHandler + OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry, + IN UINTN InterruptHandler ) { IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler; -- 2.25.1.windows.1