From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by mx.groups.io with SMTP id smtpd.web12.17993.1597412458741510794 for ; Fri, 14 Aug 2020 06:40:59 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20150623.gappssmtp.com header.s=20150623 header.b=J7WOe2PO; spf=pass (domain: nuviainc.com, ip: 209.85.221.67, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f67.google.com with SMTP id a5so8391446wrm.6 for ; Fri, 14 Aug 2020 06:40:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=fIDI/7XX2DVBsH7E375jClTRF91xXX29Dk3+XBye0DU=; b=J7WOe2POnbS4ahM/9jpbTlvpJL3Hd2edrMxL/S6LeuH6e+q4WZBhMxpRiXme4yPrVa pVUxVRjrvHDQfW3up8/4ZAxNqagAMrcJn817CxnxxiDcmkQlylXdII7h3sF3cMCpE98t FqqCBXcLixg9Ob2eiZ9IWcrW4fQxL4ZikfpVqBcPAwCzYX6HUfiQG4c3ALI2mllMxa3n Ot+xeAKppyF19t46NbQWBvapAsDP8GJkVmj4+F4za3+/6kULpxPZ+lRgwteUJFc/JRfM vlOY0XyMQg9peOzpb7mpGtU9JtKObqf+kys9ju/W5JjhqLdXpG06vLUXvoyRO/36OpXx heDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=fIDI/7XX2DVBsH7E375jClTRF91xXX29Dk3+XBye0DU=; b=KyDPgUtBMII51XM3RBcXBHd6UVtH6OqEbBFeTe/2gejBC2iuKyx/b+/HrknChmnhoJ BmJe1Lv221BpRSm3gUeLIj7kGQJcsvvEXZ69z/KZ3xUCp/EVfmBZ7kcNKQTtW9RB9uk7 XBHHpIFJeRorbFoXvNAmQbz/WrxHuN0e89gqAak+60ba0Y/wna3mDybrvbLLqQEmKNUD mSOGxH4wxLfo704uM3V/cUitYNx5hji0ex9pGIYDF8Bto0rDL+VUuoJXV0pYH+ggv5R4 G9FZQddSChkh2hsyMq6wUH3lAezSOLs2jDazO3AREwMD6qkfuzfcFbyJYIPncSAGZPbm A86Q== X-Gm-Message-State: AOAM533hNSeAwQDnmB2gHhGe2N7uw3mGyZ1xCG40GTCEDtTY6J1rcO0K 4k9DFtbSvCHObJIQXnfCYfufh3/GPF9RTSP4pT/ArTwGG7sJioXcEf+qArKdTFu9GJ79zlHP2kF +v6DhuOxNw2BIPLdFE1oCdzgbdh00nP/KyzNcEjQEPCsLxFs1VBBGiW/TOk1M/BmVcY9E X-Google-Smtp-Source: ABdhPJwXkhLP1H0qDELb13foVd9oVLHp/kVnvRfjuDGfH76/X/TKytT251pTp2Ul1S9PO+T9vWltug== X-Received: by 2002:adf:dfcf:: with SMTP id q15mr2900225wrn.345.1597412456509; Fri, 14 Aug 2020 06:40:56 -0700 (PDT) Return-Path: Received: from vanye ([2001:470:1f09:12f0:b26e:bfff:fea9:f1b8]) by smtp.gmail.com with ESMTPSA id t3sm15080327wrx.5.2020.08.14.06.40.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Aug 2020 06:40:56 -0700 (PDT) Date: Fri, 14 Aug 2020 14:40:53 +0100 From: "Leif Lindholm" To: devel@edk2.groups.io, daniel.schaefer@hpe.com Cc: Abner Chang , Gilbert Chen , Michael D Kinney , Ard Biesheuvel Subject: Re: [edk2-devel] [PATCH 1/1] edk2-platforms: Deduplicate RISC-V SMBIOS Message-ID: <20200814134053.GW23500@vanye> References: <20200807164444.1304-1-daniel.schaefer@hpe.com> <20200807164444.1304-2-daniel.schaefer@hpe.com> MIME-Version: 1.0 In-Reply-To: <20200807164444.1304-2-daniel.schaefer@hpe.com> User-Agent: Mutt/1.10.1 (2018-07-13) Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Daniel, Thanks for this rework. It looks a massive improvement. On Fri, Aug 07, 2020 at 18:44:44 +0200, Daniel Schaefer wrote: > There was too much code, which wasn't called but it could have generated those SMBIOS table entries: > > - Type 4 for each core (4xU51, 1xE51) > - Type 7 L1 instruction/data for each core > - Type 7 L2 for U54 > - Type 44 for each core > - Type 4 for the coreplex > - Type 7 L2 for the coreplex > > Now it only has code for those entries: > > - Type 4 for SOC [1x] > - Type 7 L1 for SOC [1x] (even though every hart has own L1, but my Laptop's Intel i5 does that also) > - Type 7 L2 for SOC [1x] > - Type 44 for each hart, associated with CPU [5x] > > In addition to simplifying the SMBIOS tables, the code for U54 and E51 is > combined, like Leif suggested in his review. > > Here's what happened to the files: > > Expanded: > > - Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c > > Deleted file: > > - Silicon/SiFive/E51/Library/PeiCoreInfoHobLib/CoreInfoHob.c > - Silicon/SiFive/U54MCCoreplex/Library/PeiCoreInfoHobLib/CoreInfoHob.c > > Merged with E51 code into single file: > > - Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c > > Added SMBIOS Type 7 for L1 Cache, removed duplicated SMBIOS (Type 4 and 7 code): > > - Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c > > Cc: Abner Chang > Cc: Gilbert Chen > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Ard Biesheuvel > --- > Silicon/SiFive/SiFive.dec | 2 - > .../FreedomU500VC707Board/U500.dsc | 1 - > .../FreedomU540HiFiveUnleashedBoard/U540.dsc | 1 - > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 1 - > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 47 ---- > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 4 + > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 46 ---- > .../FirmwareContextProcessorSpecificLib.h | 11 + > .../Include/ProcessorSpecificHobData.h | 3 +- > Silicon/SiFive/Include/Library/SiFiveE51.h | 60 ----- > Silicon/SiFive/Include/Library/SiFiveU54.h | 50 ++-- > .../Include/Library/SiFiveU54MCCoreplex.h | 55 ---- > .../FirmwareContextProcessorSpecificLib.c | 26 ++ > .../Universal/Pei/PlatformPei/Platform.c | 2 +- > .../Universal/Pei/PlatformPei/Platform.c | 2 +- > .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 58 +---- > .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 235 ----------------- > .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 244 +++++++----------- > .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 184 ------------- > 19 files changed, 178 insertions(+), 854 deletions(-) I know you dropped some tables, but that's a *nice* diffstat. I guess this is effectively meant to be folded into existing commits? If so: Reviewed-by: Leif Lindholm If not, I might start grumbling about some unrelated cleanup in this patch... / Leif