From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ej1-f66.google.com (mail-ej1-f66.google.com [209.85.218.66]) by mx.groups.io with SMTP id smtpd.web11.62223.1597739070548726624 for ; Tue, 18 Aug 2020 01:24:31 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@9elements.com header.s=google header.b=VXGb8RTr; spf=pass (domain: 9elements.com, ip: 209.85.218.66, mailfrom: marcello.bauer@9elements.com) Received: by mail-ej1-f66.google.com with SMTP id t10so21026505ejs.8 for ; Tue, 18 Aug 2020 01:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Xo4y+J54nOEmncVKjHxP57e7fXfv0Z2+ab2DYL7qOHY=; b=VXGb8RTrlH0apv551SAXeqeKr9ExBfL/LGdHMhtMYqAcrFTCgUmcevOzFp0AxNL0LG DM7kiSn13DlkwoWvfszCAD33O/upjThF6zEgt0KH98bOQBekYqfNCY5Y8cU29ixAcqZB xSOpRFFgNWf2Xg8ZuN6ips3djSgJCPT0s843rWHCoqYrgC++ujaZ9g0pwVvvr29mCcaw 9Hx6Mk/9SYEkarPvqKKKohMaawQHTmd0NHQSt8age+9ZbpKDotEodnDsQwxSb7ncG/7r a2rNrl8kuGXh0jGG9wt23pET2WaEGjKhapwheQMSJRwIhjExYznmV0lEoHdmAZMzkJtd Nh3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Xo4y+J54nOEmncVKjHxP57e7fXfv0Z2+ab2DYL7qOHY=; b=kmcq4Gv/dynTAHzlArHaYImE1Og219Pwnb2US///5f+Bbl8L05ITbervT8n9rgjElR MnaR9n1NN6FZsfWQykjpQThqj3H3+7Z00VOptPykufo+bmEo+nRYleoIZ0+wpzMlR1xW 6WbAyy+Am5NStuyfSPkNvQCC5dSqbDjqzQoCN/76IVbYA15/ZI/oNywPUOQvbccFMwif bEuyOATjOMJ+oUhuWca6MZjxJQYFotFS1qbClKXaegjOsu4VQ4sL0nZTXFjuAfavn6gU pjKnU3t66sQCIpQOzHblOIbEYL3PusE5M79GjSCr3El7zd6jb2qcR6VZ1r7jRZxrNM6G dBnA== X-Gm-Message-State: AOAM532DtrOc3mF+r6TTQ2ZZXlfgHfUcs9L+R21ZlvgwtYCZNN8gZdnB K+YbK6WO6QZyEz7h/Ev8DSGIxxqJWuls3w== X-Google-Smtp-Source: ABdhPJy4ie9ImyQZoAKl1P/KkEyV7eXr2b6W5/oA+7AE8N4sIGVmGEHitefT4uxzlypft7GSI+HrgA== X-Received: by 2002:a17:906:b6c3:: with SMTP id ec3mr18541044ejb.101.1597739068257; Tue, 18 Aug 2020 01:24:28 -0700 (PDT) Return-Path: Received: from T14.dut.n1ce.space ([2a02:908:e851:d750:9068:4d6d:42f:ebc8]) by smtp.gmail.com with ESMTPSA id z9sm15980030ejj.51.2020.08.18.01.24.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Aug 2020 01:24:27 -0700 (PDT) From: "Marcello Sylvester Bauer" To: devel@edk2.groups.io Cc: Patrick Rudolph , Christian Walter , Michael D Kinney , Liming Gao Subject: [PATCH v5 2/3] MdePkg: PciExpressLib support variable size MMCONF Date: Tue, 18 Aug 2020 10:24:20 +0200 Message-Id: <20200818082421.6168-3-marcello.bauer@9elements.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200818082421.6168-1-marcello.bauer@9elements.com> References: <20200818082421.6168-1-marcello.bauer@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Add support for arbitrary sized MMCONF by introducing a new PCD. Add a return value to point out invalid PCI addresses. Signed-off-by: Patrick Rudolph Signed-off-by: Marcello Sylvester Bauer Cc: Patrick Rudolph Cc: Christian Walter Cc: Michael D Kinney Cc: Liming Gao MdePkg: Support variable size MMCONF * ASSERT if pci address is out of bound * Add return value for invalid address Signed-off-by: Marcello Sylvester Bauer MdePkg: remove out of bound assertion Signed-off-by: Marcello Sylvester Bauer --- MdePkg/MdePkg.dec | 4 + MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf | 6 +- MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf | 1 + MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf | 1 + MdePkg/Include/Library/PciExpressLib.h | 5 +- MdePkg/Library/BasePciExpressLib/PciExpressLib.c | 216 += +++++++++++++--- MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c | 247 += +++++++++++++++---- MdePkg/Library/SmmPciExpressLib/PciExpressLib.c | 218 += +++++++++++++--- 8 files changed, 584 insertions(+), 114 deletions(-) diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 73f6c2407357..812be75fb3b2 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -2274,6 +2274,10 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynami= c, PcdsDynamicEx] # @Prompt PCI Express Base Address.=0D gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000|UINT64|0x00= 00000a=0D =0D + ## This value is used to set the size of PCI express hierarchy. The defa= ult is 256 MB.=0D + # @Prompt PCI Express Base Size.=0D + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x10000000|UINT64|0x00000= 00f=0D +=0D ## Default current ISO 639-2 language: English & French.=0D # @Prompt Default Value of LangCodes Variable.=0D gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultLangCodes|"engfraengfra"|= VOID*|0x0000001c=0D diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf b/MdePk= g/Library/BasePciExpressLib/BasePciExpressLib.inf index a7edb74cde71..12734b022ac7 100644 --- a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf +++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf @@ -1,7 +1,7 @@ ## @file=0D -# Instance of PCI Express Library using the 256 MB PCI Express MMIO windo= w.=0D +# Instance of PCI Express Library using the variable size PCI Express MMI= O window.=0D #=0D -# PCI Express Library that uses the 256 MB PCI Express MMIO window to per= form=0D +# PCI Express Library that uses the variable size PCI Express MMIO window= to perform=0D # PCI Configuration cycles. Layers on top of an I/O Library instance.=0D #=0D # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
= =0D @@ -38,4 +38,4 @@ [LibraryClasses] =0D [Pcd]=0D gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES=0D -=0D + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize ## CONSUMES=0D diff --git a/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib= .inf b/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf index 8d2ba1d18735..26a59bda1948 100644 --- a/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf +++ b/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf @@ -47,3 +47,4 @@ [LibraryClasses] =0D [Pcd]=0D gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES=0D + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize ## CONSUMES=0D diff --git a/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf b/MdePkg/= Library/SmmPciExpressLib/SmmPciExpressLib.inf index 729f6a3083ba..78cab6352fac 100644 --- a/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf +++ b/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf @@ -35,3 +35,4 @@ [LibraryClasses] =0D [Pcd]=0D gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES=0D + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize ## CONSUMES=0D diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Librar= y/PciExpressLib.h index 826fdcf7db6c..d78193a0a352 100644 --- a/MdePkg/Include/Library/PciExpressLib.h +++ b/MdePkg/Include/Library/PciExpressLib.h @@ -2,8 +2,9 @@ Provides services to access PCI Configuration Space using the MMIO PCI E= xpress window.=0D =0D This library is identical to the PCI Library, except the access method f= or performing PCI=0D - configuration cycles must be through the 256 MB PCI Express MMIO window = whose base address=0D - is defined by PcdPciExpressBaseAddress.=0D + configuration cycles must be through the PCI Express MMIO window whose b= ase address=0D + is defined by PcdPciExpressBaseAddress and size defined by PcdPciExpress= BaseSize.=0D +=0D =0D Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D diff --git a/MdePkg/Library/BasePciExpressLib/PciExpressLib.c b/MdePkg/Libr= ary/BasePciExpressLib/PciExpressLib.c index 99a166c3609b..910dd75bb48c 100644 --- a/MdePkg/Library/BasePciExpressLib/PciExpressLib.c +++ b/MdePkg/Library/BasePciExpressLib/PciExpressLib.c @@ -22,7 +22,8 @@ =0D /**=0D Assert the validity of a PCI address. A valid PCI address should contain= 1's=0D - only in the low 28 bits.=0D + only in the low 28 bits. PcdPciExpressBaseSize limits the size to the re= al=0D + number of PCI busses in this segment.=0D =0D @param A The address to validate.=0D =0D @@ -79,6 +80,24 @@ GetPciExpressBaseAddress ( return (VOID*)(UINTN) PcdGet64 (PcdPciExpressBaseAddress);=0D }=0D =0D +/**=0D + Gets the size of PCI Express.=0D +=0D + This internal functions retrieves PCI Express Base Size via a PCD entry= =0D + PcdPciExpressBaseSize.=0D +=0D + @return The base size of PCI Express.=0D +=0D +**/=0D +STATIC=0D +UINTN=0D +PcdPciExpressBaseSize (=0D + VOID=0D + )=0D +{=0D + return (UINTN) PcdGet64 (PcdPciExpressBaseSize);=0D +}=0D +=0D /**=0D Reads an 8-bit PCI configuration register.=0D =0D @@ -91,7 +110,8 @@ GetPciExpressBaseAddress ( @param Address The address that encodes the PCI Bus, Device, Function a= nd=0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -101,6 +121,9 @@ PciExpressRead8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioRead8 ((UINTN) GetPciExpressBaseAddress () + Address);=0D }=0D =0D @@ -117,7 +140,8 @@ PciExpressRead8 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -128,6 +152,9 @@ PciExpressWrite8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioWrite8 ((UINTN) GetPciExpressBaseAddress () + Address, Value)= ;=0D }=0D =0D @@ -148,7 +175,8 @@ PciExpressWrite8 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -159,6 +187,9 @@ PciExpressOr8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioOr8 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);= =0D }=0D =0D @@ -179,7 +210,8 @@ PciExpressOr8 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -190,6 +222,9 @@ PciExpressAnd8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioAnd8 ((UINTN) GetPciExpressBaseAddress () + Address, AndData)= ;=0D }=0D =0D @@ -212,7 +247,8 @@ PciExpressAnd8 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -224,6 +260,9 @@ PciExpressAndThenOr8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioAndThenOr8 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D AndData,=0D @@ -249,7 +288,9 @@ PciExpressAndThenOr8 ( @param EndBit The ordinal of the most significant bit in the bit fie= ld.=0D Range 0..7.=0D =0D - @return The value of the bit field read from the PCI configuration regis= ter.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configuration= =0D + register.=0D =0D **/=0D UINT8=0D @@ -261,6 +302,9 @@ PciExpressBitFieldRead8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldRead8 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -289,7 +333,8 @@ PciExpressBitFieldRead8 ( Range 0..7.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -302,6 +347,9 @@ PciExpressBitFieldWrite8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldWrite8 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -334,7 +382,8 @@ PciExpressBitFieldWrite8 ( Range 0..7.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -347,6 +396,9 @@ PciExpressBitFieldOr8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldOr8 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -379,7 +431,8 @@ PciExpressBitFieldOr8 ( Range 0..7.=0D @param AndData The value to AND with the PCI configuration register.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -392,6 +445,9 @@ PciExpressBitFieldAnd8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldAnd8 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -428,7 +484,8 @@ PciExpressBitFieldAnd8 ( @param AndData The value to AND with the PCI configuration register.= =0D @param OrData The value to OR with the result of the AND operation.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -442,6 +499,9 @@ PciExpressBitFieldAndThenOr8 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldAndThenOr8 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -464,7 +524,8 @@ PciExpressBitFieldAndThenOr8 ( @param Address The address that encodes the PCI Bus, Device, Function a= nd=0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT16=0D @@ -474,6 +535,9 @@ PciExpressRead16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioRead16 ((UINTN) GetPciExpressBaseAddress () + Address);=0D }=0D =0D @@ -491,7 +555,8 @@ PciExpressRead16 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT16=0D @@ -502,6 +567,9 @@ PciExpressWrite16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioWrite16 ((UINTN) GetPciExpressBaseAddress () + Address, Value= );=0D }=0D =0D @@ -523,7 +591,8 @@ PciExpressWrite16 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -534,6 +603,9 @@ PciExpressOr16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioOr16 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);= =0D }=0D =0D @@ -555,7 +627,8 @@ PciExpressOr16 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -566,6 +639,9 @@ PciExpressAnd16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioAnd16 ((UINTN) GetPciExpressBaseAddress () + Address, AndData= );=0D }=0D =0D @@ -589,7 +665,8 @@ PciExpressAnd16 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -601,6 +678,9 @@ PciExpressAndThenOr16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioAndThenOr16 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D AndData,=0D @@ -627,7 +707,9 @@ PciExpressAndThenOr16 ( @param EndBit The ordinal of the most significant bit in the bit fie= ld.=0D Range 0..15.=0D =0D - @return The value of the bit field read from the PCI configuration regis= ter.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configurati= on=0D + register.=0D =0D **/=0D UINT16=0D @@ -639,6 +721,9 @@ PciExpressBitFieldRead16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldRead16 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -668,7 +753,8 @@ PciExpressBitFieldRead16 ( Range 0..15.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -681,6 +767,9 @@ PciExpressBitFieldWrite16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldWrite16 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -714,7 +803,8 @@ PciExpressBitFieldWrite16 ( Range 0..15.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -727,6 +817,9 @@ PciExpressBitFieldOr16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldOr16 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -760,7 +853,8 @@ PciExpressBitFieldOr16 ( Range 0..15.=0D @param AndData The value to AND with the PCI configuration register.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -773,6 +867,9 @@ PciExpressBitFieldAnd16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldAnd16 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -810,7 +907,8 @@ PciExpressBitFieldAnd16 ( @param AndData The value to AND with the PCI configuration register.= =0D @param OrData The value to OR with the result of the AND operation.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -824,6 +922,9 @@ PciExpressBitFieldAndThenOr16 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldAndThenOr16 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -846,7 +947,8 @@ PciExpressBitFieldAndThenOr16 ( @param Address The address that encodes the PCI Bus, Device, Function a= nd=0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT32=0D @@ -856,6 +958,9 @@ PciExpressRead32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioRead32 ((UINTN) GetPciExpressBaseAddress () + Address);=0D }=0D =0D @@ -873,7 +978,8 @@ PciExpressRead32 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.= =0D =0D **/=0D UINT32=0D @@ -884,6 +990,9 @@ PciExpressWrite32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioWrite32 ((UINTN) GetPciExpressBaseAddress () + Address, Value= );=0D }=0D =0D @@ -905,7 +1014,8 @@ PciExpressWrite32 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -916,6 +1026,9 @@ PciExpressOr32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioOr32 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);= =0D }=0D =0D @@ -937,7 +1050,8 @@ PciExpressOr32 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -948,6 +1062,9 @@ PciExpressAnd32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData= );=0D }=0D =0D @@ -971,7 +1088,8 @@ PciExpressAnd32 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -983,6 +1101,9 @@ PciExpressAndThenOr32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioAndThenOr32 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D AndData,=0D @@ -1009,7 +1130,9 @@ PciExpressAndThenOr32 ( @param EndBit The ordinal of the most significant bit in the bit fie= ld.=0D Range 0..31.=0D =0D - @return The value of the bit field read from the PCI configuration regis= ter.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI=0D + configuration register.=0D =0D **/=0D UINT32=0D @@ -1021,6 +1144,9 @@ PciExpressBitFieldRead32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldRead32 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -1050,7 +1176,8 @@ PciExpressBitFieldRead32 ( Range 0..31.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -1063,6 +1190,9 @@ PciExpressBitFieldWrite32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldWrite32 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -1096,7 +1226,8 @@ PciExpressBitFieldWrite32 ( Range 0..31.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -1109,6 +1240,9 @@ PciExpressBitFieldOr32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldOr32 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -1142,7 +1276,8 @@ PciExpressBitFieldOr32 ( Range 0..31.=0D @param AndData The value to AND with the PCI configuration register.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -1155,6 +1290,9 @@ PciExpressBitFieldAnd32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldAnd32 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -1192,7 +1330,8 @@ PciExpressBitFieldAnd32 ( @param AndData The value to AND with the PCI configuration register.= =0D @param OrData The value to OR with the result of the AND operation.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regi= ster.=0D =0D **/=0D UINT32=0D @@ -1206,6 +1345,9 @@ PciExpressBitFieldAndThenOr32 ( )=0D {=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D PcdPciExpressBaseSize()) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldAndThenOr32 (=0D (UINTN) GetPciExpressBaseAddress () + Address,=0D StartBit,=0D @@ -1235,7 +1377,8 @@ PciExpressBitFieldAndThenOr32 ( @param Size The size in bytes of the transfer.=0D @param Buffer The pointer to a buffer receiving the data read.=0D =0D - @return Size read data from StartAddress.=0D + @retval (UINTN)-1 Invalid PCI address.=0D + @retval other Size read data from StartAddress.=0D =0D **/=0D UINTN=0D @@ -1249,6 +1392,9 @@ PciExpressReadBuffer ( UINTN ReturnValue;=0D =0D ASSERT_INVALID_PCI_ADDRESS (StartAddress);=0D + if (StartAddress >=3D PcdPciExpressBaseSize()) {=0D + return (UINTN) -1;=0D + }=0D ASSERT (((StartAddress & 0xFFF) + Size) <=3D 0x1000);=0D =0D if (Size =3D=3D 0) {=0D @@ -1335,7 +1481,8 @@ PciExpressReadBuffer ( @param Size The size in bytes of the transfer.=0D @param Buffer The pointer to a buffer containing the data to wri= te.=0D =0D - @return Size written to StartAddress.=0D + @retval (UINTN)-1 Invalid PCI address.=0D + @retval other Size written to StartAddress.=0D =0D **/=0D UINTN=0D @@ -1349,6 +1496,9 @@ PciExpressWriteBuffer ( UINTN ReturnValue;=0D =0D ASSERT_INVALID_PCI_ADDRESS (StartAddress);=0D + if (StartAddress >=3D PcdPciExpressBaseSize()) {=0D + return (UINTN) -1;=0D + }=0D ASSERT (((StartAddress & 0xFFF) + Size) <=3D 0x1000);=0D =0D if (Size =3D=3D 0) {=0D diff --git a/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c b/MdePk= g/Library/DxeRuntimePciExpressLib/PciExpressLib.c index b8995435109f..cb80725c5fa6 100644 --- a/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c +++ b/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c @@ -25,6 +25,16 @@ #include =0D #include =0D =0D +/**=0D + Assert the validity of a PCI address. A valid PCI address should contain = 1's=0D + only in the low 28 bits.=0D +=0D + @param A The address to validate.=0D +=0D +**/=0D +#define ASSERT_INVALID_PCI_ADDRESS(A) \=0D + ASSERT (((A) & ~0xfffffff) =3D=3D 0)=0D +=0D ///=0D /// Define table for mapping PCI Express MMIO physical addresses to virtua= l addresses at OS runtime=0D ///=0D @@ -39,9 +49,10 @@ typedef struct { EFI_EVENT mDxeRuntimePciExpressLibVirtualNot= ifyEvent =3D NULL;=0D =0D ///=0D -/// Module global that contains the base physical address of the PCI Expre= ss MMIO range.=0D +/// Module global that contains the base physical address and size of the = PCI Express MMIO range.=0D ///=0D UINTN mDxeRuntimePciExpressLibPciExpress= BaseAddress =3D 0;=0D +UINTN mDxeRuntimePciExpressLibPciExpress= BaseSize =3D 0;=0D =0D ///=0D /// The number of PCI devices that have been registered for runtime access= .=0D @@ -120,6 +131,7 @@ DxeRuntimePciExpressLibConstructor ( // Cache the physical address of the PCI Express MMIO range into a modul= e global variable=0D //=0D mDxeRuntimePciExpressLibPciExpressBaseAddress =3D (UINTN) PcdGet64 (PcdP= ciExpressBaseAddress);=0D + mDxeRuntimePciExpressLibPciExpressBaseSize =3D (UINTN) PcdGet64 (PcdPciE= xpressBaseSize);=0D =0D //=0D // Register SetVirtualAddressMap () notify function=0D @@ -179,8 +191,12 @@ DxeRuntimePciExpressLibDestructor ( This internal functions retrieves PCI Express Base Address via a PCD ent= ry=0D PcdPciExpressBaseAddress.=0D =0D - @param Address The address that encodes the PCI Bus, Device, Function = and Register.=0D - @return The base address of PCI Express.=0D + If Address > 0x0FFFFFFF, then ASSERT().=0D +=0D + @param Address The address that encodes the PCI Bus, Device, Function= and Register.=0D +=0D + @retval (UINTN)-1 Invalid PCI address.=0D + @retval other The base address of PCI Express.=0D =0D **/=0D UINTN=0D @@ -193,7 +209,14 @@ GetPciExpressAddress ( //=0D // Make sure Address is valid=0D //=0D - ASSERT (((Address) & ~0xfffffff) =3D=3D 0);=0D + ASSERT_INVALID_PCI_ADDRESS (Address);=0D +=0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINTN) -1;=0D + }=0D =0D //=0D // Convert Address to a physical address in the MMIO PCI Express range=0D @@ -236,7 +259,6 @@ GetPciExpressAddress ( //=0D // No match was found. This is a critical error at OS runtime, so ASSER= T() and force a breakpoint.=0D //=0D - ASSERT (FALSE);=0D CpuBreakpoint();=0D =0D //=0D @@ -288,7 +310,14 @@ PciExpressRegisterForRuntimeAccess ( //=0D // Make sure Address is valid=0D //=0D - ASSERT (((Address) & ~0xfffffff) =3D=3D 0);=0D + ASSERT_INVALID_PCI_ADDRESS (Address);=0D +=0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return RETURN_UNSUPPORTED;=0D + }=0D =0D //=0D // Convert Address to a physical address in the MMIO PCI Express range=0D @@ -354,8 +383,8 @@ PciExpressRegisterForRuntimeAccess ( =0D @param Address The address that encodes the PCI Bus, Device, Function a= nd=0D Register.=0D -=0D - @return The read value from the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -364,6 +393,10 @@ PciExpressRead8 ( IN UINTN Address=0D )=0D {=0D + ASSERT_INVALID_PCI_ADDRESS (Address);=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioRead8 (GetPciExpressAddress (Address));=0D }=0D =0D @@ -380,7 +413,8 @@ PciExpressRead8 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -390,6 +424,9 @@ PciExpressWrite8 ( IN UINT8 Value=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioWrite8 (GetPciExpressAddress (Address), Value);=0D }=0D =0D @@ -410,7 +447,8 @@ PciExpressWrite8 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -420,6 +458,9 @@ PciExpressOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioOr8 (GetPciExpressAddress (Address), OrData);=0D }=0D =0D @@ -440,7 +481,8 @@ PciExpressOr8 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -450,6 +492,9 @@ PciExpressAnd8 ( IN UINT8 AndData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioAnd8 (GetPciExpressAddress (Address), AndData);=0D }=0D =0D @@ -472,7 +517,8 @@ PciExpressAnd8 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -483,6 +529,9 @@ PciExpressAndThenOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioAndThenOr8 (=0D GetPciExpressAddress (Address),=0D AndData,=0D @@ -508,7 +557,8 @@ PciExpressAndThenOr8 ( @param EndBit The ordinal of the most significant bit in the bit fie= ld.=0D Range 0..7.=0D =0D - @return The value of the bit field read from the PCI configuration regis= ter.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configuration= register.=0D =0D **/=0D UINT8=0D @@ -519,6 +569,9 @@ PciExpressBitFieldRead8 ( IN UINTN EndBit=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldRead8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -547,7 +600,8 @@ PciExpressBitFieldRead8 ( Range 0..7.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -559,6 +613,9 @@ PciExpressBitFieldWrite8 ( IN UINT8 Value=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldWrite8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -591,7 +648,8 @@ PciExpressBitFieldWrite8 ( Range 0..7.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -603,6 +661,9 @@ PciExpressBitFieldOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldOr8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -635,7 +696,8 @@ PciExpressBitFieldOr8 ( Range 0..7.=0D @param AndData The value to AND with the PCI configuration register.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -647,6 +709,9 @@ PciExpressBitFieldAnd8 ( IN UINT8 AndData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldAnd8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -683,7 +748,8 @@ PciExpressBitFieldAnd8 ( @param AndData The value to AND with the PCI configuration register.= =0D @param OrData The value to OR with the result of the AND operation.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT8=0D @@ -696,6 +762,9 @@ PciExpressBitFieldAndThenOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldAndThenOr8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -718,7 +787,8 @@ PciExpressBitFieldAndThenOr8 ( @param Address The address that encodes the PCI Bus, Device, Function a= nd=0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT16=0D @@ -727,6 +797,9 @@ PciExpressRead16 ( IN UINTN Address=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioRead16 (GetPciExpressAddress (Address));=0D }=0D =0D @@ -744,7 +817,8 @@ PciExpressRead16 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT16=0D @@ -754,6 +828,9 @@ PciExpressWrite16 ( IN UINT16 Value=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioWrite16 (GetPciExpressAddress (Address), Value);=0D }=0D =0D @@ -775,7 +852,8 @@ PciExpressWrite16 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -785,6 +863,9 @@ PciExpressOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioOr16 (GetPciExpressAddress (Address), OrData);=0D }=0D =0D @@ -806,7 +887,8 @@ PciExpressOr16 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -816,6 +898,9 @@ PciExpressAnd16 ( IN UINT16 AndData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioAnd16 (GetPciExpressAddress (Address), AndData);=0D }=0D =0D @@ -839,7 +924,8 @@ PciExpressAnd16 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -850,6 +936,9 @@ PciExpressAndThenOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioAndThenOr16 (=0D GetPciExpressAddress (Address),=0D AndData,=0D @@ -876,7 +965,8 @@ PciExpressAndThenOr16 ( @param EndBit The ordinal of the most significant bit in the bit fie= ld.=0D Range 0..15.=0D =0D - @return The value of the bit field read from the PCI configuration regis= ter.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configurati= on register.=0D =0D **/=0D UINT16=0D @@ -887,6 +977,9 @@ PciExpressBitFieldRead16 ( IN UINTN EndBit=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldRead16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -916,7 +1009,8 @@ PciExpressBitFieldRead16 ( Range 0..15.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -928,6 +1022,9 @@ PciExpressBitFieldWrite16 ( IN UINT16 Value=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldWrite16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -961,7 +1058,8 @@ PciExpressBitFieldWrite16 ( Range 0..15.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -973,6 +1071,9 @@ PciExpressBitFieldOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldOr16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1006,7 +1107,8 @@ PciExpressBitFieldOr16 ( Range 0..15.=0D @param AndData The value to AND with the PCI configuration register.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -1018,6 +1120,9 @@ PciExpressBitFieldAnd16 ( IN UINT16 AndData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldAnd16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1055,7 +1160,8 @@ PciExpressBitFieldAnd16 ( @param AndData The value to AND with the PCI configuration register.= =0D @param OrData The value to OR with the result of the AND operation.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register= .=0D =0D **/=0D UINT16=0D @@ -1068,6 +1174,9 @@ PciExpressBitFieldAndThenOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldAndThenOr16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1090,7 +1199,8 @@ PciExpressBitFieldAndThenOr16 ( @param Address The address that encodes the PCI Bus, Device, Function a= nd=0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT32=0D @@ -1099,6 +1209,9 @@ PciExpressRead32 ( IN UINTN Address=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioRead32 (GetPciExpressAddress (Address));=0D }=0D =0D @@ -1116,7 +1229,8 @@ PciExpressRead32 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.= =0D =0D **/=0D UINT32=0D @@ -1126,6 +1240,9 @@ PciExpressWrite32 ( IN UINT32 Value=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioWrite32 (GetPciExpressAddress (Address), Value);=0D }=0D =0D @@ -1147,7 +1264,8 @@ PciExpressWrite32 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1157,6 +1275,9 @@ PciExpressOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioOr32 (GetPciExpressAddress (Address), OrData);=0D }=0D =0D @@ -1178,7 +1299,8 @@ PciExpressOr32 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1188,6 +1310,9 @@ PciExpressAnd32 ( IN UINT32 AndData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioAnd32 (GetPciExpressAddress (Address), AndData);=0D }=0D =0D @@ -1211,7 +1336,8 @@ PciExpressAnd32 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1222,6 +1348,9 @@ PciExpressAndThenOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioAndThenOr32 (=0D GetPciExpressAddress (Address),=0D AndData,=0D @@ -1248,7 +1377,8 @@ PciExpressAndThenOr32 ( @param EndBit The ordinal of the most significant bit in the bit fie= ld.=0D Range 0..31.=0D =0D - @return The value of the bit field read from the PCI configuration regis= ter.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configur= ation register.=0D =0D **/=0D UINT32=0D @@ -1259,6 +1389,9 @@ PciExpressBitFieldRead32 ( IN UINTN EndBit=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldRead32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1288,7 +1421,8 @@ PciExpressBitFieldRead32 ( Range 0..31.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1300,6 +1434,9 @@ PciExpressBitFieldWrite32 ( IN UINT32 Value=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldWrite32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1333,7 +1470,8 @@ PciExpressBitFieldWrite32 ( Range 0..31.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1345,6 +1483,9 @@ PciExpressBitFieldOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldOr32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1378,7 +1519,8 @@ PciExpressBitFieldOr32 ( Range 0..31.=0D @param AndData The value to AND with the PCI configuration register.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1390,6 +1532,9 @@ PciExpressBitFieldAnd32 ( IN UINT32 AndData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldAnd32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1427,7 +1572,8 @@ PciExpressBitFieldAnd32 ( @param AndData The value to AND with the PCI configuration register.= =0D @param OrData The value to OR with the result of the AND operation.= =0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regis= ter.=0D =0D **/=0D UINT32=0D @@ -1440,6 +1586,9 @@ PciExpressBitFieldAndThenOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldAndThenOr32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1469,7 +1618,8 @@ PciExpressBitFieldAndThenOr32 ( @param Size The size in bytes of the transfer.=0D @param Buffer The pointer to a buffer receiving the data read.=0D =0D - @return Size read data from StartAddress.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other Size read data from StartAddress.=0D =0D **/=0D UINTN=0D @@ -1485,9 +1635,16 @@ PciExpressReadBuffer ( //=0D // Make sure Address is valid=0D //=0D - ASSERT (((StartAddress) & ~0xfffffff) =3D=3D 0);=0D + ASSERT_INVALID_PCI_ADDRESS (StartAddress);=0D ASSERT (((StartAddress & 0xFFF) + Size) <=3D 0x1000);=0D =0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (StartAddress >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINTN) -1;=0D + }=0D +=0D if (Size =3D=3D 0) {=0D return Size;=0D }=0D @@ -1572,7 +1729,8 @@ PciExpressReadBuffer ( @param Size The size in bytes of the transfer.=0D @param Buffer The pointer to a buffer containing the data to wri= te.=0D =0D - @return Size written to StartAddress.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other Size written to StartAddress.=0D =0D **/=0D UINTN=0D @@ -1588,9 +1746,16 @@ PciExpressWriteBuffer ( //=0D // Make sure Address is valid=0D //=0D - ASSERT (((StartAddress) & ~0xfffffff) =3D=3D 0);=0D + ASSERT_INVALID_PCI_ADDRESS (StartAddress);=0D ASSERT (((StartAddress & 0xFFF) + Size) <=3D 0x1000);=0D =0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (StartAddress >=3D mDxeRuntimePciExpressLibPciExpressBaseSize) {=0D + return (UINTN) -1;=0D + }=0D +=0D if (Size =3D=3D 0) {=0D return 0;=0D }=0D diff --git a/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c b/MdePkg/Libra= ry/SmmPciExpressLib/PciExpressLib.c index 35b9f775a80b..97bd32c8d201 100644 --- a/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c +++ b/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c @@ -20,9 +20,10 @@ #include =0D =0D ///=0D -/// Module global that contains the base physical address of the PCI Expre= ss MMIO range.=0D +/// Module global that contains the base physical address and size of the = PCI Express MMIO range.=0D ///=0D UINTN mSmmPciExpressLibPciExpressBaseAddress =3D 0;=0D +UINTN mSmmPciExpressLibPciExpressBaseSize =3D 0;=0D =0D /**=0D The constructor function caches the PCI Express Base Address=0D @@ -40,9 +41,10 @@ SmmPciExpressLibConstructor ( )=0D {=0D //=0D - // Cache the physical address of the PCI Express MMIO range into a module= global variable=0D + // Cache the physical address and size of the PCI Express MMIO range into= a module global variable=0D //=0D mSmmPciExpressLibPciExpressBaseAddress =3D (UINTN) PcdGet64 (PcdPciExpres= sBaseAddress);=0D + mSmmPciExpressLibPciExpressBaseSize =3D (UINTN) PcdGet64 (PcdPciExpressBa= seSize);=0D =0D return EFI_SUCCESS;=0D }=0D @@ -97,8 +99,12 @@ PciExpressRegisterForRuntimeAccess ( mSmmPciExpressLibPciExpressBaseAddress is initialized in the library cons= tructor from PCD entry=0D PcdPciExpressBaseAddress.=0D =0D + If Address > 0x0FFFFFFF, then ASSERT().=0D +=0D @param Address The address that encodes the PCI Bus, Device, Function and= Register.=0D - @return MMIO address corresponding to Address.=0D +=0D + @retval (UINTN)-1 Invalid PCI address.=0D + @retval other MMIO address corresponding to Address.=0D =0D **/=0D UINTN=0D @@ -110,6 +116,12 @@ GetPciExpressAddress ( // Make sure Address is valid=0D //=0D ASSERT_INVALID_PCI_ADDRESS (Address);=0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINTN) -1;=0D + }=0D return mSmmPciExpressLibPciExpressBaseAddress + Address;=0D }=0D =0D @@ -125,7 +137,8 @@ GetPciExpressAddress ( @param Address The address that encodes the PCI Bus, Device, Function and= =0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -134,6 +147,9 @@ PciExpressRead8 ( IN UINTN Address=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioRead8 (GetPciExpressAddress (Address));=0D }=0D =0D @@ -150,7 +166,8 @@ PciExpressRead8 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -160,6 +177,9 @@ PciExpressWrite8 ( IN UINT8 Value=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioWrite8 (GetPciExpressAddress (Address), Value);=0D }=0D =0D @@ -180,7 +200,8 @@ PciExpressWrite8 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -190,6 +211,9 @@ PciExpressOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioOr8 (GetPciExpressAddress (Address), OrData);=0D }=0D =0D @@ -210,7 +234,8 @@ PciExpressOr8 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -220,6 +245,9 @@ PciExpressAnd8 ( IN UINT8 AndData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioAnd8 (GetPciExpressAddress (Address), AndData);=0D }=0D =0D @@ -242,7 +270,8 @@ PciExpressAnd8 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -253,6 +282,9 @@ PciExpressAndThenOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioAndThenOr8 (=0D GetPciExpressAddress (Address),=0D AndData,=0D @@ -278,7 +310,8 @@ PciExpressAndThenOr8 ( @param EndBit The ordinal of the most significant bit in the bit field.=0D Range 0..7.=0D =0D - @return The value of the bit field read from the PCI configuration regist= er.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configuration = register.=0D =0D **/=0D UINT8=0D @@ -289,6 +322,9 @@ PciExpressBitFieldRead8 ( IN UINTN EndBit=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldRead8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -317,7 +353,8 @@ PciExpressBitFieldRead8 ( Range 0..7.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -329,6 +366,9 @@ PciExpressBitFieldWrite8 ( IN UINT8 Value=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldWrite8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -361,7 +401,8 @@ PciExpressBitFieldWrite8 ( Range 0..7.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -373,6 +414,9 @@ PciExpressBitFieldOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldOr8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -405,7 +449,8 @@ PciExpressBitFieldOr8 ( Range 0..7.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -417,6 +462,9 @@ PciExpressBitFieldAnd8 ( IN UINT8 AndData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldAnd8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -453,7 +501,8 @@ PciExpressBitFieldAnd8 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.=0D =0D **/=0D UINT8=0D @@ -466,6 +515,9 @@ PciExpressBitFieldAndThenOr8 ( IN UINT8 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT8) -1;=0D + }=0D return MmioBitFieldAndThenOr8 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -488,7 +540,8 @@ PciExpressBitFieldAndThenOr8 ( @param Address The address that encodes the PCI Bus, Device, Function and= =0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT16=0D @@ -497,6 +550,9 @@ PciExpressRead16 ( IN UINTN Address=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioRead16 (GetPciExpressAddress (Address));=0D }=0D =0D @@ -514,7 +570,8 @@ PciExpressRead16 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT16=0D @@ -524,6 +581,9 @@ PciExpressWrite16 ( IN UINT16 Value=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioWrite16 (GetPciExpressAddress (Address), Value);=0D }=0D =0D @@ -545,7 +605,8 @@ PciExpressWrite16 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -555,6 +616,9 @@ PciExpressOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioOr16 (GetPciExpressAddress (Address), OrData);=0D }=0D =0D @@ -576,7 +640,8 @@ PciExpressOr16 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -586,6 +651,9 @@ PciExpressAnd16 ( IN UINT16 AndData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioAnd16 (GetPciExpressAddress (Address), AndData);=0D }=0D =0D @@ -609,7 +677,8 @@ PciExpressAnd16 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -620,6 +689,9 @@ PciExpressAndThenOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioAndThenOr16 (=0D GetPciExpressAddress (Address),=0D AndData,=0D @@ -646,7 +718,8 @@ PciExpressAndThenOr16 ( @param EndBit The ordinal of the most significant bit in the bit field.=0D Range 0..15.=0D =0D - @return The value of the bit field read from the PCI configuration regist= er.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configuratio= n register.=0D =0D **/=0D UINT16=0D @@ -657,6 +730,9 @@ PciExpressBitFieldRead16 ( IN UINTN EndBit=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldRead16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -686,7 +762,8 @@ PciExpressBitFieldRead16 ( Range 0..15.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -698,6 +775,9 @@ PciExpressBitFieldWrite16 ( IN UINT16 Value=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldWrite16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -731,7 +811,8 @@ PciExpressBitFieldWrite16 ( Range 0..15.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -743,6 +824,9 @@ PciExpressBitFieldOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldOr16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -776,7 +860,8 @@ PciExpressBitFieldOr16 ( Range 0..15.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -788,6 +873,9 @@ PciExpressBitFieldAnd16 ( IN UINT16 AndData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldAnd16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -825,7 +913,8 @@ PciExpressBitFieldAnd16 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration register.= =0D =0D **/=0D UINT16=0D @@ -838,6 +927,9 @@ PciExpressBitFieldAndThenOr16 ( IN UINT16 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT16) -1;=0D + }=0D return MmioBitFieldAndThenOr16 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -860,7 +952,8 @@ PciExpressBitFieldAndThenOr16 ( @param Address The address that encodes the PCI Bus, Device, Function and= =0D Register.=0D =0D - @return The read value from the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The read value from the PCI configuration register.=0D =0D **/=0D UINT32=0D @@ -869,6 +962,9 @@ PciExpressRead32 ( IN UINTN Address=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioRead32 (GetPciExpressAddress (Address));=0D }=0D =0D @@ -886,7 +982,8 @@ PciExpressRead32 ( Register.=0D @param Value The value to write.=0D =0D - @return The value written to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written to the PCI configuration register.=0D =0D **/=0D UINT32=0D @@ -896,6 +993,9 @@ PciExpressWrite32 ( IN UINT32 Value=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioWrite32 (GetPciExpressAddress (Address), Value);=0D }=0D =0D @@ -917,7 +1017,8 @@ PciExpressWrite32 ( Register.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -927,6 +1028,9 @@ PciExpressOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioOr32 (GetPciExpressAddress (Address), OrData);=0D }=0D =0D @@ -948,7 +1052,8 @@ PciExpressOr32 ( Register.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -958,6 +1063,9 @@ PciExpressAnd32 ( IN UINT32 AndData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioAnd32 (GetPciExpressAddress (Address), AndData);=0D }=0D =0D @@ -981,7 +1089,8 @@ PciExpressAnd32 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -992,6 +1101,9 @@ PciExpressAndThenOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioAndThenOr32 (=0D GetPciExpressAddress (Address),=0D AndData,=0D @@ -1018,7 +1130,8 @@ PciExpressAndThenOr32 ( @param EndBit The ordinal of the most significant bit in the bit field.=0D Range 0..31.=0D =0D - @return The value of the bit field read from the PCI configuration regist= er.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value of the bit field read from the PCI configura= tion register.=0D =0D **/=0D UINT32=0D @@ -1029,6 +1142,9 @@ PciExpressBitFieldRead32 ( IN UINTN EndBit=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldRead32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1058,7 +1174,8 @@ PciExpressBitFieldRead32 ( Range 0..31.=0D @param Value The new value of the bit field.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -1070,6 +1187,9 @@ PciExpressBitFieldWrite32 ( IN UINT32 Value=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldWrite32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1103,7 +1223,8 @@ PciExpressBitFieldWrite32 ( Range 0..31.=0D @param OrData The value to OR with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -1115,6 +1236,9 @@ PciExpressBitFieldOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldOr32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1148,7 +1272,8 @@ PciExpressBitFieldOr32 ( Range 0..31.=0D @param AndData The value to AND with the PCI configuration register.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -1160,6 +1285,9 @@ PciExpressBitFieldAnd32 ( IN UINT32 AndData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldAnd32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1197,7 +1325,8 @@ PciExpressBitFieldAnd32 ( @param AndData The value to AND with the PCI configuration register.=0D @param OrData The value to OR with the result of the AND operation.=0D =0D - @return The value written back to the PCI configuration register.=0D + @retval 0xFFFFFFFF Invalid PCI address.=0D + @retval other The value written back to the PCI configuration regist= er.=0D =0D **/=0D UINT32=0D @@ -1210,6 +1339,9 @@ PciExpressBitFieldAndThenOr32 ( IN UINT32 OrData=0D )=0D {=0D + if (Address >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINT32) -1;=0D + }=0D return MmioBitFieldAndThenOr32 (=0D GetPciExpressAddress (Address),=0D StartBit,=0D @@ -1239,7 +1371,8 @@ PciExpressBitFieldAndThenOr32 ( @param Size The size in bytes of the transfer.=0D @param Buffer The pointer to a buffer receiving the data read.=0D =0D - @return Size read data from StartAddress.=0D + @retval (UINTN)-1 Invalid PCI address.=0D + @retval other Size read data from StartAddress.=0D =0D **/=0D UINTN=0D @@ -1258,6 +1391,13 @@ PciExpressReadBuffer ( ASSERT_INVALID_PCI_ADDRESS (StartAddress);=0D ASSERT (((StartAddress & 0xFFF) + Size) <=3D 0x1000);=0D =0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (StartAddress >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINTN) -1;=0D + }=0D +=0D if (Size =3D=3D 0) {=0D return Size;=0D }=0D @@ -1342,7 +1482,8 @@ PciExpressReadBuffer ( @param Size The size in bytes of the transfer.=0D @param Buffer The pointer to a buffer containing the data to write.=0D =0D - @return Size written to StartAddress.=0D + @retval (UINTN)-1 Invalid PCI address.=0D + @retval other Size written to StartAddress.=0D =0D **/=0D UINTN=0D @@ -1361,6 +1502,13 @@ PciExpressWriteBuffer ( ASSERT_INVALID_PCI_ADDRESS (StartAddress);=0D ASSERT (((StartAddress & 0xFFF) + Size) <=3D 0x1000);=0D =0D + //=0D + // Make sure the Address is in MMCONF address space=0D + //=0D + if (StartAddress >=3D mSmmPciExpressLibPciExpressBaseSize) {=0D + return (UINTN) -1;=0D + }=0D +=0D =0D if (Size =3D=3D 0) {=0D return 0;=0D --=20 2.28.0