From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f68.google.com (mail-pj1-f68.google.com [209.85.216.68]) by mx.groups.io with SMTP id smtpd.web11.89265.1597847451615010812 for ; Wed, 19 Aug 2020 07:30:51 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=lossB5lk; spf=pass (domain: linaro.org, ip: 209.85.216.68, mailfrom: tanmay.jagdale@linaro.org) Received: by mail-pj1-f68.google.com with SMTP id d4so1197200pjx.5 for ; Wed, 19 Aug 2020 07:30:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ru6rwn/SOXcNitT8dXYk6Juwr8CKWpAax8jH+KXLi20=; b=lossB5lk7QT6XFe96Mj+cDc0Vo8oI4ruQDZuc7skoz42U9xGBGpCUKPi1kSUNRmySm 14JgYU5eRyxU72apLkv3XAJrFxbRGgCSb1GbW/ZNYRBsIiKombxXIkfmfbabcw0Kfhfc d2XGZgtnIZwXGjw0rtHQj8kVyDD3cRMrzF/LaiOQE8f0csznUTp6thjrNxltEib0Sfjm o8iTyBHAW6bQ2LBXz7KFAvlxfldbMnYppXV9H0bj2bqfu6zhOaUimuvHY7v4M6i0qzlv RCWfobt4KXXJTV5M6Xm14TDJ4EZVoH4l0ycsqrICCDZz/iGZcdTaMTYF/xfWl9FfBEjL /Q0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ru6rwn/SOXcNitT8dXYk6Juwr8CKWpAax8jH+KXLi20=; b=pNbbRficJv3rr4wNDUeTdJLh0g67Xz8MSU/E9tx2qCa+/7YY6ytta6tdD+lIgzdhTK Y6ETodsTBhNhCFMN2cPKlOuV+45U5wdW9GCJKv/FYA216iKKxOVBkSmj7hACu8T+m1XY ACH0I4tvlBp7qkeP7pkRmOZdJv9Z0jSEsqGTVeBsMjETWXTYvhSB4ikzoI4lCFLKL0vP jSabnwudgqj+x3nqCnCDQSR6+yq1jGA1UleSQowTiSQa7L/RzZU4WdJOrFNCRTfwVjM2 LKXzQPkIcI0o3yUX6eSYXXdH/fOUYUgQY0y/X2/TB1JsKX3R7MItbpmmYzXWgNKAWvtk T7Xw== X-Gm-Message-State: AOAM530Qjs161WH8aq1y8MwiKhPkPaPY1vKaiUKVsA6Z6iGE3Mjp7Vah hmal9Qs5rgHMmwj/deX0jyAzvg== X-Google-Smtp-Source: ABdhPJyMu/Y3Bi7AXHBgAOdXQa5KMLPwonXRrLaiJA6eUunJMeALKBlqbavhfzL0RHoeH7SArahgLg== X-Received: by 2002:a17:902:7d85:: with SMTP id a5mr19070712plm.148.1597847451038; Wed, 19 Aug 2020 07:30:51 -0700 (PDT) Return-Path: Received: from bean-canyon.localdomain ([106.51.140.68]) by smtp.googlemail.com with ESMTPSA id y10sm3320752pjv.55.2020.08.19.07.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2020 07:30:50 -0700 (PDT) From: "Tanmay Jagdale" To: leif@nuviainc.com, graeme@nuviainc.com, shashi.mallela@linaro.org, devel@edk2.groups.io Cc: paul.isaacs@linaro.org, tanmay@marvell.com, Tanmay Jagdale Subject: [PATCH edk2-platforms 3/7] SbsaQemu: Add new ACPI driver and FDT parser to count CPUs Date: Wed, 19 Aug 2020 20:00:01 +0530 Message-Id: <20200819143005.13999-4-tanmay.jagdale@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200819143005.13999-1-tanmay.jagdale@linaro.org> References: <20200819143005.13999-1-tanmay.jagdale@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit - Add a new ACPI driver for the SbsaQemu platform which would handle any modifications needed for the ACPI tables. - Move FdtLib from LibraryClasses.common.PEIM to LibraryClasses.common so that SbsaQemuAcpiDxe driver can use the device tree APIs - Since the core count is controlled by Qemu, move the PcdCoreCount from PcdsFixedAtBuild to PcdsDynamic. - Add a parser function in this driver which parses the FDT created by Qemu to determine the number of CPUs and hence update the PcdCoreCount variable. Signed-off-by: Tanmay Jagdale --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +- Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 1 + Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 1 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 76 +++++++++++++++++++ .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 49 ++++++++++++ Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 + 6 files changed, 135 insertions(+), 2 deletions(-) create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 4739443cae93..d42b9cd4de49 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -75,6 +75,7 @@ [LibraryClasses.common] ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf @@ -217,7 +218,6 @@ [LibraryClasses.common.PEIM] PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf ArmPlatformLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf [LibraryClasses.common.DXE_CORE] @@ -376,7 +376,6 @@ [PcdsFixedAtBuild.common] # gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE - gArmPlatformTokenSpaceGuid.PcdCoreCount|1 gArmTokenSpaceGuid.PcdVFPEnabled|1 # System Memory Base -- fixed @@ -477,6 +476,9 @@ [PcdsFixedAtBuild.common] [PcdsDynamicDefault.common] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 + # Core and Cluster Count + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|1 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|1 # System Memory Size -- 128 MB initially, actual size will be fetched from DT # TODO as no DT will be used we should pass this by some other method diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf index 4526eaaa02c5..3bcf0bf0040a 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf @@ -232,6 +232,7 @@ [FV.FvMain] # INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf INF RuleOverride = ACPITABLE Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf diff --git a/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc index c4a8d7a27b78..593670383750 100644 --- a/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc +++ b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc @@ -33,3 +33,4 @@ [Components.common] MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf + Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c new file mode 100644 index 000000000000..09e5ba432a59 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -0,0 +1,76 @@ +/** @file +* This file is an ACPI driver for the Qemu SBSA platform. +* +* Copyright (c) 2020, Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ +#include +#include +#include +#include +#include +#include +#include + +/* + * A function that walks through the Device Tree created + * by Qemu and counts the number of CPUs present in it. + */ +STATIC +VOID +CountCpusFromFdt ( + VOID +) +{ + VOID *DeviceTreeBase; + INT32 Node, Prev; + RETURN_STATUS PcdStatus; + INT32 CpuNode; + INT32 CpuCount; + + DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase != NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) == 0); + + CpuNode = fdt_path_offset (DeviceTreeBase, "/cpus"); + if (CpuNode <= 0) { + DEBUG((EFI_D_ERROR, "Unable to locate /cpus in device tree\n")); + return; + } + + CpuCount = 0; + + // Walk through /cpus node and count the number of subnodes. + // The count of these subnodes corresponds to the numer of + // CPUs created by Qemu. + Prev = fdt_first_subnode (DeviceTreeBase, CpuNode); + while (1) { + CpuCount++; + Node = fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + Prev = Node; + } + ASSERT (CpuCount > 0); + + PcdStatus = PcdSet32S (PcdCoreCount, CpuCount); + ASSERT_RETURN_ERROR (PcdStatus); +} + +EFI_STATUS +EFIAPI +InitializeSbsaQemuAcpiDxe ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + // Parse the device tree and get the number of CPUs + CountCpusFromFdt (); + + return EFI_SUCCESS; +} diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf new file mode 100644 index 000000000000..efc4d295bfb7 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -0,0 +1,49 @@ +## @file +# This driver modifies ACPI tables for the Qemu SBSA platform +# +# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001d + BASE_NAME = SbsaQemuAcpiDxe + FILE_GUID = 6c592dc9-76c8-474f-93b2-bf1e8f15ae35 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = InitializeSbsaQemuAcpiDxe + +[Sources] + SbsaQemuAcpiDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + ArmVirtPkg/ArmVirtPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmLib + BaseMemoryLib + DebugLib + BaseLib + FdtLib + DxeServicesLib + PcdLib + UefiDriverEntryPoint + UefiLib + UefiRuntimeServicesTableLib + +[Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress + +[Depex] + TRUE diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index 71ba55a082e2..ed87d15de003 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -35,3 +35,7 @@ [PcdsFixedAtBuild.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0|UINT64|0x00000003 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005 + +[PcdsDynamic.common] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000006 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x00000007 -- 2.28.0