From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by mx.groups.io with SMTP id smtpd.web12.88616.1597847459561360346 for ; Wed, 19 Aug 2020 07:30:59 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@linaro.org header.s=google header.b=mXQ126y+; spf=pass (domain: linaro.org, ip: 209.85.210.196, mailfrom: tanmay.jagdale@linaro.org) Received: by mail-pf1-f196.google.com with SMTP id r11so11759680pfl.11 for ; Wed, 19 Aug 2020 07:30:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qHivvWJOrekUSfI5MHKp5TLShxh9YHPHVWusrD6RJBw=; b=mXQ126y+eyqqKRyvLzWZxbPNGFEHH40BxLEp/XCN51tIsSlDiEd0MjncNtvfzbgilX eWHMyTHQAgRJf2kjlguGwsZ92LlM50FuQq92On+OakWiGI8YwJetXKGW+dvGDIjDCLJK 4Ar+JP3LAUvnppq0mieinHhPg4BjLcv/+k2XdC4ue7mmZuPHDGeOCa82DuH4W6vGIW2e MzaHZ+Up/w4rnE+MQMfySiVIdvw4vPOAxk7EoHjje7iecIOpQjkXAaaZtPJXbsSG13SS ax3cdDbJ4qzq1W3SsZKB3Bptz+wb8WZkwBtaois1ptuvgsYNSngJN0O9XNmgapjlIopp wXsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qHivvWJOrekUSfI5MHKp5TLShxh9YHPHVWusrD6RJBw=; b=YSdIlzt9/LPjXYfneY8q/tXfoo8SuK/m8Na6E3S77K37uU82ibWarEuT8lv6fFgmY8 vtzFG8z1+FLG7p+lT8qH8zD/raLEkO1T8kcyklcZQ333oxsBU9JZttFYyTJ/JVdAnqsB GUycyF2sAbacq1YY9sca87cGxq8zOFv/0P1JlorY/7t8MWYfbq3p5aqY/FrO/Ghdr4P6 evL3K8o41LQiSSrdZ/oJTwZutyCSYxDk2EqkuKOuv3Tu8tq4H2coP0IW0V6RtlcBOiBG gS84KStR4MpT21s8I+EQEASzfP5r3oMfhZSzN6PWnEeJ3IuuN436Tp8DOl6fkXcmYimX oEaA== X-Gm-Message-State: AOAM531mRQnY9r+iu+ZlIw1uDEQTNwzgJZklI59GXn29SHNCAl4yklcF Umic9Kwsngalu4Rb741zQnmT6w== X-Google-Smtp-Source: ABdhPJxrjOUaK5o08vlgeEZs9NXIP/SZPeShR7v8AHML2jgz79LgSJFj3ertDuiAqyp7NK4ywmiBQQ== X-Received: by 2002:a63:2584:: with SMTP id l126mr16612499pgl.126.1597847458731; Wed, 19 Aug 2020 07:30:58 -0700 (PDT) Return-Path: Received: from bean-canyon.localdomain ([106.51.140.68]) by smtp.googlemail.com with ESMTPSA id y10sm3320752pjv.55.2020.08.19.07.30.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2020 07:30:57 -0700 (PDT) From: "Tanmay Jagdale" To: leif@nuviainc.com, graeme@nuviainc.com, shashi.mallela@linaro.org, devel@edk2.groups.io Cc: paul.isaacs@linaro.org, tanmay@marvell.com, Tanmay Jagdale Subject: [PATCH edk2-platforms 4/7] SbsaQemu: AcpiDxe: Create MADT table at runtime Date: Wed, 19 Aug 2020 20:00:02 +0530 Message-Id: <20200819143005.13999-5-tanmay.jagdale@linaro.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200819143005.13999-1-tanmay.jagdale@linaro.org> References: <20200819143005.13999-1-tanmay.jagdale@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit - Add support to create MADT table at runtime. - Included a macro for GIC Redistributor structure initialisation. Signed-off-by: Tanmay Jagdale --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 159 ++++++++++++++++++ .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 20 ++- .../Include/IndustryStandard/SbsaQemuAcpi.h | 15 ++ 3 files changed, 193 insertions(+), 1 deletion(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 09e5ba432a59..569cda8b6474 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -6,11 +6,19 @@ * SPDX-License-Identifier: BSD-2-Clause-Patent * **/ +#include +#include +#include +#include +#include +#include #include +#include #include #include #include #include +#include #include #include @@ -62,6 +70,138 @@ CountCpusFromFdt ( ASSERT_RETURN_ERROR (PcdStatus); } +/* + * A Function to Compute the ACPI Table Checksum + */ +VOID +AcpiPlatformChecksum ( + IN UINT8 *Buffer, + IN UINTN Size + ) +{ + UINTN ChecksumOffset; + + ChecksumOffset = OFFSET_OF (EFI_ACPI_DESCRIPTION_HEADER, Checksum); + + // Set checksum to 0 first + Buffer[ChecksumOffset] = 0; + + // Update checksum value + Buffer[ChecksumOffset] = CalculateCheckSum8(Buffer, Size); +} + +/* + * A function that add the MADT ACPI table. + IN EFI_ACPI_COMMON_HEADER *CurrentTable + */ +EFI_STATUS +AddMadtTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + UINT32 NumCores; + + // Initialize MADT ACPI Header + EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header = { + SBSAQEMU_ACPI_HEADER (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER, + EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION), + 0, 0 }; + + // Initialize GICC Structure + EFI_ACPI_6_0_GIC_STRUCTURE Gicc = EFI_ACPI_6_0_GICC_STRUCTURE_INIT ( + 0, /* GicID */ + 0, /* AcpiCpuUid */ + 0, /* Mpidr */ + EFI_ACPI_6_0_GIC_ENABLED, /* Flags */ + SBSAQEMU_MADT_GIC_PMU_IRQ, /* PMU Irq */ + FixedPcdGet32 (PcdGicDistributorBase), /* PhysicalBaseAddress */ + SBSAQEMU_MADT_GIC_VBASE, /* GicVBase */ + SBSAQEMU_MADT_GIC_HBASE, /* GicHBase */ + 25, /* GsivId */ + 0, /* GicRBase */ + 0 /* Efficiency */ + ); + + // Initialize GIC Distributor Structure + EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE Gicd = + EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT ( + 0, + FixedPcdGet32 (PcdGicDistributorBase), + 0, + 3 /* GicVersion */ + ); + + // Initialize GIC Redistributor Structure + EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT(); + + // Get CoreCount which was determined eariler after parsing device tree + NumCores = PcdGet32 (PcdCoreCount); + + // Calculate the new table size based on the number of cores + TableSize = sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER) + + (sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) + + sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) + + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); + + Status = gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "Failed to allocate pages for MADT table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New = (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + // Add the ACPI Description table header + CopyMem (New, &Header, sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER)); + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; + New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); + + // Add new GICC structures for the Cores + for (NumCores = 0; NumCores < PcdGet32 (PcdCoreCount); NumCores++) { + EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr; + + CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE)); + GiccPtr = (EFI_ACPI_6_0_GIC_STRUCTURE *) New; + GiccPtr->AcpiProcessorUid = NumCores; + GiccPtr->MPIDR = NumCores; + New += sizeof (EFI_ACPI_6_0_GIC_STRUCTURE); + } + + // GIC Distributor Structure + CopyMem (New, &Gicd, sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE)); + New += sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE); + + // GIC ReDistributor Structure + CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE)); + New += sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); + + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status = AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "Failed to install MADT table\n")); + } + + return Status; +} + EFI_STATUS EFIAPI InitializeSbsaQemuAcpiDxe ( @@ -69,8 +209,27 @@ InitializeSbsaQemuAcpiDxe ( IN EFI_SYSTEM_TABLE *SystemTable ) { + EFI_STATUS Status; + EFI_ACPI_TABLE_PROTOCOL *AcpiTable; + // Parse the device tree and get the number of CPUs CountCpusFromFdt (); + // Check if ACPI Table Protocol has been installed + Status = gBS->LocateProtocol ( + &gEfiAcpiTableProtocolGuid, + NULL, + (VOID **)&AcpiTable + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "Failed to locate ACPI Table Protocol\n")); + return Status; + } + + Status = AddMadtTable (AcpiTable); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "Failed to add MADT table\n")); + } + return EFI_SUCCESS; } diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index efc4d295bfb7..16bc1b0c8cb1 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -41,9 +41,27 @@ [LibraryClasses] UefiRuntimeServicesTableLib [Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress [Depex] - TRUE + gEfiAcpiTableProtocolGuid ## CONSUMES + +[Guids] + gEdkiiPlatformHasAcpiGuid + +[Protocols] + gEfiAcpiTableProtocolGuid ## CONSUMES + +[FixedPcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index eac195b0585c..7a9a0061675f 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -22,6 +22,21 @@ FixedPcdGet32 (PcdAcpiDefaultCreatorRevision)/* UINT32 CreatorRevision */ \ } +// Defines for MADT +#define SBSAQEMU_MADT_GIC_VBASE 0x2c020000 +#define SBSAQEMU_MADT_GIC_HBASE 0x2c010000 +#define SBSAQEMU_MADT_GIC_PMU_IRQ 23 +#define SBSAQEMU_MADT_GICR_SIZE 0x4000000 + +// Macro for MADT GIC Redistributor Structure +#define SBSAQEMU_MADT_GICR_INIT() { \ + EFI_ACPI_6_0_GICR, /* Type */ \ + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE), /* Length */ \ + EFI_ACPI_RESERVED_WORD, /* Reserved */ \ + FixedPcdGet32 (PcdGicRedistributorsBase), /* DiscoveryRangeBaseAddress */ \ + SBSAQEMU_MADT_GICR_SIZE /* DiscoveryRangeLength */ \ + } + #define SBSAQEMU_UART0_BASE 0x60000000 #define SBSAQEMU_PCI_SEG0_CONFIG_BASE 0xf0000000 -- 2.28.0